1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification, immediately at the beginning of the file.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/param.h>
30 #include <sys/module.h>
31 #include <sys/systm.h>
32 #include <sys/kernel.h>
33 #include <sys/ata.h>
34 #include <sys/bus.h>
35 #include <sys/endian.h>
36 #include <sys/malloc.h>
37 #include <sys/lock.h>
38 #include <sys/mutex.h>
39 #include <sys/sema.h>
40 #include <sys/taskqueue.h>
41 #include <vm/uma.h>
42 #include <machine/stdarg.h>
43 #include <machine/resource.h>
44 #include <machine/bus.h>
45 #include <sys/rman.h>
46 #include <dev/pci/pcivar.h>
47 #include <dev/pci/pcireg.h>
48 #include <dev/ata/ata-all.h>
49 #include <dev/ata/ata-pci.h>
50 #include <ata_if.h>
51
52 /* local prototypes */
53 static int ata_acard_chipinit(device_t dev);
54 static int ata_acard_ch_attach(device_t dev);
55 static int ata_acard_status(device_t dev);
56 static int ata_acard_850_setmode(device_t dev, int target, int mode);
57 static int ata_acard_86X_setmode(device_t dev, int target, int mode);
58
59 /* misc defines */
60 #define ATP_OLD 1
61
62 /*
63 * Acard chipset support functions
64 */
65 static int
ata_acard_probe(device_t dev)66 ata_acard_probe(device_t dev)
67 {
68 struct ata_pci_controller *ctlr = device_get_softc(dev);
69 static const struct ata_chip_id ids[] =
70 {{ ATA_ATP850R, 0, ATP_OLD, 0x00, ATA_UDMA2, "ATP850" },
71 { ATA_ATP860A, 0, 0, 0x00, ATA_UDMA4, "ATP860A" },
72 { ATA_ATP860R, 0, 0, 0x00, ATA_UDMA4, "ATP860R" },
73 { ATA_ATP865A, 0, 0, 0x00, ATA_UDMA6, "ATP865A" },
74 { ATA_ATP865R, 0, 0, 0x00, ATA_UDMA6, "ATP865R" },
75 { 0, 0, 0, 0, 0, 0}};
76
77 if (pci_get_vendor(dev) != ATA_ACARD_ID)
78 return ENXIO;
79
80 if (!(ctlr->chip = ata_match_chip(dev, ids)))
81 return ENXIO;
82
83 ata_set_desc(dev);
84 ctlr->chipinit = ata_acard_chipinit;
85 return (BUS_PROBE_LOW_PRIORITY);
86 }
87
88 static int
ata_acard_chipinit(device_t dev)89 ata_acard_chipinit(device_t dev)
90 {
91 struct ata_pci_controller *ctlr = device_get_softc(dev);
92
93 if (ata_setup_interrupt(dev, ata_generic_intr))
94 return ENXIO;
95
96 ctlr->ch_attach = ata_acard_ch_attach;
97 ctlr->ch_detach = ata_pci_ch_detach;
98 if (ctlr->chip->cfg1 == ATP_OLD) {
99 ctlr->setmode = ata_acard_850_setmode;
100 /* Work around the lack of channel serialization in ATA_CAM. */
101 ctlr->channels = 1;
102 device_printf(dev, "second channel ignored\n");
103 }
104 else
105 ctlr->setmode = ata_acard_86X_setmode;
106 return 0;
107 }
108
109 static int
ata_acard_ch_attach(device_t dev)110 ata_acard_ch_attach(device_t dev)
111 {
112 struct ata_channel *ch = device_get_softc(dev);
113
114 /* setup the usual register normal pci style */
115 if (ata_pci_ch_attach(dev))
116 return ENXIO;
117
118 ch->hw.status = ata_acard_status;
119 ch->flags |= ATA_NO_ATAPI_DMA;
120 return 0;
121 }
122
123 static int
ata_acard_status(device_t dev)124 ata_acard_status(device_t dev)
125 {
126 struct ata_channel *ch = device_get_softc(dev);
127
128 if (ch->dma.flags & ATA_DMA_ACTIVE) {
129 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
130
131 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
132 ATA_BMSTAT_INTERRUPT)
133 return 0;
134 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
135 DELAY(1);
136 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
137 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
138 DELAY(1);
139 }
140 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
141 DELAY(100);
142 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
143 return 0;
144 }
145 return 1;
146 }
147
148 static int
ata_acard_850_setmode(device_t dev,int target,int mode)149 ata_acard_850_setmode(device_t dev, int target, int mode)
150 {
151 device_t parent = device_get_parent(dev);
152 struct ata_pci_controller *ctlr = device_get_softc(parent);
153 struct ata_channel *ch = device_get_softc(dev);
154 int devno = (ch->unit << 1) + target;
155
156 mode = min(mode, ctlr->chip->max_dma);
157 /* XXX SOS missing WDMA0+1 + PIO modes */
158 if (mode >= ATA_WDMA2) {
159 u_int8_t reg54 = pci_read_config(parent, 0x54, 1);
160
161 reg54 &= ~(0x03 << (devno << 1));
162 if (mode >= ATA_UDMA0)
163 reg54 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 1));
164 pci_write_config(parent, 0x54, reg54, 1);
165 pci_write_config(parent, 0x4a, 0xa6, 1);
166 pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2);
167 }
168 /* we could set PIO mode timings, but we assume the BIOS did that */
169 return (mode);
170 }
171
172 static int
ata_acard_86X_setmode(device_t dev,int target,int mode)173 ata_acard_86X_setmode(device_t dev, int target, int mode)
174 {
175 device_t parent = device_get_parent(dev);
176 struct ata_pci_controller *ctlr = device_get_softc(parent);
177 struct ata_channel *ch = device_get_softc(dev);
178 int devno = (ch->unit << 1) + target;
179
180 mode = min(mode, ctlr->chip->max_dma);
181 /* XXX SOS missing WDMA0+1 + PIO modes */
182 if (mode >= ATA_WDMA2) {
183 u_int16_t reg44 = pci_read_config(parent, 0x44, 2);
184
185 reg44 &= ~(0x000f << (devno << 2));
186 if (mode >= ATA_UDMA0)
187 reg44 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 2));
188 pci_write_config(parent, 0x44, reg44, 2);
189 pci_write_config(parent, 0x4a, 0xa6, 1);
190 pci_write_config(parent, 0x40 + devno, 0x31, 1);
191 }
192 /* we could set PIO mode timings, but we assume the BIOS did that */
193 return (mode);
194 }
195
196 ATA_DECLARE_DRIVER(ata_acard);
197