1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
23 /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */
24 /* All Rights Reserved */
25
26 /*
27 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
28 * Copyright 2012 Milan Jurik. All rights reserved.
29 * Copyright (c) 2016 by Delphix. All rights reserved.
30 * Copyright 2023 Oxide Computer Company
31 * Copyright 2024 Hans Rosenfeld
32 */
33
34
35 /*
36 * Serial I/O driver for 8250/16450/16550A/16650/16750/16950 chips.
37 */
38
39 #include <sys/param.h>
40 #include <sys/types.h>
41 #include <sys/signal.h>
42 #include <sys/stream.h>
43 #include <sys/termio.h>
44 #include <sys/errno.h>
45 #include <sys/file.h>
46 #include <sys/cmn_err.h>
47 #include <sys/stropts.h>
48 #include <sys/strsubr.h>
49 #include <sys/strtty.h>
50 #include <sys/debug.h>
51 #include <sys/kbio.h>
52 #include <sys/cred.h>
53 #include <sys/stat.h>
54 #include <sys/consdev.h>
55 #include <sys/mkdev.h>
56 #include <sys/kmem.h>
57 #include <sys/cred.h>
58 #include <sys/strsun.h>
59 #ifdef DEBUG
60 #include <sys/promif.h>
61 #endif
62 #include <sys/modctl.h>
63 #include <sys/ddi.h>
64 #include <sys/sunddi.h>
65 #include <sys/pci.h>
66 #include <sys/asy.h>
67 #include <sys/policy.h>
68 #include <sys/sysmacros.h>
69
70 /*
71 * set the RX FIFO trigger_level to half the RX FIFO size for now
72 * we may want to make this configurable later.
73 */
74 static int asy_trig_level = ASY_FCR_RHR_TRIG_8;
75
76 int asy_drain_check = 15000000; /* tunable: exit drain check time */
77 int asy_min_dtr_low = 500000; /* tunable: minimum DTR down time */
78 int asy_min_utbrk = 100000; /* tunable: minumum untimed brk time */
79
80 int asymaxchip = ASY_MAXCHIP; /* tunable: limit chip support we look for */
81
82 /*
83 * Just in case someone has a chip with broken loopback mode, we provide a
84 * means to disable the loopback test. By default, we only loopback test
85 * UARTs which look like they have FIFOs bigger than 16 bytes.
86 * Set to 0 to suppress test, or to 2 to enable test on any size FIFO.
87 */
88 int asy_fifo_test = 1; /* tunable: set to 0, 1, or 2 */
89
90 /*
91 * Allow ability to switch off testing of the scratch register.
92 * Some UART emulators might not have it. This will also disable the test
93 * for Exar/Startech ST16C650, as that requires use of the SCR register.
94 */
95 int asy_scr_test = 1; /* tunable: set to 0 to disable SCR reg test */
96
97 /*
98 * As we don't yet support on-chip flow control, it's a bad idea to put a
99 * large number of characters in the TX FIFO, since if other end tells us
100 * to stop transmitting, we can only stop filling the TX FIFO, but it will
101 * still carry on draining by itself, so remote end still gets what's left
102 * in the FIFO.
103 */
104 int asy_max_tx_fifo = 16; /* tunable: max fill of TX FIFO */
105
106 #define async_stopc async_ttycommon.t_stopc
107 #define async_startc async_ttycommon.t_startc
108
109 #define ASY_INIT 1
110 #define ASY_NOINIT 0
111
112 /* enum value for sw and hw flow control action */
113 typedef enum {
114 FLOW_CHECK,
115 FLOW_STOP,
116 FLOW_START
117 } async_flowc_action;
118
119 #ifdef DEBUG
120 #define ASY_DEBUG_INIT 0x0001 /* Output msgs during driver initialization. */
121 #define ASY_DEBUG_INPUT 0x0002 /* Report characters received during int. */
122 #define ASY_DEBUG_EOT 0x0004 /* Output msgs when wait for xmit to finish. */
123 #define ASY_DEBUG_CLOSE 0x0008 /* Output msgs when driver open/close called */
124 #define ASY_DEBUG_HFLOW 0x0010 /* Output msgs when H/W flowcontrol is active */
125 #define ASY_DEBUG_PROCS 0x0020 /* Output each proc name as it is entered. */
126 #define ASY_DEBUG_STATE 0x0040 /* Output value of Interrupt Service Reg. */
127 #define ASY_DEBUG_INTR 0x0080 /* Output value of Interrupt Service Reg. */
128 #define ASY_DEBUG_OUT 0x0100 /* Output msgs about output events. */
129 #define ASY_DEBUG_BUSY 0x0200 /* Output msgs when xmit is enabled/disabled */
130 #define ASY_DEBUG_MODEM 0x0400 /* Output msgs about modem status & control. */
131 #define ASY_DEBUG_MODM2 0x0800 /* Output msgs about modem status & control. */
132 #define ASY_DEBUG_IOCTL 0x1000 /* Output msgs about ioctl messages. */
133 #define ASY_DEBUG_CHIP 0x2000 /* Output msgs about chip identification. */
134 #define ASY_DEBUG_SFLOW 0x4000 /* Output msgs when S/W flowcontrol is active */
135
136 static int debug = 0;
137
138 #define ASY_DEBUG(asy, x) (asy->asy_debug & (x))
139 #define ASY_DPRINTF(asy, fac, format, ...) \
140 if (ASY_DEBUG(asy, fac)) \
141 asyerror(asy, CE_CONT, "!%s: " format, __func__, ##__VA_ARGS__)
142 #else
143 #define ASY_DEBUG(asy, x) B_FALSE
144 #define ASY_DPRINTF(asy, fac, format, ...)
145 #endif
146
147 /*
148 * PPS (Pulse Per Second) support.
149 */
150 void ddi_hardpps(struct timeval *, int);
151 /*
152 * This is protected by the asy_excl_hi of the port on which PPS event
153 * handling is enabled. Note that only one port should have this enabled at
154 * any one time. Enabling PPS handling on multiple ports will result in
155 * unpredictable (but benign) results.
156 */
157 static struct ppsclockev asy_ppsev;
158
159 #ifdef PPSCLOCKLED
160 /* XXX Use these to observe PPS latencies and jitter on a scope */
161 #define LED_ON
162 #define LED_OFF
163 #else
164 #define LED_ON
165 #define LED_OFF
166 #endif
167
168 static void asy_put_idx(const struct asycom *, asy_reg_t, uint8_t);
169 static uint8_t asy_get_idx(const struct asycom *, asy_reg_t);
170
171 static void asy_put_add(const struct asycom *, asy_reg_t, uint8_t);
172 static uint8_t asy_get_add(const struct asycom *, asy_reg_t);
173
174 static void asy_put_ext(const struct asycom *, asy_reg_t, uint8_t);
175 static uint8_t asy_get_ext(const struct asycom *, asy_reg_t);
176
177 static void asy_put_reg(const struct asycom *, asy_reg_t, uint8_t);
178 static uint8_t asy_get_reg(const struct asycom *, asy_reg_t);
179
180 static void asy_put(const struct asycom *, asy_reg_t, uint8_t);
181 static uint8_t asy_get(const struct asycom *, asy_reg_t);
182
183 static void asy_set(const struct asycom *, asy_reg_t, uint8_t);
184 static void asy_clr(const struct asycom *, asy_reg_t, uint8_t);
185
186 static void asy_enable_interrupts(const struct asycom *, uint8_t);
187 static void asy_disable_interrupts(const struct asycom *, uint8_t);
188 static void asy_set_baudrate(const struct asycom *, int);
189 static void asy_wait_baudrate(struct asycom *);
190
191 #define BAUDINDEX(cflg) (((cflg) & CBAUDEXT) ? \
192 (((cflg) & CBAUD) + CBAUD + 1) : ((cflg) & CBAUD))
193
194 static void asysetsoft(struct asycom *);
195 static uint_t asysoftintr(caddr_t, caddr_t);
196 static uint_t asyintr(caddr_t, caddr_t);
197
198 static boolean_t abort_charseq_recognize(uchar_t ch);
199
200 /* The async interrupt entry points */
201 static void async_txint(struct asycom *asy);
202 static void async_rxint(struct asycom *asy, uchar_t lsr);
203 static void async_msint(struct asycom *asy);
204 static void async_softint(struct asycom *asy);
205
206 static void async_ioctl(struct asyncline *async, queue_t *q, mblk_t *mp);
207 static void async_reioctl(void *unit);
208 static void async_iocdata(queue_t *q, mblk_t *mp);
209 static void async_restart(void *arg);
210 static void async_start(struct asyncline *async);
211 static void async_resume(struct asyncline *async);
212 static void asy_program(struct asycom *asy, int mode);
213 static void asyinit(struct asycom *asy);
214 static void asy_waiteot(struct asycom *asy);
215 static void asyputchar(cons_polledio_arg_t, uchar_t c);
216 static int asygetchar(cons_polledio_arg_t);
217 static boolean_t asyischar(cons_polledio_arg_t);
218
219 static int asymctl(struct asycom *, int, int);
220 static int asytodm(int, int);
221 static int dmtoasy(struct asycom *, int);
222 static void asyerror(const struct asycom *, int, const char *, ...)
223 __KPRINTFLIKE(3);
224 static void asy_parse_mode(dev_info_t *devi, struct asycom *asy);
225 static void asy_soft_state_free(struct asycom *);
226 static char *asy_hw_name(struct asycom *asy);
227 static void async_hold_utbrk(void *arg);
228 static void async_resume_utbrk(struct asyncline *async);
229 static void async_dtr_free(struct asyncline *async);
230 static int asy_identify_chip(dev_info_t *devi, struct asycom *asy);
231 static void asy_reset_fifo(struct asycom *asy, uchar_t flags);
232 static void asy_carrier_check(struct asycom *);
233 static int asy_getproperty(dev_info_t *devi, struct asycom *asy,
234 const char *property);
235 static boolean_t async_flowcontrol_sw_input(struct asycom *asy,
236 async_flowc_action onoff, int type);
237 static void async_flowcontrol_sw_output(struct asycom *asy,
238 async_flowc_action onoff);
239 static void async_flowcontrol_hw_input(struct asycom *asy,
240 async_flowc_action onoff, int type);
241 static void async_flowcontrol_hw_output(struct asycom *asy,
242 async_flowc_action onoff);
243
244 #define GET_PROP(devi, pname, pflag, pval, plen) \
245 (ddi_prop_op(DDI_DEV_T_ANY, (devi), PROP_LEN_AND_VAL_BUF, \
246 (pflag), (pname), (caddr_t)(pval), (plen)))
247
248 kmutex_t asy_glob_lock; /* lock protecting global data manipulation */
249 void *asy_soft_state;
250
251 /* Standard COM port I/O addresses */
252 static const int standard_com_ports[] = {
253 COM1_IOADDR, COM2_IOADDR, COM3_IOADDR, COM4_IOADDR
254 };
255
256 static int *com_ports;
257 static uint_t num_com_ports;
258
259 #ifdef DEBUG
260 /*
261 * Set this to true to make the driver pretend to do a suspend. Useful
262 * for debugging suspend/resume code with a serial debugger.
263 */
264 boolean_t asy_nosuspend = B_FALSE;
265 #endif
266
267
268 /*
269 * Baud rate table. Indexed by #defines found in sys/termios.h
270 *
271 * The default crystal frequency is 1.8432 MHz. The 8250A used a fixed /16
272 * prescaler and a 16bit divisor, split in two registers (DLH and DLL).
273 *
274 * The 16950 adds TCR and CKS registers. The TCR can be used to set the
275 * prescaler from /4 to /16. The CKS can be used, among other things, to
276 * select a isochronous 1x mode, effectively disabling the prescaler.
277 * This would theoretically allow a baud rate of 1843200 driven directly
278 * by the default crystal frequency, although the highest termios.h-defined
279 * baud rate we can support is half of that, 921600 baud.
280 */
281 #define UNSUPPORTED 0x00, 0x00, 0x00
282 static struct {
283 uint8_t asy_dlh;
284 uint8_t asy_dll;
285 uint8_t asy_tcr;
286 } asy_baud_tab[] = {
287 [B0] = { UNSUPPORTED }, /* 0 baud */
288 [B50] = { 0x09, 0x00, 0x00 }, /* 50 baud */
289 [B75] = { 0x06, 0x00, 0x00 }, /* 75 baud */
290 [B110] = { 0x04, 0x17, 0x00 }, /* 110 baud (0.026% error) */
291 [B134] = { 0x03, 0x59, 0x00 }, /* 134 baud (0.058% error) */
292 [B150] = { 0x03, 0x00, 0x00 }, /* 150 baud */
293 [B200] = { 0x02, 0x40, 0x00 }, /* 200 baud */
294 [B300] = { 0x01, 0x80, 0x00 }, /* 300 baud */
295 [B600] = { 0x00, 0xc0, 0x00 }, /* 600 baud */
296 [B1200] = { 0x00, 0x60, 0x00 }, /* 1200 baud */
297 [B1800] = { 0x00, 0x40, 0x00 }, /* 1800 baud */
298 [B2400] = { 0x00, 0x30, 0x00 }, /* 2400 baud */
299 [B4800] = { 0x00, 0x18, 0x00 }, /* 4800 baud */
300 [B9600] = { 0x00, 0x0c, 0x00 }, /* 9600 baud */
301 [B19200] = { 0x00, 0x06, 0x00 }, /* 19200 baud */
302 [B38400] = { 0x00, 0x03, 0x00 }, /* 38400 baud */
303 [B57600] = { 0x00, 0x02, 0x00 }, /* 57600 baud */
304 [B76800] = { 0x00, 0x06, 0x04 }, /* 76800 baud (16950) */
305 [B115200] = { 0x00, 0x01, 0x00 }, /* 115200 baud */
306 [B153600] = { 0x00, 0x03, 0x04 }, /* 153600 baud (16950) */
307 [B230400] = { 0x00, 0x02, 0x04 }, /* 230400 baud (16950) */
308 [B307200] = { 0x00, 0x01, 0x06 }, /* 307200 baud (16950) */
309 [B460800] = { 0x00, 0x01, 0x04 }, /* 460800 baud (16950) */
310 [B921600] = { 0x00, 0x02, 0x01 }, /* 921600 baud (16950) */
311 [B1000000] = { UNSUPPORTED }, /* 1000000 baud */
312 [B1152000] = { UNSUPPORTED }, /* 1152000 baud */
313 [B1500000] = { UNSUPPORTED }, /* 1500000 baud */
314 [B2000000] = { UNSUPPORTED }, /* 2000000 baud */
315 [B2500000] = { UNSUPPORTED }, /* 2500000 baud */
316 [B3000000] = { UNSUPPORTED }, /* 3000000 baud */
317 [B3500000] = { UNSUPPORTED }, /* 3500000 baud */
318 [B4000000] = { UNSUPPORTED }, /* 4000000 baud */
319 };
320
321 /*
322 * Register table. For each logical register, we define the minimum hwtype, the
323 * register offset, and function pointers for reading and writing the register.
324 * A NULL pointer indicates the register cannot be read from or written to,
325 * respectively.
326 */
327 static struct {
328 int asy_min_hwtype;
329 int8_t asy_reg_off;
330 uint8_t (*asy_get_reg)(const struct asycom *, asy_reg_t);
331 void (*asy_put_reg)(const struct asycom *, asy_reg_t, uint8_t);
332 } asy_reg_table[] = {
333 [ASY_ILLEGAL] = { 0, -1, NULL, NULL },
334 /* 8250 / 16450 / 16550 registers */
335 [ASY_THR] = { ASY_8250A, 0, NULL, asy_put_reg },
336 [ASY_RHR] = { ASY_8250A, 0, asy_get_reg, NULL },
337 [ASY_IER] = { ASY_8250A, 1, asy_get_reg, asy_put_reg },
338 [ASY_FCR] = { ASY_16550, 2, NULL, asy_put_reg },
339 [ASY_ISR] = { ASY_8250A, 2, asy_get_reg, NULL },
340 [ASY_LCR] = { ASY_8250A, 3, asy_get_reg, asy_put_reg },
341 [ASY_MCR] = { ASY_8250A, 4, asy_get_reg, asy_put_reg },
342 [ASY_LSR] = { ASY_8250A, 5, asy_get_reg, NULL },
343 [ASY_MSR] = { ASY_8250A, 6, asy_get_reg, NULL },
344 [ASY_SPR] = { ASY_8250A, 7, asy_get_reg, asy_put_reg },
345 [ASY_DLL] = { ASY_8250A, 0, asy_get_reg, asy_put_reg },
346 [ASY_DLH] = { ASY_8250A, 1, asy_get_reg, asy_put_reg },
347 /* 16750 extended register */
348 [ASY_EFR] = { ASY_16750, 2, asy_get_ext, asy_put_ext },
349 /* 16650 extended registers */
350 [ASY_XON1] = { ASY_16650, 4, asy_get_ext, asy_put_ext },
351 [ASY_XON2] = { ASY_16650, 5, asy_get_ext, asy_put_ext },
352 [ASY_XOFF1] = { ASY_16650, 6, asy_get_ext, asy_put_ext },
353 [ASY_XOFF2] = { ASY_16650, 7, asy_get_ext, asy_put_ext },
354 /* 16950 additional registers */
355 [ASY_ASR] = { ASY_16950, 1, asy_get_add, asy_put_add },
356 [ASY_RFL] = { ASY_16950, 3, asy_get_add, NULL },
357 [ASY_TFL] = { ASY_16950, 4, asy_get_add, NULL },
358 [ASY_ICR] = { ASY_16950, 5, asy_get_reg, asy_put_reg },
359 /* 16950 indexed registers */
360 [ASY_ACR] = { ASY_16950, 0, asy_get_idx, asy_put_idx },
361 [ASY_CPR] = { ASY_16950, 1, asy_get_idx, asy_put_idx },
362 [ASY_TCR] = { ASY_16950, 2, asy_get_idx, asy_put_idx },
363 [ASY_CKS] = { ASY_16950, 3, asy_get_idx, asy_put_idx },
364 [ASY_TTL] = { ASY_16950, 4, asy_get_idx, asy_put_idx },
365 [ASY_RTL] = { ASY_16950, 5, asy_get_idx, asy_put_idx },
366 [ASY_FCL] = { ASY_16950, 6, asy_get_idx, asy_put_idx },
367 [ASY_FCH] = { ASY_16950, 7, asy_get_idx, asy_put_idx },
368 [ASY_ID1] = { ASY_16950, 8, asy_get_idx, NULL },
369 [ASY_ID2] = { ASY_16950, 9, asy_get_idx, NULL },
370 [ASY_ID3] = { ASY_16950, 10, asy_get_idx, NULL },
371 [ASY_REV] = { ASY_16950, 11, asy_get_idx, NULL },
372 [ASY_CSR] = { ASY_16950, 12, NULL, asy_put_idx },
373 [ASY_NMR] = { ASY_16950, 13, asy_get_idx, asy_put_idx },
374 };
375
376
377 static int asyrsrv(queue_t *q);
378 static int asyopen(queue_t *rq, dev_t *dev, int flag, int sflag, cred_t *cr);
379 static int asyclose(queue_t *q, int flag, cred_t *credp);
380 static int asywputdo(queue_t *q, mblk_t *mp, boolean_t);
381 static int asywput(queue_t *q, mblk_t *mp);
382
383 struct module_info asy_info = {
384 0,
385 "asy",
386 0,
387 INFPSZ,
388 4096,
389 128
390 };
391
392 static struct qinit asy_rint = {
393 putq,
394 asyrsrv,
395 asyopen,
396 asyclose,
397 NULL,
398 &asy_info,
399 NULL
400 };
401
402 static struct qinit asy_wint = {
403 asywput,
404 NULL,
405 NULL,
406 NULL,
407 NULL,
408 &asy_info,
409 NULL
410 };
411
412 struct streamtab asy_str_info = {
413 &asy_rint,
414 &asy_wint,
415 NULL,
416 NULL
417 };
418
419 static void asy_intr_free(struct asycom *);
420 static int asy_intr_setup(struct asycom *, int);
421
422 static void asy_softintr_free(struct asycom *);
423 static int asy_softintr_setup(struct asycom *);
424
425 static int asy_suspend(struct asycom *);
426 static int asy_resume(dev_info_t *);
427
428 static int asyinfo(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg,
429 void **result);
430 static int asyprobe(dev_info_t *);
431 static int asyattach(dev_info_t *, ddi_attach_cmd_t);
432 static int asydetach(dev_info_t *, ddi_detach_cmd_t);
433 static int asyquiesce(dev_info_t *);
434
435 static struct cb_ops cb_asy_ops = {
436 nodev, /* cb_open */
437 nodev, /* cb_close */
438 nodev, /* cb_strategy */
439 nodev, /* cb_print */
440 nodev, /* cb_dump */
441 nodev, /* cb_read */
442 nodev, /* cb_write */
443 nodev, /* cb_ioctl */
444 nodev, /* cb_devmap */
445 nodev, /* cb_mmap */
446 nodev, /* cb_segmap */
447 nochpoll, /* cb_chpoll */
448 ddi_prop_op, /* cb_prop_op */
449 &asy_str_info, /* cb_stream */
450 D_MP /* cb_flag */
451 };
452
453 struct dev_ops asy_ops = {
454 DEVO_REV, /* devo_rev */
455 0, /* devo_refcnt */
456 asyinfo, /* devo_getinfo */
457 nulldev, /* devo_identify */
458 asyprobe, /* devo_probe */
459 asyattach, /* devo_attach */
460 asydetach, /* devo_detach */
461 nodev, /* devo_reset */
462 &cb_asy_ops, /* devo_cb_ops */
463 NULL, /* devo_bus_ops */
464 NULL, /* power */
465 asyquiesce, /* quiesce */
466 };
467
468 static struct modldrv modldrv = {
469 &mod_driverops, /* Type of module. This one is a driver */
470 "ASY driver",
471 &asy_ops, /* driver ops */
472 };
473
474 static struct modlinkage modlinkage = {
475 MODREV_1,
476 (void *)&modldrv,
477 NULL
478 };
479
480 int
_init(void)481 _init(void)
482 {
483 int i;
484
485 i = ddi_soft_state_init(&asy_soft_state, sizeof (struct asycom), 2);
486 if (i == 0) {
487 mutex_init(&asy_glob_lock, NULL, MUTEX_DRIVER, NULL);
488 if ((i = mod_install(&modlinkage)) != 0) {
489 mutex_destroy(&asy_glob_lock);
490 ddi_soft_state_fini(&asy_soft_state);
491 #ifdef DEBUG
492 } else {
493 if (debug & ASY_DEBUG_INIT)
494 cmn_err(CE_NOTE, "!%s, debug = %x",
495 modldrv.drv_linkinfo, debug);
496 #endif
497 }
498 }
499 return (i);
500 }
501
502 int
_fini(void)503 _fini(void)
504 {
505 int i;
506
507 if ((i = mod_remove(&modlinkage)) == 0) {
508 #ifdef DEBUG
509 if (debug & ASY_DEBUG_INIT)
510 cmn_err(CE_NOTE, "!%s unloading",
511 modldrv.drv_linkinfo);
512 #endif
513 mutex_destroy(&asy_glob_lock);
514 /* free "motherboard-serial-ports" property if allocated */
515 if (com_ports != NULL && com_ports != (int *)standard_com_ports)
516 ddi_prop_free(com_ports);
517 com_ports = NULL;
518 ddi_soft_state_fini(&asy_soft_state);
519 }
520 return (i);
521 }
522
523 int
_info(struct modinfo * modinfop)524 _info(struct modinfo *modinfop)
525 {
526 return (mod_info(&modlinkage, modinfop));
527 }
528 static void
asy_put_idx(const struct asycom * asy,asy_reg_t reg,uint8_t val)529 asy_put_idx(const struct asycom *asy, asy_reg_t reg, uint8_t val)
530 {
531 ASSERT(asy->asy_hwtype >= ASY_16950);
532
533 ASSERT(reg >= ASY_ACR);
534 ASSERT(reg <= ASY_NREG);
535
536 /*
537 * The last value written to LCR must not have been the magic value for
538 * EFR access. Every time the driver writes that magic value to access
539 * EFR, XON1, XON2, XOFF1, and XOFF2, the driver restores the original
540 * value of LCR, so we should be good here.
541 *
542 * I'd prefer to ASSERT this, but I'm not sure it's worth the hassle.
543 */
544
545 /* Write indexed register offset to SPR. */
546 asy_put(asy, ASY_SPR, asy_reg_table[reg].asy_reg_off);
547
548 /* Write value to ICR. */
549 asy_put(asy, ASY_ICR, val);
550 }
551
552 static uint8_t
asy_get_idx(const struct asycom * asy,asy_reg_t reg)553 asy_get_idx(const struct asycom *asy, asy_reg_t reg)
554 {
555 uint8_t val;
556
557 ASSERT(asy->asy_hwtype >= ASY_16950);
558
559 ASSERT(reg >= ASY_ACR);
560 ASSERT(reg <= ASY_NREG);
561
562 /* Enable access to ICR in ACR. */
563 asy_put(asy, ASY_ACR, ASY_ACR_ICR | asy->asy_acr);
564
565 /* Write indexed register offset to SPR. */
566 asy_put(asy, ASY_SPR, asy_reg_table[reg].asy_reg_off);
567
568 /* Read value from ICR. */
569 val = asy_get(asy, ASY_ICR);
570
571 /* Restore ACR. */
572 asy_put(asy, ASY_ACR, asy->asy_acr);
573
574 return (val);
575 }
576
577 static void
asy_put_add(const struct asycom * asy,asy_reg_t reg,uint8_t val)578 asy_put_add(const struct asycom *asy, asy_reg_t reg, uint8_t val)
579 {
580 ASSERT(asy->asy_hwtype >= ASY_16950);
581
582 /* Only ASR is writable, RFL and TFL are read-only. */
583 ASSERT(reg == ASY_ASR);
584
585 /*
586 * Only ASR[0] (Transmitter Disabled) and ASR[1] (Remote Transmitter
587 * Disabled) are writable.
588 */
589 ASSERT((val & ~(ASY_ASR_TD | ASY_ASR_RTD)) == 0);
590
591 /* Enable access to ASR in ACR. */
592 asy_put(asy, ASY_ACR, ASY_ACR_ASR | asy->asy_acr);
593
594 /* Write value to ASR. */
595 asy_put_reg(asy, reg, val);
596
597 /* Restore ACR. */
598 asy_put(asy, ASY_ACR, asy->asy_acr);
599 }
600
601 static uint8_t
asy_get_add(const struct asycom * asy,asy_reg_t reg)602 asy_get_add(const struct asycom *asy, asy_reg_t reg)
603 {
604 uint8_t val;
605
606 ASSERT(asy->asy_hwtype >= ASY_16950);
607
608 ASSERT(reg >= ASY_ASR);
609 ASSERT(reg <= ASY_TFL);
610
611 /*
612 * The last value written to LCR must not have been the magic value for
613 * EFR access. Every time the driver writes that magic value to access
614 * EFR, XON1, XON2, XOFF1, and XOFF2, the driver restores the original
615 * value of LCR, so we should be good here.
616 *
617 * I'd prefer to ASSERT this, but I'm not sure it's worth the hassle.
618 */
619
620 /* Enable access to ASR in ACR. */
621 asy_put(asy, ASY_ACR, ASY_ACR_ASR | asy->asy_acr);
622
623 /* Read value from register. */
624 val = asy_get_reg(asy, reg);
625
626 /* Restore ACR. */
627 asy_put(asy, ASY_ACR, 0 | asy->asy_acr);
628
629 return (val);
630 }
631
632 static void
asy_put_ext(const struct asycom * asy,asy_reg_t reg,uint8_t val)633 asy_put_ext(const struct asycom *asy, asy_reg_t reg, uint8_t val)
634 {
635 uint8_t lcr;
636
637 /*
638 * On the 16750, EFR can be accessed when LCR[7]=1 (DLAB).
639 * Only two bits are assigned for auto RTS/CTS, which we don't support
640 * yet.
641 *
642 * So insist we have a 16650 or up.
643 */
644 ASSERT(asy->asy_hwtype >= ASY_16650);
645
646 ASSERT(reg >= ASY_EFR);
647 ASSERT(reg <= ASY_XOFF2);
648
649 /* Save LCR contents. */
650 lcr = asy_get(asy, ASY_LCR);
651
652 /* Enable extended register access. */
653 asy_put(asy, ASY_LCR, ASY_LCR_EFRACCESS);
654
655 /* Write extended register */
656 asy_put_reg(asy, reg, val);
657
658 /* Restore previous LCR contents, disabling extended register access. */
659 asy_put(asy, ASY_LCR, lcr);
660 }
661
662 static uint8_t
asy_get_ext(const struct asycom * asy,asy_reg_t reg)663 asy_get_ext(const struct asycom *asy, asy_reg_t reg)
664 {
665 uint8_t lcr, val;
666
667 /*
668 * On the 16750, EFR can be accessed when LCR[7]=1 (DLAB).
669 * Only two bits are assigned for auto RTS/CTS, which we don't support
670 * yet.
671 *
672 * So insist we have a 16650 or up.
673 */
674 ASSERT(asy->asy_hwtype >= ASY_16650);
675
676 ASSERT(reg >= ASY_EFR);
677 ASSERT(reg <= ASY_XOFF2);
678
679 /* Save LCR contents. */
680 lcr = asy_get(asy, ASY_LCR);
681
682 /* Enable extended register access. */
683 asy_put(asy, ASY_LCR, ASY_LCR_EFRACCESS);
684
685 /* Read extended register */
686 val = asy_get_reg(asy, reg);
687
688 /* Restore previous LCR contents, disabling extended register access. */
689 asy_put(asy, ASY_LCR, lcr);
690
691 return (val);
692 }
693
694 static void
asy_put_reg(const struct asycom * asy,asy_reg_t reg,uint8_t val)695 asy_put_reg(const struct asycom *asy, asy_reg_t reg, uint8_t val)
696 {
697 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
698
699 ddi_put8(asy->asy_iohandle,
700 asy->asy_ioaddr + asy_reg_table[reg].asy_reg_off, val);
701 }
702
703 static uint8_t
asy_get_reg(const struct asycom * asy,asy_reg_t reg)704 asy_get_reg(const struct asycom *asy, asy_reg_t reg)
705 {
706 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
707
708 return (ddi_get8(asy->asy_iohandle,
709 asy->asy_ioaddr + asy_reg_table[reg].asy_reg_off));
710 }
711
712 static void
asy_put(const struct asycom * asy,asy_reg_t reg,uint8_t val)713 asy_put(const struct asycom *asy, asy_reg_t reg, uint8_t val)
714 {
715 ASSERT(mutex_owned(&asy->asy_excl_hi));
716
717 ASSERT(reg > ASY_ILLEGAL);
718 ASSERT(reg < ASY_NREG);
719
720 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
721 ASSERT(asy_reg_table[reg].asy_put_reg != NULL);
722
723 asy_reg_table[reg].asy_put_reg(asy, reg, val);
724 }
725
726 static uint8_t
asy_get(const struct asycom * asy,asy_reg_t reg)727 asy_get(const struct asycom *asy, asy_reg_t reg)
728 {
729 uint8_t val;
730
731 ASSERT(mutex_owned(&asy->asy_excl_hi));
732
733 ASSERT(reg > ASY_ILLEGAL);
734 ASSERT(reg < ASY_NREG);
735
736 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
737 ASSERT(asy_reg_table[reg].asy_get_reg != NULL);
738
739 val = asy_reg_table[reg].asy_get_reg(asy, reg);
740
741 return (val);
742 }
743
744 static void
asy_set(const struct asycom * asy,asy_reg_t reg,uint8_t bits)745 asy_set(const struct asycom *asy, asy_reg_t reg, uint8_t bits)
746 {
747 uint8_t val = asy_get(asy, reg);
748
749 asy_put(asy, reg, val | bits);
750 }
751
752 static void
asy_clr(const struct asycom * asy,asy_reg_t reg,uint8_t bits)753 asy_clr(const struct asycom *asy, asy_reg_t reg, uint8_t bits)
754 {
755 uint8_t val = asy_get(asy, reg);
756
757 asy_put(asy, reg, val & ~bits);
758 }
759
760 static void
asy_enable_interrupts(const struct asycom * asy,uint8_t intr)761 asy_enable_interrupts(const struct asycom *asy, uint8_t intr)
762 {
763 /* Don't touch any IER bits we don't support. */
764 intr &= ASY_IER_ALL;
765
766 asy_set(asy, ASY_IER, intr);
767 }
768
769 static void
asy_disable_interrupts(const struct asycom * asy,uint8_t intr)770 asy_disable_interrupts(const struct asycom *asy, uint8_t intr)
771 {
772 /* Don't touch any IER bits we don't support. */
773 intr &= ASY_IER_ALL;
774
775 asy_clr(asy, ASY_IER, intr);
776 }
777
778 static void
asy_set_baudrate(const struct asycom * asy,int baudrate)779 asy_set_baudrate(const struct asycom *asy, int baudrate)
780 {
781 uint8_t tcr;
782
783 if (baudrate == 0)
784 return;
785
786 if (baudrate >= ARRAY_SIZE(asy_baud_tab))
787 return;
788
789 tcr = asy_baud_tab[baudrate].asy_tcr;
790
791 if (tcr != 0 && asy->asy_hwtype < ASY_16950)
792 return;
793
794 if (asy->asy_hwtype >= ASY_16950) {
795 if (tcr == 0x01) {
796 /* Isochronous 1x mode is selected in CKS, not TCR. */
797 asy_put(asy, ASY_CKS,
798 ASY_CKS_RCLK_1X | ASY_CKS_TCLK_1X);
799 asy_put(asy, ASY_TCR, 0);
800 } else {
801 /* Reset CKS in case it was set to 1x mode. */
802 asy_put(asy, ASY_CKS, 0);
803
804 ASSERT(tcr == 0x00 || tcr >= 0x04 || tcr <= 0x0f);
805 asy_put(asy, ASY_TCR, tcr);
806 }
807 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
808 "setting baudrate %d, CKS 0x%02x, TCR 0x%02x",
809 baudrate, asy_get(asy, ASY_CKS), asy_get(asy, ASY_TCR));
810 }
811
812 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
813 "setting baudrate %d, divisor 0x%02x%02x",
814 baudrate, asy_baud_tab[baudrate].asy_dlh,
815 asy_baud_tab[baudrate].asy_dll);
816
817 asy_set(asy, ASY_LCR, ASY_LCR_DLAB);
818
819 asy_put(asy, ASY_DLL, asy_baud_tab[baudrate].asy_dll);
820 asy_put(asy, ASY_DLH, asy_baud_tab[baudrate].asy_dlh);
821
822 asy_clr(asy, ASY_LCR, ASY_LCR_DLAB);
823 }
824
825 /*
826 * Loop until the TSR is empty.
827 *
828 * The wait period is clock / (baud * 16) * 16 * 2.
829 */
830 static void
asy_wait_baudrate(struct asycom * asy)831 asy_wait_baudrate(struct asycom *asy)
832 {
833 struct asyncline *async = asy->asy_priv;
834 int rate = BAUDINDEX(async->async_ttycommon.t_cflag);
835 clock_t usec =
836 ((((clock_t)asy_baud_tab[rate].asy_dlh) << 8) |
837 ((clock_t)asy_baud_tab[rate].asy_dll)) * 16 * 2;
838
839 ASSERT(mutex_owned(&asy->asy_excl));
840 ASSERT(mutex_owned(&asy->asy_excl_hi));
841
842 while ((asy_get(asy, ASY_LSR) & ASY_LSR_TEMT) == 0) {
843 mutex_exit(&asy->asy_excl_hi);
844 mutex_exit(&asy->asy_excl);
845 drv_usecwait(usec);
846 mutex_enter(&asy->asy_excl);
847 mutex_enter(&asy->asy_excl_hi);
848 }
849 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
850 }
851
852 void
async_put_suspq(struct asycom * asy,mblk_t * mp)853 async_put_suspq(struct asycom *asy, mblk_t *mp)
854 {
855 struct asyncline *async = asy->asy_priv;
856
857 ASSERT(mutex_owned(&asy->asy_excl));
858
859 if (async->async_suspqf == NULL)
860 async->async_suspqf = mp;
861 else
862 async->async_suspqb->b_next = mp;
863
864 async->async_suspqb = mp;
865 }
866
867 static mblk_t *
async_get_suspq(struct asycom * asy)868 async_get_suspq(struct asycom *asy)
869 {
870 struct asyncline *async = asy->asy_priv;
871 mblk_t *mp;
872
873 ASSERT(mutex_owned(&asy->asy_excl));
874
875 if ((mp = async->async_suspqf) != NULL) {
876 async->async_suspqf = mp->b_next;
877 mp->b_next = NULL;
878 } else {
879 async->async_suspqb = NULL;
880 }
881 return (mp);
882 }
883
884 static void
async_process_suspq(struct asycom * asy)885 async_process_suspq(struct asycom *asy)
886 {
887 struct asyncline *async = asy->asy_priv;
888 mblk_t *mp;
889
890 ASSERT(mutex_owned(&asy->asy_excl));
891
892 while ((mp = async_get_suspq(asy)) != NULL) {
893 queue_t *q;
894
895 q = async->async_ttycommon.t_writeq;
896 ASSERT(q != NULL);
897 mutex_exit(&asy->asy_excl);
898 (void) asywputdo(q, mp, B_FALSE);
899 mutex_enter(&asy->asy_excl);
900 }
901 async->async_flags &= ~ASYNC_DDI_SUSPENDED;
902 cv_broadcast(&async->async_flags_cv);
903 }
904
905 static int
asy_get_bus_type(dev_info_t * devinfo)906 asy_get_bus_type(dev_info_t *devinfo)
907 {
908 char *prop;
909 int bustype;
910
911 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, devinfo, 0, "device_type",
912 &prop) != DDI_PROP_SUCCESS &&
913 ddi_prop_lookup_string(DDI_DEV_T_ANY, devinfo, 0, "bus-type",
914 &prop) != DDI_PROP_SUCCESS) {
915 dev_err(devinfo, CE_WARN,
916 "!%s: can't figure out device type for parent \"%s\"",
917 __func__, ddi_get_name(ddi_get_parent(devinfo)));
918 return (ASY_BUS_UNKNOWN);
919 }
920
921 if (strcmp(prop, "isa") == 0)
922 bustype = ASY_BUS_ISA;
923 else if (strcmp(prop, "pci") == 0)
924 bustype = ASY_BUS_PCI;
925 else if (strcmp(prop, "pciex") == 0)
926 return (ASY_BUS_PCI);
927 else
928 bustype = ASY_BUS_UNKNOWN;
929
930 ddi_prop_free(prop);
931 return (bustype);
932 }
933
934 static int
asy_get_io_regnum_pci(dev_info_t * devi,struct asycom * asy)935 asy_get_io_regnum_pci(dev_info_t *devi, struct asycom *asy)
936 {
937 int reglen, nregs;
938 int regnum, i;
939 uint64_t size;
940 struct pci_phys_spec *reglist;
941
942 if (ddi_getlongprop(DDI_DEV_T_ANY, devi, DDI_PROP_DONTPASS,
943 "reg", (caddr_t)®list, ®len) != DDI_PROP_SUCCESS) {
944 dev_err(devi, CE_WARN, "!%s: reg property"
945 " not found in devices property list", __func__);
946 return (-1);
947 }
948
949 regnum = -1;
950 nregs = reglen / sizeof (*reglist);
951 for (i = 0; i < nregs; i++) {
952 switch (reglist[i].pci_phys_hi & PCI_ADDR_MASK) {
953 case PCI_ADDR_IO: /* I/O bus reg property */
954 if (regnum == -1) /* use only the first one */
955 regnum = i;
956 break;
957
958 default:
959 break;
960 }
961 }
962
963 /* check for valid count of registers */
964 if (regnum >= 0) {
965 size = ((uint64_t)reglist[regnum].pci_size_low) |
966 ((uint64_t)reglist[regnum].pci_size_hi) << 32;
967 if (size < 8)
968 regnum = -1;
969 }
970 kmem_free(reglist, reglen);
971 return (regnum);
972 }
973
974 static int
asy_get_io_regnum_isa(dev_info_t * devi,struct asycom * asy)975 asy_get_io_regnum_isa(dev_info_t *devi, struct asycom *asy)
976 {
977 int regnum = -1;
978 int reglen, nregs;
979 struct {
980 uint_t bustype;
981 int base;
982 int size;
983 } *reglist;
984
985 if (ddi_getlongprop(DDI_DEV_T_ANY, devi, DDI_PROP_DONTPASS,
986 "reg", (caddr_t)®list, ®len) != DDI_PROP_SUCCESS) {
987 dev_err(devi, CE_WARN, "!%s: reg property not found "
988 "in devices property list", __func__);
989 return (-1);
990 }
991
992 nregs = reglen / sizeof (*reglist);
993
994 /*
995 * Find the first I/O bus in the "reg" property.
996 */
997 for (int i = 0; i < nregs && regnum == -1; i++) {
998 if (reglist[i].bustype == 1) {
999 regnum = i;
1000 break;
1001 }
1002 }
1003
1004 /* check for valid count of registers */
1005 if ((regnum < 0) || (reglist[regnum].size < 8))
1006 regnum = -1;
1007
1008 kmem_free(reglist, reglen);
1009
1010 return (regnum);
1011 }
1012
1013 static int
asy_get_io_regnum(dev_info_t * devinfo,struct asycom * asy)1014 asy_get_io_regnum(dev_info_t *devinfo, struct asycom *asy)
1015 {
1016 switch (asy_get_bus_type(devinfo)) {
1017 case ASY_BUS_ISA:
1018 return (asy_get_io_regnum_isa(devinfo, asy));
1019 case ASY_BUS_PCI:
1020 return (asy_get_io_regnum_pci(devinfo, asy));
1021 default:
1022 return (-1);
1023 }
1024 }
1025
1026 static void
asy_intr_free(struct asycom * asy)1027 asy_intr_free(struct asycom *asy)
1028 {
1029 int i;
1030
1031 for (i = 0; i < asy->asy_intr_cnt; i++) {
1032 if (asy->asy_inth[i] == NULL)
1033 break;
1034
1035 if ((asy->asy_intr_cap & DDI_INTR_FLAG_BLOCK) != 0)
1036 (void) ddi_intr_block_disable(&asy->asy_inth[i], 1);
1037 else
1038 (void) ddi_intr_disable(asy->asy_inth[i]);
1039
1040 (void) ddi_intr_remove_handler(asy->asy_inth[i]);
1041 (void) ddi_intr_free(asy->asy_inth[i]);
1042 }
1043
1044 kmem_free(asy->asy_inth, asy->asy_inth_sz);
1045 asy->asy_inth = NULL;
1046 asy->asy_inth_sz = 0;
1047 }
1048
1049 static int
asy_intr_setup(struct asycom * asy,int intr_type)1050 asy_intr_setup(struct asycom *asy, int intr_type)
1051 {
1052 int nintrs, navail, count;
1053 int ret;
1054 int i;
1055
1056 if (asy->asy_intr_types == 0) {
1057 ret = ddi_intr_get_supported_types(asy->asy_dip,
1058 &asy->asy_intr_types);
1059 if (ret != DDI_SUCCESS) {
1060 asyerror(asy, CE_WARN,
1061 "ddi_intr_get_supported_types failed");
1062 return (ret);
1063 }
1064 }
1065
1066 if ((asy->asy_intr_types & intr_type) == 0)
1067 return (DDI_FAILURE);
1068
1069 ret = ddi_intr_get_nintrs(asy->asy_dip, intr_type, &nintrs);
1070 if (ret != DDI_SUCCESS) {
1071 asyerror(asy, CE_WARN, "ddi_intr_get_nintrs failed, type %d",
1072 intr_type);
1073 return (ret);
1074 }
1075
1076 if (nintrs < 1) {
1077 asyerror(asy, CE_WARN, "no interrupts of type %d", intr_type);
1078 return (DDI_FAILURE);
1079 }
1080
1081 ret = ddi_intr_get_navail(asy->asy_dip, intr_type, &navail);
1082 if (ret != DDI_SUCCESS) {
1083 asyerror(asy, CE_WARN, "ddi_intr_get_navail failed, type %d",
1084 intr_type);
1085 return (ret);
1086 }
1087
1088 if (navail < 1) {
1089 asyerror(asy, CE_WARN, "no available interrupts, type %d",
1090 intr_type);
1091 return (DDI_FAILURE);
1092 }
1093
1094 /*
1095 * Some PCI(e) RS232 adapters seem to support more than one interrupt,
1096 * but the asy driver really doesn't.
1097 */
1098 asy->asy_inth_sz = sizeof (ddi_intr_handle_t);
1099 asy->asy_inth = kmem_zalloc(asy->asy_inth_sz, KM_SLEEP);
1100 ret = ddi_intr_alloc(asy->asy_dip, asy->asy_inth, intr_type, 0, 1,
1101 &count, 0);
1102 if (ret != DDI_SUCCESS) {
1103 asyerror(asy, CE_WARN, "ddi_intr_alloc failed, count %d, "
1104 "type %d", navail, intr_type);
1105 goto fail;
1106 }
1107
1108 if (count != 1) {
1109 asyerror(asy, CE_WARN, "ddi_intr_alloc returned not 1 but %d "
1110 "interrupts of type %d", count, intr_type);
1111 goto fail;
1112 }
1113
1114 asy->asy_intr_cnt = count;
1115
1116 ret = ddi_intr_get_pri(asy->asy_inth[0], &asy->asy_intr_pri);
1117 if (ret != DDI_SUCCESS) {
1118 asyerror(asy, CE_WARN, "ddi_intr_get_pri failed, type %d",
1119 intr_type);
1120 goto fail;
1121 }
1122
1123 for (i = 0; i < count; i++) {
1124 ret = ddi_intr_add_handler(asy->asy_inth[i], asyintr,
1125 (void *)asy, (void *)(uintptr_t)i);
1126 if (ret != DDI_SUCCESS) {
1127 asyerror(asy, CE_WARN, "ddi_intr_add_handler failed, "
1128 "int %d, type %d", i, intr_type);
1129 goto fail;
1130 }
1131 }
1132
1133 (void) ddi_intr_get_cap(asy->asy_inth[0], &asy->asy_intr_cap);
1134
1135 for (i = 0; i < count; i++) {
1136 if (asy->asy_intr_cap & DDI_INTR_FLAG_BLOCK)
1137 ret = ddi_intr_block_enable(&asy->asy_inth[i], 1);
1138 else
1139 ret = ddi_intr_enable(asy->asy_inth[i]);
1140
1141 if (ret != DDI_SUCCESS) {
1142 asyerror(asy, CE_WARN,
1143 "enabling interrupt %d failed, type %d",
1144 i, intr_type);
1145 goto fail;
1146 }
1147 }
1148
1149 asy->asy_intr_type = intr_type;
1150 return (DDI_SUCCESS);
1151
1152 fail:
1153 asy_intr_free(asy);
1154 return (ret);
1155 }
1156
1157 static void
asy_softintr_free(struct asycom * asy)1158 asy_softintr_free(struct asycom *asy)
1159 {
1160 (void) ddi_intr_remove_softint(asy->asy_soft_inth);
1161 }
1162
1163 static int
asy_softintr_setup(struct asycom * asy)1164 asy_softintr_setup(struct asycom *asy)
1165 {
1166 int ret;
1167
1168 ret = ddi_intr_add_softint(asy->asy_dip, &asy->asy_soft_inth,
1169 ASY_SOFT_INT_PRI, asysoftintr, asy);
1170 if (ret != DDI_SUCCESS) {
1171 asyerror(asy, CE_WARN, "ddi_intr_add_softint failed");
1172 return (ret);
1173 }
1174
1175 /*
1176 * This may seem pointless since we specified ASY_SOFT_INT_PRI above,
1177 * but then it's probably a good idea to consider the soft interrupt
1178 * priority an opaque value and don't hardcode any assumptions about
1179 * its actual value here.
1180 */
1181 ret = ddi_intr_get_softint_pri(asy->asy_soft_inth,
1182 &asy->asy_soft_intr_pri);
1183 if (ret != DDI_SUCCESS) {
1184 asyerror(asy, CE_WARN, "ddi_intr_get_softint_pri failed");
1185 return (ret);
1186 }
1187
1188 return (DDI_SUCCESS);
1189 }
1190
1191
1192 static int
asy_resume(dev_info_t * devi)1193 asy_resume(dev_info_t *devi)
1194 {
1195 struct asyncline *async;
1196 struct asycom *asy;
1197 int instance = ddi_get_instance(devi); /* find out which unit */
1198
1199 #ifdef DEBUG
1200 if (asy_nosuspend)
1201 return (DDI_SUCCESS);
1202 #endif
1203 asy = ddi_get_soft_state(asy_soft_state, instance);
1204 if (asy == NULL)
1205 return (DDI_FAILURE);
1206
1207 mutex_enter(&asy->asy_soft_sr);
1208 mutex_enter(&asy->asy_excl);
1209 mutex_enter(&asy->asy_excl_hi);
1210
1211 async = asy->asy_priv;
1212 asy_disable_interrupts(asy, ASY_IER_ALL);
1213 if (asy_identify_chip(devi, asy) != DDI_SUCCESS) {
1214 mutex_exit(&asy->asy_excl_hi);
1215 mutex_exit(&asy->asy_excl);
1216 mutex_exit(&asy->asy_soft_sr);
1217 asyerror(asy, CE_WARN, "Cannot identify UART chip at %p",
1218 (void *)asy->asy_ioaddr);
1219 return (DDI_FAILURE);
1220 }
1221 asy->asy_flags &= ~ASY_DDI_SUSPENDED;
1222 if (async->async_flags & ASYNC_ISOPEN) {
1223 asy_program(asy, ASY_INIT);
1224 /* Kick off output */
1225 if (async->async_ocnt > 0) {
1226 async_resume(async);
1227 } else {
1228 mutex_exit(&asy->asy_excl_hi);
1229 if (async->async_xmitblk)
1230 freeb(async->async_xmitblk);
1231 async->async_xmitblk = NULL;
1232 async_start(async);
1233 mutex_enter(&asy->asy_excl_hi);
1234 }
1235 asysetsoft(asy);
1236 }
1237 mutex_exit(&asy->asy_excl_hi);
1238 mutex_exit(&asy->asy_excl);
1239 mutex_exit(&asy->asy_soft_sr);
1240
1241 mutex_enter(&asy->asy_excl);
1242 if (async->async_flags & ASYNC_RESUME_BUFCALL) {
1243 async->async_wbufcid = bufcall(async->async_wbufcds,
1244 BPRI_HI, (void (*)(void *)) async_reioctl,
1245 (void *)(intptr_t)async->async_common->asy_unit);
1246 async->async_flags &= ~ASYNC_RESUME_BUFCALL;
1247 }
1248 async_process_suspq(asy);
1249 mutex_exit(&asy->asy_excl);
1250 return (DDI_SUCCESS);
1251 }
1252
1253 static int
asy_suspend(struct asycom * asy)1254 asy_suspend(struct asycom *asy)
1255 {
1256 struct asyncline *async = asy->asy_priv;
1257 unsigned i;
1258 uchar_t lsr;
1259
1260 #ifdef DEBUG
1261 if (asy_nosuspend)
1262 return (DDI_SUCCESS);
1263 #endif
1264 mutex_enter(&asy->asy_excl);
1265
1266 ASSERT(async->async_ops >= 0);
1267 while (async->async_ops > 0)
1268 cv_wait(&async->async_ops_cv, &asy->asy_excl);
1269
1270 async->async_flags |= ASYNC_DDI_SUSPENDED;
1271
1272 /* Wait for timed break and delay to complete */
1273 while ((async->async_flags & (ASYNC_BREAK|ASYNC_DELAY))) {
1274 if (cv_wait_sig(&async->async_flags_cv, &asy->asy_excl) == 0) {
1275 async_process_suspq(asy);
1276 mutex_exit(&asy->asy_excl);
1277 return (DDI_FAILURE);
1278 }
1279 }
1280
1281 /* Clear untimed break */
1282 if (async->async_flags & ASYNC_OUT_SUSPEND)
1283 async_resume_utbrk(async);
1284
1285 mutex_exit(&asy->asy_excl);
1286
1287 mutex_enter(&asy->asy_soft_sr);
1288 mutex_enter(&asy->asy_excl);
1289 if (async->async_wbufcid != 0) {
1290 bufcall_id_t bcid = async->async_wbufcid;
1291 async->async_wbufcid = 0;
1292 async->async_flags |= ASYNC_RESUME_BUFCALL;
1293 mutex_exit(&asy->asy_excl);
1294 unbufcall(bcid);
1295 mutex_enter(&asy->asy_excl);
1296 }
1297 mutex_enter(&asy->asy_excl_hi);
1298
1299 asy_disable_interrupts(asy, ASY_IER_ALL);
1300 asy->asy_flags |= ASY_DDI_SUSPENDED;
1301
1302 /*
1303 * Hardware interrupts are disabled we can drop our high level
1304 * lock and proceed.
1305 */
1306 mutex_exit(&asy->asy_excl_hi);
1307
1308 /* Process remaining RX characters and RX errors, if any */
1309 lsr = asy_get(asy, ASY_LSR);
1310 async_rxint(asy, lsr);
1311
1312 /* Wait for TX to drain */
1313 for (i = 1000; i > 0; i--) {
1314 lsr = asy_get(asy, ASY_LSR);
1315 if ((lsr & (ASY_LSR_TEMT | ASY_LSR_THRE)) ==
1316 (ASY_LSR_TEMT | ASY_LSR_THRE))
1317 break;
1318 delay(drv_usectohz(10000));
1319 }
1320 if (i == 0)
1321 asyerror(asy, CE_WARN, "transmitter wasn't drained before "
1322 "driver was suspended");
1323
1324 mutex_exit(&asy->asy_excl);
1325 mutex_exit(&asy->asy_soft_sr);
1326
1327 return (DDI_SUCCESS);
1328 }
1329
1330 static int
asydetach(dev_info_t * devi,ddi_detach_cmd_t cmd)1331 asydetach(dev_info_t *devi, ddi_detach_cmd_t cmd)
1332 {
1333 int instance;
1334 struct asycom *asy;
1335
1336 instance = ddi_get_instance(devi); /* find out which unit */
1337
1338 asy = ddi_get_soft_state(asy_soft_state, instance);
1339 if (asy == NULL)
1340 return (DDI_FAILURE);
1341
1342 switch (cmd) {
1343 case DDI_DETACH:
1344 break;
1345
1346 case DDI_SUSPEND:
1347 return (asy_suspend(asy));
1348
1349 default:
1350 return (DDI_FAILURE);
1351 }
1352
1353 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "%s shutdown", asy_hw_name(asy));
1354
1355 if ((asy->asy_progress & ASY_PROGRESS_ASYNC) != 0) {
1356 struct asyncline *async = asy->asy_priv;
1357
1358 /* cancel DTR hold timeout */
1359 if (async->async_dtrtid != 0) {
1360 (void) untimeout(async->async_dtrtid);
1361 async->async_dtrtid = 0;
1362 }
1363 cv_destroy(&async->async_flags_cv);
1364 kmem_free(async, sizeof (struct asyncline));
1365 asy->asy_priv = NULL;
1366 }
1367
1368 if ((asy->asy_progress & ASY_PROGRESS_MINOR) != 0)
1369 ddi_remove_minor_node(devi, NULL);
1370
1371 if ((asy->asy_progress & ASY_PROGRESS_MUTEX) != 0) {
1372 mutex_destroy(&asy->asy_excl);
1373 mutex_destroy(&asy->asy_excl_hi);
1374 mutex_destroy(&asy->asy_soft_lock);
1375 }
1376
1377 if ((asy->asy_progress & ASY_PROGRESS_INT) != 0)
1378 asy_intr_free(asy);
1379
1380 if ((asy->asy_progress & ASY_PROGRESS_SOFTINT) != 0)
1381 asy_softintr_free(asy);
1382
1383 if ((asy->asy_progress & ASY_PROGRESS_REGS) != 0)
1384 ddi_regs_map_free(&asy->asy_iohandle);
1385
1386 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "shutdown complete");
1387 asy_soft_state_free(asy);
1388
1389 return (DDI_SUCCESS);
1390 }
1391
1392 /*
1393 * asyprobe
1394 * We don't bother probing for the hardware, as since Solaris 2.6, device
1395 * nodes are only created for auto-detected hardware or nodes explicitly
1396 * created by the user, e.g. via the DCA. However, we should check the
1397 * device node is at least vaguely usable, i.e. we have a block of 8 i/o
1398 * ports. This prevents attempting to attach to bogus serial ports which
1399 * some BIOSs still partially report when they are disabled in the BIOS.
1400 */
1401 static int
asyprobe(dev_info_t * devi)1402 asyprobe(dev_info_t *devi)
1403 {
1404 return ((asy_get_io_regnum(devi, NULL) < 0) ?
1405 DDI_PROBE_FAILURE : DDI_PROBE_DONTCARE);
1406 }
1407
1408 static int
asyattach(dev_info_t * devi,ddi_attach_cmd_t cmd)1409 asyattach(dev_info_t *devi, ddi_attach_cmd_t cmd)
1410 {
1411 int instance;
1412 int mcr;
1413 int ret;
1414 int regnum = 0;
1415 int i;
1416 struct asycom *asy;
1417 char name[ASY_MINOR_LEN];
1418 int status;
1419 static ddi_device_acc_attr_t ioattr = {
1420 DDI_DEVICE_ATTR_V0,
1421 DDI_NEVERSWAP_ACC,
1422 DDI_STRICTORDER_ACC,
1423 };
1424
1425 switch (cmd) {
1426 case DDI_ATTACH:
1427 break;
1428
1429 case DDI_RESUME:
1430 return (asy_resume(devi));
1431
1432 default:
1433 return (DDI_FAILURE);
1434 }
1435
1436 mutex_enter(&asy_glob_lock);
1437 if (com_ports == NULL) { /* need to initialize com_ports */
1438 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, devi, 0,
1439 "motherboard-serial-ports", &com_ports, &num_com_ports) !=
1440 DDI_PROP_SUCCESS) {
1441 /* Use our built-in COM[1234] values */
1442 com_ports = (int *)standard_com_ports;
1443 num_com_ports = sizeof (standard_com_ports) /
1444 sizeof (standard_com_ports[0]);
1445 }
1446 if (num_com_ports > 10) {
1447 /* We run out of single digits for device properties */
1448 num_com_ports = 10;
1449 asyerror(asy, CE_WARN,
1450 "More than %d motherboard-serial-ports",
1451 num_com_ports);
1452 }
1453 }
1454 mutex_exit(&asy_glob_lock);
1455
1456
1457 instance = ddi_get_instance(devi); /* find out which unit */
1458 ret = ddi_soft_state_zalloc(asy_soft_state, instance);
1459 if (ret != DDI_SUCCESS)
1460 return (DDI_FAILURE);
1461 asy = ddi_get_soft_state(asy_soft_state, instance);
1462
1463 asy->asy_dip = devi;
1464 #ifdef DEBUG
1465 asy->asy_debug = debug;
1466 #endif
1467 asy->asy_unit = instance;
1468
1469 regnum = asy_get_io_regnum(devi, asy);
1470
1471 if (regnum < 0 ||
1472 ddi_regs_map_setup(devi, regnum, (caddr_t *)&asy->asy_ioaddr,
1473 (offset_t)0, (offset_t)0, &ioattr, &asy->asy_iohandle)
1474 != DDI_SUCCESS) {
1475 asyerror(asy, CE_WARN, "could not map UART registers @ %p",
1476 (void *)asy->asy_ioaddr);
1477 goto fail;
1478 }
1479
1480 asy->asy_progress |= ASY_PROGRESS_REGS;
1481
1482 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "UART @ %p", (void *)asy->asy_ioaddr);
1483
1484 /*
1485 * Lookup the i/o address to see if this is a standard COM port
1486 * in which case we assign it the correct tty[a-d] to match the
1487 * COM port number, or some other i/o address in which case it
1488 * will be assigned /dev/term/[0123...] in some rather arbitrary
1489 * fashion.
1490 */
1491 for (i = 0; i < num_com_ports; i++) {
1492 if (asy->asy_ioaddr == (uint8_t *)(uintptr_t)com_ports[i]) {
1493 asy->asy_com_port = i + 1;
1494 break;
1495 }
1496 }
1497
1498 /*
1499 * It appears that there was async hardware that on reset did not clear
1500 * IER. Hence when we enable interrupts, this hardware would cause the
1501 * system to hang if there was input available.
1502 *
1503 * Don't use asy_disable_interrupts() as the mutexes haven't been
1504 * initialized yet.
1505 */
1506 ddi_put8(asy->asy_iohandle, asy->asy_ioaddr + ASY_IER, 0);
1507
1508
1509 /*
1510 * Establish default settings:
1511 * - use RTS/DTR after open
1512 * - 8N1 data format
1513 * - 9600 baud
1514 */
1515 asy->asy_mcr |= ASY_MCR_RTS | ASY_MCR_DTR;
1516 asy->asy_lcr = ASY_LCR_STOP1 | ASY_LCR_BITS8;
1517 asy->asy_bidx = B9600;
1518 asy->asy_fifo_buf = 1;
1519 asy->asy_use_fifo = ASY_FCR_FIFO_OFF;
1520
1521 #ifdef DEBUG
1522 asy->asy_msint_cnt = 0; /* # of times in async_msint */
1523 #endif
1524 mcr = 0; /* don't enable until open */
1525
1526 if (asy->asy_com_port != 0) {
1527 /*
1528 * For motherboard ports, emulate tty eeprom properties.
1529 * Actually, we can't tell if a port is motherboard or not,
1530 * so for "motherboard ports", read standard DOS COM ports.
1531 */
1532 switch (asy_getproperty(devi, asy, "ignore-cd")) {
1533 case 0: /* *-ignore-cd=False */
1534 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1535 "clear ASY_IGNORE_CD");
1536 asy->asy_flags &= ~ASY_IGNORE_CD; /* wait for cd */
1537 break;
1538 case 1: /* *-ignore-cd=True */
1539 /*FALLTHRU*/
1540 default: /* *-ignore-cd not defined */
1541 /*
1542 * We set rather silly defaults of soft carrier on
1543 * and DTR/RTS raised here because it might be that
1544 * one of the motherboard ports is the system console.
1545 */
1546 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1547 "set ASY_IGNORE_CD, set RTS & DTR");
1548 mcr = asy->asy_mcr; /* rts/dtr on */
1549 asy->asy_flags |= ASY_IGNORE_CD; /* ignore cd */
1550 break;
1551 }
1552
1553 /* Property for not raising DTR/RTS */
1554 switch (asy_getproperty(devi, asy, "rts-dtr-off")) {
1555 case 0: /* *-rts-dtr-off=False */
1556 asy->asy_flags |= ASY_RTS_DTR_OFF; /* OFF */
1557 mcr = asy->asy_mcr; /* rts/dtr on */
1558 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1559 "ASY_RTS_DTR_OFF set and DTR & RTS set");
1560 break;
1561 case 1: /* *-rts-dtr-off=True */
1562 /*FALLTHRU*/
1563 default: /* *-rts-dtr-off undefined */
1564 break;
1565 }
1566
1567 /* Parse property for tty modes */
1568 asy_parse_mode(devi, asy);
1569 } else {
1570 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1571 "clear ASY_IGNORE_CD, clear RTS & DTR");
1572 asy->asy_flags &= ~ASY_IGNORE_CD; /* wait for cd */
1573 }
1574
1575 /*
1576 * Install per instance software interrupt handler.
1577 */
1578 if (asy_softintr_setup(asy) != DDI_SUCCESS) {
1579 asyerror(asy, CE_WARN, "Cannot set soft interrupt");
1580 goto fail;
1581 }
1582
1583 asy->asy_progress |= ASY_PROGRESS_SOFTINT;
1584
1585 /*
1586 * Install interrupt handler for this device.
1587 */
1588 if ((asy_intr_setup(asy, DDI_INTR_TYPE_MSIX) != DDI_SUCCESS) &&
1589 (asy_intr_setup(asy, DDI_INTR_TYPE_MSI) != DDI_SUCCESS) &&
1590 (asy_intr_setup(asy, DDI_INTR_TYPE_FIXED) != DDI_SUCCESS)) {
1591 asyerror(asy, CE_WARN, "Cannot set device interrupt");
1592 goto fail;
1593 }
1594
1595 asy->asy_progress |= ASY_PROGRESS_INT;
1596
1597 /*
1598 * Initialize mutexes before accessing the hardware
1599 */
1600 mutex_init(&asy->asy_soft_lock, NULL, MUTEX_DRIVER,
1601 DDI_INTR_PRI(asy->asy_soft_intr_pri));
1602 mutex_init(&asy->asy_soft_sr, NULL, MUTEX_DRIVER,
1603 DDI_INTR_PRI(asy->asy_soft_intr_pri));
1604
1605 mutex_init(&asy->asy_excl, NULL, MUTEX_DRIVER, NULL);
1606 mutex_init(&asy->asy_excl_hi, NULL, MUTEX_DRIVER,
1607 DDI_INTR_PRI(asy->asy_intr_pri));
1608
1609 asy->asy_progress |= ASY_PROGRESS_MUTEX;
1610
1611 mutex_enter(&asy->asy_excl);
1612 mutex_enter(&asy->asy_excl_hi);
1613
1614 if (asy_identify_chip(devi, asy) != DDI_SUCCESS) {
1615 asyerror(asy, CE_WARN, "Cannot identify UART chip at %p",
1616 (void *)asy->asy_ioaddr);
1617 goto fail;
1618 }
1619
1620 asy_disable_interrupts(asy, ASY_IER_ALL);
1621 asy_put(asy, ASY_LCR, asy->asy_lcr);
1622 asy_set_baudrate(asy, asy->asy_bidx);
1623 asy_put(asy, ASY_MCR, mcr);
1624
1625 mutex_exit(&asy->asy_excl_hi);
1626 mutex_exit(&asy->asy_excl);
1627
1628 asyinit(asy); /* initialize the asyncline structure */
1629 asy->asy_progress |= ASY_PROGRESS_ASYNC;
1630
1631 /* create minor device nodes for this device */
1632 if (asy->asy_com_port != 0) {
1633 /*
1634 * For DOS COM ports, add letter suffix so
1635 * devfsadm can create correct link names.
1636 */
1637 name[0] = asy->asy_com_port + 'a' - 1;
1638 name[1] = '\0';
1639 } else {
1640 /*
1641 * asy port which isn't a standard DOS COM
1642 * port gets a numeric name based on instance
1643 */
1644 (void) snprintf(name, ASY_MINOR_LEN, "%d", instance);
1645 }
1646 status = ddi_create_minor_node(devi, name, S_IFCHR, instance,
1647 asy->asy_com_port != 0 ? DDI_NT_SERIAL_MB : DDI_NT_SERIAL, 0);
1648 if (status == DDI_SUCCESS) {
1649 (void) strcat(name, ",cu");
1650 status = ddi_create_minor_node(devi, name, S_IFCHR,
1651 OUTLINE | instance,
1652 asy->asy_com_port != 0 ? DDI_NT_SERIAL_MB_DO :
1653 DDI_NT_SERIAL_DO, 0);
1654 }
1655
1656 if (status != DDI_SUCCESS)
1657 goto fail;
1658
1659 asy->asy_progress |= ASY_PROGRESS_MINOR;
1660
1661 /*
1662 * Fill in the polled I/O structure.
1663 */
1664 asy->polledio.cons_polledio_version = CONSPOLLEDIO_V0;
1665 asy->polledio.cons_polledio_argument = (cons_polledio_arg_t)asy;
1666 asy->polledio.cons_polledio_putchar = asyputchar;
1667 asy->polledio.cons_polledio_getchar = asygetchar;
1668 asy->polledio.cons_polledio_ischar = asyischar;
1669 asy->polledio.cons_polledio_enter = NULL;
1670 asy->polledio.cons_polledio_exit = NULL;
1671
1672 ddi_report_dev(devi);
1673 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "done");
1674 return (DDI_SUCCESS);
1675
1676 fail:
1677 (void) asydetach(devi, DDI_DETACH);
1678 return (DDI_FAILURE);
1679 }
1680
1681 /*ARGSUSED*/
1682 static int
asyinfo(dev_info_t * dip,ddi_info_cmd_t infocmd,void * arg,void ** result)1683 asyinfo(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg,
1684 void **result)
1685 {
1686 dev_t dev = (dev_t)arg;
1687 int instance, error;
1688 struct asycom *asy;
1689
1690 instance = UNIT(dev);
1691
1692 switch (infocmd) {
1693 case DDI_INFO_DEVT2DEVINFO:
1694 asy = ddi_get_soft_state(asy_soft_state, instance);
1695 if ((asy == NULL) || (asy->asy_dip == NULL))
1696 error = DDI_FAILURE;
1697 else {
1698 *result = (void *) asy->asy_dip;
1699 error = DDI_SUCCESS;
1700 }
1701 break;
1702 case DDI_INFO_DEVT2INSTANCE:
1703 *result = (void *)(intptr_t)instance;
1704 error = DDI_SUCCESS;
1705 break;
1706 default:
1707 error = DDI_FAILURE;
1708 }
1709 return (error);
1710 }
1711
1712 /* asy_getproperty -- walk through all name variants until we find a match */
1713
1714 static int
asy_getproperty(dev_info_t * devi,struct asycom * asy,const char * property)1715 asy_getproperty(dev_info_t *devi, struct asycom *asy, const char *property)
1716 {
1717 int len;
1718 int ret;
1719 char letter = asy->asy_com_port + 'a' - 1; /* for ttya */
1720 char number = asy->asy_com_port + '0'; /* for COM1 */
1721 char val[40];
1722 char name[40];
1723
1724 /* Property for ignoring DCD */
1725 (void) sprintf(name, "tty%c-%s", letter, property);
1726 len = sizeof (val);
1727 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1728 if (ret != DDI_PROP_SUCCESS) {
1729 (void) sprintf(name, "com%c-%s", number, property);
1730 len = sizeof (val);
1731 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1732 }
1733 if (ret != DDI_PROP_SUCCESS) {
1734 (void) sprintf(name, "tty0%c-%s", number, property);
1735 len = sizeof (val);
1736 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1737 }
1738 if (ret != DDI_PROP_SUCCESS) {
1739 (void) sprintf(name, "port-%c-%s", letter, property);
1740 len = sizeof (val);
1741 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1742 }
1743 if (ret != DDI_PROP_SUCCESS)
1744 return (-1); /* property non-existant */
1745 if (val[0] == 'f' || val[0] == 'F' || val[0] == '0')
1746 return (0); /* property false/0 */
1747 return (1); /* property true/!0 */
1748 }
1749
1750 /* asy_soft_state_free - local wrapper for ddi_soft_state_free(9F) */
1751
1752 static void
asy_soft_state_free(struct asycom * asy)1753 asy_soft_state_free(struct asycom *asy)
1754 {
1755 if (asy->asy_priv != NULL) {
1756 kmem_free(asy->asy_priv, sizeof (struct asyncline));
1757 asy->asy_priv = NULL;
1758 }
1759 ddi_soft_state_free(asy_soft_state, asy->asy_unit);
1760 }
1761
1762 static char *
asy_hw_name(struct asycom * asy)1763 asy_hw_name(struct asycom *asy)
1764 {
1765 switch (asy->asy_hwtype) {
1766 case ASY_8250A:
1767 return ("8250A/16450");
1768 case ASY_16550:
1769 return ("16550");
1770 case ASY_16550A:
1771 return ("16550A");
1772 case ASY_16650:
1773 return ("16650");
1774 case ASY_16750:
1775 return ("16750");
1776 case ASY_16950:
1777 return ("16950");
1778 }
1779
1780 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "unknown asy_hwtype: %d",
1781 asy->asy_hwtype);
1782 return ("?");
1783 }
1784
1785 static boolean_t
asy_is_devid(struct asycom * asy,char * venprop,char * devprop,int venid,int devid)1786 asy_is_devid(struct asycom *asy, char *venprop, char *devprop,
1787 int venid, int devid)
1788 {
1789 int id;
1790
1791 if (ddi_prop_get_int(DDI_DEV_T_ANY, asy->asy_dip, DDI_PROP_DONTPASS,
1792 venprop, 0) != venid) {
1793 return (B_FALSE);
1794 }
1795
1796 if (ddi_prop_get_int(DDI_DEV_T_ANY, asy->asy_dip, DDI_PROP_DONTPASS,
1797 devprop, 0) != devid) {
1798 return (B_FALSE);
1799 }
1800
1801 return (B_FALSE);
1802 }
1803
1804 static void
asy_check_loopback(struct asycom * asy)1805 asy_check_loopback(struct asycom *asy)
1806 {
1807 if (asy_get_bus_type(asy->asy_dip) != ASY_BUS_PCI)
1808 return;
1809
1810 /* Check if this is a Agere/Lucent Venus PCI modem chipset. */
1811 if (asy_is_devid(asy, "vendor-id", "device-id", 0x11c1, 0x0480) ||
1812 asy_is_devid(asy, "subsystem-vendor-id", "subsystem-id", 0x11c1,
1813 0x0480))
1814 asy->asy_flags2 |= ASY2_NO_LOOPBACK;
1815 }
1816
1817 static int
asy_identify_chip(dev_info_t * devi,struct asycom * asy)1818 asy_identify_chip(dev_info_t *devi, struct asycom *asy)
1819 {
1820 int isr, lsr, mcr, spr;
1821 dev_t dev;
1822 uint_t hwtype;
1823
1824 /*
1825 * Initially, we'll assume we have the highest supported chip model
1826 * until we find out what we actually have.
1827 */
1828 asy->asy_hwtype = ASY_MAXCHIP;
1829
1830 /*
1831 * First, see if we can even do the loopback check, which may not work
1832 * on certain hardware.
1833 */
1834 asy_check_loopback(asy);
1835
1836 if (asy_scr_test) {
1837 /* Check that the scratch register works. */
1838
1839 /* write to scratch register */
1840 asy_put(asy, ASY_SPR, ASY_SPR_TEST);
1841 /* make sure that pattern doesn't just linger on the bus */
1842 asy_put(asy, ASY_FCR, 0x00);
1843 /* read data back from scratch register */
1844 spr = asy_get(asy, ASY_SPR);
1845 if (spr != ASY_SPR_TEST) {
1846 /*
1847 * Scratch register not working.
1848 * Probably not an async chip.
1849 * 8250 and 8250B don't have scratch registers,
1850 * but only worked in ancient PC XT's anyway.
1851 */
1852 asyerror(asy, CE_WARN, "UART @ %p "
1853 "scratch register: expected 0x5a, got 0x%02x",
1854 (void *)asy->asy_ioaddr, spr);
1855 return (DDI_FAILURE);
1856 }
1857 }
1858 /*
1859 * Use 16550 fifo reset sequence specified in NS application
1860 * note. Disable fifos until chip is initialized.
1861 */
1862 asy_put(asy, ASY_FCR, 0x00); /* disable */
1863 asy_put(asy, ASY_FCR, ASY_FCR_FIFO_EN); /* enable */
1864 asy_put(asy, ASY_FCR, ASY_FCR_FIFO_EN | ASY_FCR_RHR_FL); /* reset */
1865 if (asymaxchip >= ASY_16650 && asy_scr_test) {
1866 /*
1867 * Reset 16650 enhanced regs also, in case we have one of these
1868 */
1869 asy_put(asy, ASY_EFR, 0);
1870 }
1871
1872 /*
1873 * See what sort of FIFO we have.
1874 * Try enabling it and see what chip makes of this.
1875 */
1876
1877 asy->asy_fifor = 0;
1878 if (asymaxchip >= ASY_16550A)
1879 asy->asy_fifor |=
1880 ASY_FCR_FIFO_EN | ASY_FCR_DMA | (asy_trig_level & 0xff);
1881
1882 /*
1883 * On the 16750, FCR[5] enables the 64 byte FIFO. FCR[5] can only be set
1884 * while LCR[7] = 1 (DLAB), which is taken care of by asy_reset_fifo().
1885 */
1886 if (asymaxchip >= ASY_16750)
1887 asy->asy_fifor |= ASY_FCR_FIFO64;
1888
1889 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
1890
1891 mcr = asy_get(asy, ASY_MCR);
1892 isr = asy_get(asy, ASY_ISR);
1893
1894 /*
1895 * Note we get 0xff if chip didn't return us anything,
1896 * e.g. if there's no chip there.
1897 */
1898 if (isr == 0xff) {
1899 asyerror(asy, CE_WARN, "UART @ %p interrupt register: got 0xff",
1900 (void *)asy->asy_ioaddr);
1901 return (DDI_FAILURE);
1902 }
1903
1904 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
1905 "probe fifo FIFOR=0x%02x ISR=0x%02x MCR=0x%02x",
1906 asy->asy_fifor | ASY_FCR_THR_FL | ASY_FCR_RHR_FL, isr, mcr);
1907
1908 /*
1909 * Detect the chip type by comparing ISR[7,6] and ISR[5].
1910 *
1911 * When the FIFOs are enabled by setting FCR[0], ISR[7,6] read as 1.
1912 * Additionally on a 16750, the 64 byte FIFOs are enabled by setting
1913 * FCR[5], and ISR[5] will read as 1, too.
1914 *
1915 * We will check later whether we have a 16650, which requires EFR[4]=1
1916 * to enable its deeper FIFOs and extra features. It does not use FCR[5]
1917 * and ISR[5] to enable deeper FIFOs like the 16750 does.
1918 */
1919 switch (isr & (ASY_ISR_FIFOEN | ASY_ISR_FIFO64)) {
1920 case 0x40: /* 16550 with broken FIFOs */
1921 hwtype = ASY_16550;
1922 asy->asy_fifor = 0;
1923 break;
1924
1925 case ASY_ISR_FIFOEN: /* 16550A with working FIFOs */
1926 hwtype = ASY_16550A;
1927 asy->asy_fifo_buf = 16;
1928 asy->asy_use_fifo = ASY_FCR_FIFO_EN;
1929 asy->asy_fifor &= ~ASY_FCR_FIFO64;
1930 break;
1931
1932 case ASY_ISR_FIFOEN | ASY_ISR_FIFO64: /* 16750 with 64byte FIFOs */
1933 hwtype = ASY_16750;
1934 asy->asy_fifo_buf = 64;
1935 asy->asy_use_fifo = ASY_FCR_FIFO_EN;
1936 break;
1937
1938 default: /* 8250A/16450 without FIFOs */
1939 hwtype = ASY_8250A;
1940 asy->asy_fifor = 0;
1941 }
1942
1943 if (hwtype > asymaxchip) {
1944 asyerror(asy, CE_WARN, "UART @ %p "
1945 "unexpected probe result: "
1946 "FCR=0x%02x ISR=0x%02x MCR=0x%02x",
1947 (void *)asy->asy_ioaddr,
1948 asy->asy_fifor | ASY_FCR_THR_FL | ASY_FCR_RHR_FL, isr, mcr);
1949 return (DDI_FAILURE);
1950 }
1951
1952 /*
1953 * Now reset the FIFO operation appropriate for the chip type.
1954 * Note we must call asy_reset_fifo() before any possible
1955 * downgrade of the asy->asy_hwtype, or it may not disable
1956 * the more advanced features we specifically want downgraded.
1957 */
1958 asy_reset_fifo(asy, 0);
1959
1960 /*
1961 * Check for Exar/Startech ST16C650 or newer, which will still look like
1962 * a 16550A until we enable its enhanced mode.
1963 */
1964 if (hwtype >= ASY_16550A && asymaxchip >= ASY_16650 &&
1965 asy_scr_test) {
1966 /*
1967 * Write the XOFF2 register, which shadows SPR on the 16650.
1968 * On other chips, SPR will be overwritten.
1969 */
1970 asy_put(asy, ASY_XOFF2, 0);
1971
1972 /* read back scratch register */
1973 spr = asy_get(asy, ASY_SPR);
1974
1975 if (spr == ASY_SPR_TEST) {
1976 /* looks like we have an ST16650 -- enable it */
1977 hwtype = ASY_16650;
1978 asy_put(asy, ASY_EFR, ASY_EFR_ENH_EN);
1979
1980 /*
1981 * Some 16650-compatible chips are also compatible with
1982 * the 16750 and have deeper FIFOs, which we may have
1983 * detected above. Don't downgrade the FIFO size.
1984 */
1985 if (asy->asy_fifo_buf < 32)
1986 asy->asy_fifo_buf = 32;
1987
1988 /*
1989 * Use a 24 byte transmit FIFO trigger only if were
1990 * allowed to use >16 transmit FIFO depth by the
1991 * global tunable.
1992 */
1993 if (asy_max_tx_fifo >= asy->asy_fifo_buf)
1994 asy->asy_fifor |= ASY_FCR_THR_TRIG_24;
1995 asy_reset_fifo(asy, 0);
1996 }
1997 }
1998
1999 /*
2000 * If we think we got a 16650, we may actually have a 16950, so check
2001 * for that.
2002 */
2003 if (hwtype >= ASY_16650 && asymaxchip >= ASY_16950) {
2004 uint8_t ier, asr;
2005
2006 /*
2007 * First, clear IER and read it back. That should be a no-op as
2008 * either asyattach() or asy_resume() disabled all interrupts
2009 * before we were called.
2010 */
2011 asy_put(asy, ASY_IER, 0);
2012 ier = asy_get(asy, ASY_IER);
2013 if (ier != 0) {
2014 dev_err(asy->asy_dip, CE_WARN, "!%s: UART @ %p "
2015 "interrupt enable register: got 0x%02x", __func__,
2016 (void *)asy->asy_ioaddr, ier);
2017 return (DDI_FAILURE);
2018 }
2019
2020 /*
2021 * Next, try to read ASR, which shares the register offset with
2022 * IER. ASR can only be read if the ASR enable bit is set in
2023 * ACR, which itself is an indexed registers. This is taken care
2024 * of by asy_get().
2025 *
2026 * There are a few bits in ASR which should be 1 at this point,
2027 * definitely the TX idle bit (ASR[7]) and also the FIFO size
2028 * bit (ASR[6]) since we've done everything we can to enable any
2029 * deeper FIFO support.
2030 *
2031 * Thus if we read back ASR as 0, we failed to read it, and this
2032 * isn't the chip we're looking for.
2033 */
2034 asr = asy_get(asy, ASY_ASR);
2035
2036 if (asr != ier) {
2037 hwtype = ASY_16950;
2038
2039 if ((asr & ASY_ASR_FIFOSZ) != 0)
2040 asy->asy_fifo_buf = 128;
2041 else
2042 asy->asy_fifo_buf = 16;
2043
2044 asy_reset_fifo(asy, 0);
2045
2046 /*
2047 * Enable 16950 specific trigger level registers. Set
2048 * DTR pin to be compatible to 16450, 16550, and 16750.
2049 */
2050 asy->asy_acr = ASY_ACR_TRIG | ASY_ACR_DTR_NORM;
2051 asy_put(asy, ASY_ACR, asy->asy_acr);
2052
2053 /* Set half the FIFO size as receive trigger level. */
2054 asy_put(asy, ASY_RTL, asy->asy_fifo_buf/2);
2055
2056 /*
2057 * Set the transmit trigger level to 1.
2058 *
2059 * While one would expect that any transmit trigger
2060 * level would work (the 16550 uses a hardwired level
2061 * of 16), in my tests with a 16950 compatible chip
2062 * (MosChip 9912) I would never see a TX interrupt
2063 * on any transmit trigger level > 1.
2064 */
2065 asy_put(asy, ASY_TTL, 1);
2066
2067 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "ASR 0x%02x", asr);
2068 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "RFL 0x%02x",
2069 asy_get(asy, ASY_RFL));
2070 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TFL 0x%02x",
2071 asy_get(asy, ASY_TFL));
2072
2073 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "ACR 0x%02x",
2074 asy_get(asy, ASY_ACR));
2075 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "CPR 0x%02x",
2076 asy_get(asy, ASY_CPR));
2077 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TCR 0x%02x",
2078 asy_get(asy, ASY_TCR));
2079 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "CKS 0x%02x",
2080 asy_get(asy, ASY_CKS));
2081 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TTL 0x%02x",
2082 asy_get(asy, ASY_TTL));
2083 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "RTL 0x%02x",
2084 asy_get(asy, ASY_RTL));
2085 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "FCL 0x%02x",
2086 asy_get(asy, ASY_FCL));
2087 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "FCH 0x%02x",
2088 asy_get(asy, ASY_FCH));
2089
2090 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
2091 "Chip ID: %02x%02x%02x,%02x",
2092 asy_get(asy, ASY_ID1), asy_get(asy, ASY_ID2),
2093 asy_get(asy, ASY_ID3), asy_get(asy, ASY_REV));
2094
2095 }
2096 }
2097
2098 asy->asy_hwtype = hwtype;
2099
2100 /*
2101 * If we think we might have a FIFO larger than 16 characters,
2102 * measure FIFO size and check it against expected.
2103 */
2104 if (asy_fifo_test > 0 &&
2105 !(asy->asy_flags2 & ASY2_NO_LOOPBACK) &&
2106 (asy->asy_fifo_buf > 16 ||
2107 (asy_fifo_test > 1 && asy->asy_use_fifo == ASY_FCR_FIFO_EN) ||
2108 ASY_DEBUG(asy, ASY_DEBUG_CHIP))) {
2109 int i;
2110
2111 /* Set baud rate to 57600 (fairly arbitrary choice) */
2112 asy_set_baudrate(asy, B57600);
2113 /* Set 8 bits, 1 stop bit */
2114 asy_put(asy, ASY_LCR, ASY_LCR_STOP1 | ASY_LCR_BITS8);
2115 /* Set loopback mode */
2116 asy_put(asy, ASY_MCR, ASY_MCR_LOOPBACK);
2117
2118 /* Overfill fifo */
2119 for (i = 0; i < asy->asy_fifo_buf * 2; i++) {
2120 asy_put(asy, ASY_THR, i);
2121 }
2122 /*
2123 * Now there's an interesting question here about which
2124 * FIFO we're testing the size of, RX or TX. We just
2125 * filled the TX FIFO much faster than it can empty,
2126 * although it is possible one or two characters may
2127 * have gone from it to the TX shift register.
2128 * We wait for enough time for all the characters to
2129 * move into the RX FIFO and any excess characters to
2130 * have been lost, and then read all the RX FIFO. So
2131 * the answer we finally get will be the size which is
2132 * the MIN(RX FIFO,(TX FIFO + 1 or 2)). The critical
2133 * one is actually the TX FIFO, because if we overfill
2134 * it in normal operation, the excess characters are
2135 * lost with no warning.
2136 */
2137 /*
2138 * Wait for characters to move into RX FIFO.
2139 * In theory, 200 * asy->asy_fifo_buf * 2 should be
2140 * enough. However, in practice it isn't always, so we
2141 * increase to 400 so some slow 16550A's finish, and we
2142 * increase to 3 so we spot more characters coming back
2143 * than we sent, in case that should ever happen.
2144 */
2145 delay(drv_usectohz(400 * asy->asy_fifo_buf * 3));
2146
2147 /* Now see how many characters we can read back */
2148 for (i = 0; i < asy->asy_fifo_buf * 3; i++) {
2149 lsr = asy_get(asy, ASY_LSR);
2150 if (!(lsr & ASY_LSR_DR))
2151 break; /* FIFO emptied */
2152 (void) asy_get(asy, ASY_RHR); /* lose another */
2153 }
2154
2155 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
2156 "FIFO size: expected=%d, measured=%d",
2157 asy->asy_fifo_buf, i);
2158
2159 hwtype = asy->asy_hwtype;
2160 if (i < asy->asy_fifo_buf) {
2161 /*
2162 * FIFO is somewhat smaller than we anticipated.
2163 * If we have 16 characters usable, then this
2164 * UART will probably work well enough in
2165 * 16550A mode. If less than 16 characters,
2166 * then we'd better not use it at all.
2167 * UARTs with busted FIFOs do crop up.
2168 */
2169 if (i >= 16 && asy->asy_fifo_buf >= 16) {
2170 /* fall back to a 16550A */
2171 hwtype = ASY_16550A;
2172 asy->asy_fifo_buf = 16;
2173 asy->asy_fifor &=
2174 ~(ASY_FCR_THR_TR0 | ASY_FCR_THR_TR1);
2175 } else {
2176 /* fall back to no FIFO at all */
2177 hwtype = ASY_16550;
2178 asy->asy_fifo_buf = 1;
2179 asy->asy_use_fifo = ASY_FCR_FIFO_OFF;
2180 asy->asy_fifor = 0;
2181 }
2182 } else if (i > asy->asy_fifo_buf) {
2183 /*
2184 * The FIFO is larger than expected. Use it if it is
2185 * a power of 2.
2186 */
2187 if (ISP2(i))
2188 asy->asy_fifo_buf = i;
2189 }
2190
2191 /*
2192 * We will need to reprogram the FIFO if we changed
2193 * our mind about how to drive it above, and in any
2194 * case, it would be a good idea to flush any garbage
2195 * out incase the loopback test left anything behind.
2196 * Again as earlier above, we must call asy_reset_fifo()
2197 * before any possible downgrade of asy->asy_hwtype.
2198 */
2199 if (asy->asy_hwtype >= ASY_16650 && hwtype < ASY_16650) {
2200 /* Disable 16650 enhanced mode */
2201 asy_put(asy, ASY_EFR, 0);
2202 }
2203 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
2204 asy->asy_hwtype = hwtype;
2205
2206 /* Clear loopback mode and restore DTR/RTS */
2207 asy_put(asy, ASY_MCR, mcr);
2208 }
2209
2210 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "%s @ %p",
2211 asy_hw_name(asy), (void *)asy->asy_ioaddr);
2212
2213 /* Make UART type visible in device tree for prtconf, etc */
2214 dev = makedevice(DDI_MAJOR_T_UNKNOWN, asy->asy_unit);
2215 (void) ddi_prop_update_string(dev, devi, "uart", asy_hw_name(asy));
2216
2217 if (asy->asy_hwtype == ASY_16550) /* for broken 16550's, */
2218 asy->asy_hwtype = ASY_8250A; /* drive them as 8250A */
2219
2220 return (DDI_SUCCESS);
2221 }
2222
2223 /*
2224 * asyinit() initializes the TTY protocol-private data for this channel
2225 * before enabling the interrupts.
2226 */
2227 static void
asyinit(struct asycom * asy)2228 asyinit(struct asycom *asy)
2229 {
2230 struct asyncline *async;
2231
2232 asy->asy_priv = kmem_zalloc(sizeof (struct asyncline), KM_SLEEP);
2233 async = asy->asy_priv;
2234 mutex_enter(&asy->asy_excl);
2235 async->async_common = asy;
2236 cv_init(&async->async_flags_cv, NULL, CV_DRIVER, NULL);
2237 mutex_exit(&asy->asy_excl);
2238 }
2239
2240 /*ARGSUSED3*/
2241 static int
asyopen(queue_t * rq,dev_t * dev,int flag,int sflag,cred_t * cr)2242 asyopen(queue_t *rq, dev_t *dev, int flag, int sflag, cred_t *cr)
2243 {
2244 struct asycom *asy;
2245 struct asyncline *async;
2246 int mcr;
2247 int unit;
2248 int len;
2249 struct termios *termiosp;
2250
2251 unit = UNIT(*dev);
2252 asy = ddi_get_soft_state(asy_soft_state, unit);
2253 if (asy == NULL)
2254 return (ENXIO); /* unit not configured */
2255 ASY_DPRINTF(asy, ASY_DEBUG_CLOSE, "enter");
2256 async = asy->asy_priv;
2257 mutex_enter(&asy->asy_excl);
2258
2259 again:
2260 mutex_enter(&asy->asy_excl_hi);
2261
2262 /*
2263 * Block waiting for carrier to come up, unless this is a no-delay open.
2264 */
2265 if (!(async->async_flags & ASYNC_ISOPEN)) {
2266 /*
2267 * Set the default termios settings (cflag).
2268 * Others are set in ldterm.
2269 */
2270 mutex_exit(&asy->asy_excl_hi);
2271
2272 if (ddi_getlongprop(DDI_DEV_T_ANY, ddi_root_node(),
2273 0, "ttymodes",
2274 (caddr_t)&termiosp, &len) == DDI_PROP_SUCCESS &&
2275 len == sizeof (struct termios)) {
2276 async->async_ttycommon.t_cflag = termiosp->c_cflag;
2277 kmem_free(termiosp, len);
2278 } else {
2279 asyerror(asy, CE_WARN,
2280 "couldn't get ttymodes property");
2281 }
2282 mutex_enter(&asy->asy_excl_hi);
2283
2284 /* eeprom mode support - respect properties */
2285 if (asy->asy_cflag)
2286 async->async_ttycommon.t_cflag = asy->asy_cflag;
2287
2288 async->async_ttycommon.t_iflag = 0;
2289 async->async_ttycommon.t_iocpending = NULL;
2290 async->async_ttycommon.t_size.ws_row = 0;
2291 async->async_ttycommon.t_size.ws_col = 0;
2292 async->async_ttycommon.t_size.ws_xpixel = 0;
2293 async->async_ttycommon.t_size.ws_ypixel = 0;
2294 async->async_dev = *dev;
2295 async->async_wbufcid = 0;
2296
2297 async->async_startc = CSTART;
2298 async->async_stopc = CSTOP;
2299 asy_program(asy, ASY_INIT);
2300 } else if ((async->async_ttycommon.t_flags & TS_XCLUDE) &&
2301 secpolicy_excl_open(cr) != 0) {
2302 mutex_exit(&asy->asy_excl_hi);
2303 mutex_exit(&asy->asy_excl);
2304 return (EBUSY);
2305 } else if ((*dev & OUTLINE) && !(async->async_flags & ASYNC_OUT)) {
2306 mutex_exit(&asy->asy_excl_hi);
2307 mutex_exit(&asy->asy_excl);
2308 return (EBUSY);
2309 }
2310
2311 if (*dev & OUTLINE)
2312 async->async_flags |= ASYNC_OUT;
2313
2314 /* Raise DTR on every open, but delay if it was just lowered. */
2315 while (async->async_flags & ASYNC_DTR_DELAY) {
2316 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2317 "waiting for the ASYNC_DTR_DELAY to be clear");
2318 mutex_exit(&asy->asy_excl_hi);
2319 if (cv_wait_sig(&async->async_flags_cv,
2320 &asy->asy_excl) == 0) {
2321 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2322 "interrupted by signal, exiting");
2323 mutex_exit(&asy->asy_excl);
2324 return (EINTR);
2325 }
2326 mutex_enter(&asy->asy_excl_hi);
2327 }
2328
2329 asy_set(asy, ASY_MCR, asy->asy_mcr & ASY_MCR_DTR);
2330
2331 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "\"Raise DTR on every open\": "
2332 "make mcr = %x, make TS_SOFTCAR = %s", asy_get(asy, ASY_MCR),
2333 (asy->asy_flags & ASY_IGNORE_CD) ? "ON" : "OFF");
2334
2335 if (asy->asy_flags & ASY_IGNORE_CD) {
2336 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2337 "ASY_IGNORE_CD set, set TS_SOFTCAR");
2338 async->async_ttycommon.t_flags |= TS_SOFTCAR;
2339 }
2340 else
2341 async->async_ttycommon.t_flags &= ~TS_SOFTCAR;
2342
2343 /*
2344 * Check carrier.
2345 */
2346 asy->asy_msr = asy_get(asy, ASY_MSR);
2347 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "TS_SOFTCAR is %s, MSR & DCD is %s",
2348 (async->async_ttycommon.t_flags & TS_SOFTCAR) ? "set" : "clear",
2349 (asy->asy_msr & ASY_MSR_DCD) ? "set" : "clear");
2350
2351 if (asy->asy_msr & ASY_MSR_DCD)
2352 async->async_flags |= ASYNC_CARR_ON;
2353 else
2354 async->async_flags &= ~ASYNC_CARR_ON;
2355 mutex_exit(&asy->asy_excl_hi);
2356
2357 /*
2358 * If FNDELAY and FNONBLOCK are clear, block until carrier up.
2359 * Quit on interrupt.
2360 */
2361 if (!(flag & (FNDELAY|FNONBLOCK)) &&
2362 !(async->async_ttycommon.t_cflag & CLOCAL)) {
2363 if ((!(async->async_flags & (ASYNC_CARR_ON|ASYNC_OUT)) &&
2364 !(async->async_ttycommon.t_flags & TS_SOFTCAR)) ||
2365 ((async->async_flags & ASYNC_OUT) &&
2366 !(*dev & OUTLINE))) {
2367 async->async_flags |= ASYNC_WOPEN;
2368 if (cv_wait_sig(&async->async_flags_cv,
2369 &asy->asy_excl) == B_FALSE) {
2370 async->async_flags &= ~ASYNC_WOPEN;
2371 mutex_exit(&asy->asy_excl);
2372 return (EINTR);
2373 }
2374 async->async_flags &= ~ASYNC_WOPEN;
2375 goto again;
2376 }
2377 } else if ((async->async_flags & ASYNC_OUT) && !(*dev & OUTLINE)) {
2378 mutex_exit(&asy->asy_excl);
2379 return (EBUSY);
2380 }
2381
2382 async->async_ttycommon.t_readq = rq;
2383 async->async_ttycommon.t_writeq = WR(rq);
2384 rq->q_ptr = WR(rq)->q_ptr = (caddr_t)async;
2385 mutex_exit(&asy->asy_excl);
2386 /*
2387 * Caution here -- qprocson sets the pointers that are used by canput
2388 * called by async_softint. ASYNC_ISOPEN must *not* be set until those
2389 * pointers are valid.
2390 */
2391 qprocson(rq);
2392 async->async_flags |= ASYNC_ISOPEN;
2393 async->async_polltid = 0;
2394 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "done");
2395 return (0);
2396 }
2397
2398 static void
async_progress_check(void * arg)2399 async_progress_check(void *arg)
2400 {
2401 struct asyncline *async = arg;
2402 struct asycom *asy = async->async_common;
2403 mblk_t *bp;
2404
2405 /*
2406 * We define "progress" as either waiting on a timed break or delay, or
2407 * having had at least one transmitter interrupt. If none of these are
2408 * true, then just terminate the output and wake up that close thread.
2409 */
2410 mutex_enter(&asy->asy_excl);
2411 mutex_enter(&asy->asy_excl_hi);
2412 if (!(async->async_flags & (ASYNC_BREAK|ASYNC_DELAY|ASYNC_PROGRESS))) {
2413 async->async_ocnt = 0;
2414 async->async_flags &= ~ASYNC_BUSY;
2415 async->async_timer = 0;
2416 bp = async->async_xmitblk;
2417 async->async_xmitblk = NULL;
2418 mutex_exit(&asy->asy_excl_hi);
2419 if (bp != NULL)
2420 freeb(bp);
2421 /*
2422 * Since this timer is running, we know that we're in exit(2).
2423 * That means that the user can't possibly be waiting on any
2424 * valid ioctl(2) completion anymore, and we should just flush
2425 * everything.
2426 */
2427 flushq(async->async_ttycommon.t_writeq, FLUSHALL);
2428 cv_broadcast(&async->async_flags_cv);
2429 } else {
2430 async->async_flags &= ~ASYNC_PROGRESS;
2431 async->async_timer = timeout(async_progress_check, async,
2432 drv_usectohz(asy_drain_check));
2433 mutex_exit(&asy->asy_excl_hi);
2434 }
2435 mutex_exit(&asy->asy_excl);
2436 }
2437
2438 /*
2439 * Release DTR so that asyopen() can raise it.
2440 */
2441 static void
async_dtr_free(struct asyncline * async)2442 async_dtr_free(struct asyncline *async)
2443 {
2444 struct asycom *asy = async->async_common;
2445
2446 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2447 "async_dtr_free, clearing ASYNC_DTR_DELAY");
2448 mutex_enter(&asy->asy_excl);
2449 async->async_flags &= ~ASYNC_DTR_DELAY;
2450 async->async_dtrtid = 0;
2451 cv_broadcast(&async->async_flags_cv);
2452 mutex_exit(&asy->asy_excl);
2453 }
2454
2455 /*
2456 * Close routine.
2457 */
2458 /*ARGSUSED2*/
2459 static int
asyclose(queue_t * q,int flag,cred_t * credp)2460 asyclose(queue_t *q, int flag, cred_t *credp)
2461 {
2462 struct asyncline *async;
2463 struct asycom *asy;
2464 int ier, lcr;
2465
2466 async = (struct asyncline *)q->q_ptr;
2467 ASSERT(async != NULL);
2468
2469 asy = async->async_common;
2470
2471 ASY_DPRINTF(asy, ASY_DEBUG_CLOSE, "enter");
2472
2473 mutex_enter(&asy->asy_excl);
2474 async->async_flags |= ASYNC_CLOSING;
2475
2476 /*
2477 * Turn off PPS handling early to avoid events occuring during
2478 * close. Also reset the DCD edge monitoring bit.
2479 */
2480 mutex_enter(&asy->asy_excl_hi);
2481 asy->asy_flags &= ~(ASY_PPS | ASY_PPS_EDGE);
2482 mutex_exit(&asy->asy_excl_hi);
2483
2484 /*
2485 * There are two flavors of break -- timed (M_BREAK or TCSBRK) and
2486 * untimed (TIOCSBRK). For the timed case, these are enqueued on our
2487 * write queue and there's a timer running, so we don't have to worry
2488 * about them. For the untimed case, though, the user obviously made a
2489 * mistake, because these are handled immediately. We'll terminate the
2490 * break now and honor their implicit request by discarding the rest of
2491 * the data.
2492 */
2493 if (async->async_flags & ASYNC_OUT_SUSPEND) {
2494 if (async->async_utbrktid != 0) {
2495 (void) untimeout(async->async_utbrktid);
2496 async->async_utbrktid = 0;
2497 }
2498 mutex_enter(&asy->asy_excl_hi);
2499 (void) asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
2500 mutex_exit(&asy->asy_excl_hi);
2501 async->async_flags &= ~ASYNC_OUT_SUSPEND;
2502 goto nodrain;
2503 }
2504
2505 /*
2506 * If the user told us not to delay the close ("non-blocking"), then
2507 * don't bother trying to drain.
2508 *
2509 * If the user did M_STOP (ASYNC_STOPPED), there's no hope of ever
2510 * getting an M_START (since these messages aren't enqueued), and the
2511 * only other way to clear the stop condition is by loss of DCD, which
2512 * would discard the queue data. Thus, we drop the output data if
2513 * ASYNC_STOPPED is set.
2514 */
2515 if ((flag & (FNDELAY|FNONBLOCK)) ||
2516 (async->async_flags & ASYNC_STOPPED)) {
2517 goto nodrain;
2518 }
2519
2520 /*
2521 * If there's any pending output, then we have to try to drain it.
2522 * There are two main cases to be handled:
2523 * - called by close(2): need to drain until done or until
2524 * a signal is received. No timeout.
2525 * - called by exit(2): need to drain while making progress
2526 * or until a timeout occurs. No signals.
2527 *
2528 * If we can't rely on receiving a signal to get us out of a hung
2529 * session, then we have to use a timer. In this case, we set a timer
2530 * to check for progress in sending the output data -- all that we ask
2531 * (at each interval) is that there's been some progress made. Since
2532 * the interrupt routine grabs buffers from the write queue, we can't
2533 * trust changes in async_ocnt. Instead, we use a progress flag.
2534 *
2535 * Note that loss of carrier will cause the output queue to be flushed,
2536 * and we'll wake up again and finish normally.
2537 */
2538 if (!ddi_can_receive_sig() && asy_drain_check != 0) {
2539 async->async_flags &= ~ASYNC_PROGRESS;
2540 async->async_timer = timeout(async_progress_check, async,
2541 drv_usectohz(asy_drain_check));
2542 }
2543 while (async->async_ocnt > 0 ||
2544 async->async_ttycommon.t_writeq->q_first != NULL ||
2545 (async->async_flags & (ASYNC_BUSY|ASYNC_BREAK|ASYNC_DELAY))) {
2546 if (cv_wait_sig(&async->async_flags_cv, &asy->asy_excl) == 0)
2547 break;
2548 }
2549 if (async->async_timer != 0) {
2550 (void) untimeout(async->async_timer);
2551 async->async_timer = 0;
2552 }
2553
2554 nodrain:
2555 async->async_ocnt = 0;
2556 if (async->async_xmitblk != NULL)
2557 freeb(async->async_xmitblk);
2558 async->async_xmitblk = NULL;
2559
2560 /*
2561 * If line has HUPCL set or is incompletely opened fix up the modem
2562 * lines.
2563 */
2564 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "next check HUPCL flag");
2565 mutex_enter(&asy->asy_excl_hi);
2566 if ((async->async_ttycommon.t_cflag & HUPCL) ||
2567 (async->async_flags & ASYNC_WOPEN)) {
2568 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2569 "HUPCL flag = %x, ASYNC_WOPEN flag = %x",
2570 async->async_ttycommon.t_cflag & HUPCL,
2571 async->async_ttycommon.t_cflag & ASYNC_WOPEN);
2572 async->async_flags |= ASYNC_DTR_DELAY;
2573
2574 /* turn off DTR, RTS but NOT interrupt to 386 */
2575 if (asy->asy_flags & (ASY_IGNORE_CD|ASY_RTS_DTR_OFF)) {
2576 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2577 "ASY_IGNORE_CD flag = %x, "
2578 "ASY_RTS_DTR_OFF flag = %x",
2579 asy->asy_flags & ASY_IGNORE_CD,
2580 asy->asy_flags & ASY_RTS_DTR_OFF);
2581
2582 asy_put(asy, ASY_MCR, asy->asy_mcr | ASY_MCR_OUT2);
2583 } else {
2584 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2585 "Dropping DTR and RTS");
2586 asy_put(asy, ASY_MCR, ASY_MCR_OUT2);
2587 }
2588 async->async_dtrtid =
2589 timeout((void (*)())async_dtr_free,
2590 (caddr_t)async, drv_usectohz(asy_min_dtr_low));
2591 }
2592 /*
2593 * If nobody's using it now, turn off receiver interrupts.
2594 */
2595 if ((async->async_flags & (ASYNC_WOPEN|ASYNC_ISOPEN)) == 0)
2596 asy_disable_interrupts(asy, ASY_IER_RIEN);
2597
2598 mutex_exit(&asy->asy_excl_hi);
2599 out:
2600 ttycommon_close(&async->async_ttycommon);
2601
2602 /*
2603 * Cancel outstanding "bufcall" request.
2604 */
2605 if (async->async_wbufcid != 0) {
2606 unbufcall(async->async_wbufcid);
2607 async->async_wbufcid = 0;
2608 }
2609
2610 /* Note that qprocsoff can't be done until after interrupts are off */
2611 qprocsoff(q);
2612 q->q_ptr = WR(q)->q_ptr = NULL;
2613 async->async_ttycommon.t_readq = NULL;
2614 async->async_ttycommon.t_writeq = NULL;
2615
2616 /*
2617 * Clear out device state, except persistant device property flags.
2618 */
2619 async->async_flags &= (ASYNC_DTR_DELAY|ASY_RTS_DTR_OFF);
2620 cv_broadcast(&async->async_flags_cv);
2621 mutex_exit(&asy->asy_excl);
2622
2623 ASY_DPRINTF(asy, ASY_DEBUG_CLOSE, "done");
2624 return (0);
2625 }
2626
2627 static boolean_t
asy_isbusy(struct asycom * asy)2628 asy_isbusy(struct asycom *asy)
2629 {
2630 struct asyncline *async;
2631
2632 ASY_DPRINTF(asy, ASY_DEBUG_EOT, "enter");
2633 async = asy->asy_priv;
2634 ASSERT(mutex_owned(&asy->asy_excl));
2635 ASSERT(mutex_owned(&asy->asy_excl_hi));
2636 /*
2637 * XXXX this should be recoded
2638 */
2639 return ((async->async_ocnt > 0) ||
2640 ((asy_get(asy, ASY_LSR) & (ASY_LSR_TEMT | ASY_LSR_THRE)) == 0));
2641 }
2642
2643 static void
asy_waiteot(struct asycom * asy)2644 asy_waiteot(struct asycom *asy)
2645 {
2646 /*
2647 * Wait for the current transmission block and the
2648 * current fifo data to transmit. Once this is done
2649 * we may go on.
2650 */
2651 ASY_DPRINTF(asy, ASY_DEBUG_EOT, "enter");
2652 ASSERT(mutex_owned(&asy->asy_excl));
2653 ASSERT(mutex_owned(&asy->asy_excl_hi));
2654 while (asy_isbusy(asy)) {
2655 mutex_exit(&asy->asy_excl_hi);
2656 mutex_exit(&asy->asy_excl);
2657 drv_usecwait(10000); /* wait .01 */
2658 mutex_enter(&asy->asy_excl);
2659 mutex_enter(&asy->asy_excl_hi);
2660 }
2661 }
2662
2663 /* asy_reset_fifo -- flush fifos and [re]program fifo control register */
2664 static void
asy_reset_fifo(struct asycom * asy,uchar_t flush)2665 asy_reset_fifo(struct asycom *asy, uchar_t flush)
2666 {
2667 uchar_t lcr = 0;
2668
2669 ASSERT(mutex_owned(&asy->asy_excl_hi));
2670
2671 /* On a 16750, we have to set DLAB in order to set ASY_FCR_FIFO64. */
2672 if (asy->asy_hwtype >= ASY_16750)
2673 asy_set(asy, ASY_LCR, ASY_LCR_DLAB);
2674
2675 asy_put(asy, ASY_FCR, asy->asy_fifor | flush);
2676
2677 /* Clear DLAB */
2678 if (asy->asy_hwtype >= ASY_16750)
2679 asy_clr(asy, ASY_LCR, ASY_LCR_DLAB);
2680 }
2681
2682 /*
2683 * Program the ASY port. Most of the async operation is based on the values
2684 * of 'c_iflag' and 'c_cflag'.
2685 */
2686 static void
asy_program(struct asycom * asy,int mode)2687 asy_program(struct asycom *asy, int mode)
2688 {
2689 struct asyncline *async;
2690 int baudrate, c_flag;
2691 uint8_t ier;
2692 int flush_reg;
2693 int ocflags;
2694
2695 ASSERT(mutex_owned(&asy->asy_excl));
2696 ASSERT(mutex_owned(&asy->asy_excl_hi));
2697
2698 async = asy->asy_priv;
2699 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "mode = 0x%08X, enter", mode);
2700
2701 baudrate = BAUDINDEX(async->async_ttycommon.t_cflag);
2702
2703 async->async_ttycommon.t_cflag &= ~(CIBAUD);
2704
2705 if (baudrate > CBAUD) {
2706 async->async_ttycommon.t_cflag |= CIBAUDEXT;
2707 async->async_ttycommon.t_cflag |=
2708 (((baudrate - CBAUD - 1) << IBSHIFT) & CIBAUD);
2709 } else {
2710 async->async_ttycommon.t_cflag &= ~CIBAUDEXT;
2711 async->async_ttycommon.t_cflag |=
2712 ((baudrate << IBSHIFT) & CIBAUD);
2713 }
2714
2715 c_flag = async->async_ttycommon.t_cflag &
2716 (CLOCAL|CREAD|CSTOPB|CSIZE|PARENB|PARODD|CBAUD|CBAUDEXT);
2717
2718 asy_disable_interrupts(asy, ASY_IER_ALL);
2719
2720 ocflags = asy->asy_ocflag;
2721
2722 /* flush/reset the status registers */
2723 (void) asy_get(asy, ASY_ISR);
2724 (void) asy_get(asy, ASY_LSR);
2725 asy->asy_msr = flush_reg = asy_get(asy, ASY_MSR);
2726 /*
2727 * The device is programmed in the open sequence, if we
2728 * have to hardware handshake, then this is a good time
2729 * to check if the device can receive any data.
2730 */
2731
2732 if ((CRTSCTS & async->async_ttycommon.t_cflag) &&
2733 !(flush_reg & ASY_MSR_CTS)) {
2734 async_flowcontrol_hw_output(asy, FLOW_STOP);
2735 } else {
2736 /*
2737 * We can not use async_flowcontrol_hw_output(asy, FLOW_START)
2738 * here, because if CRTSCTS is clear, we need clear
2739 * ASYNC_HW_OUT_FLW bit.
2740 */
2741 async->async_flags &= ~ASYNC_HW_OUT_FLW;
2742 }
2743
2744 /*
2745 * If IXON is not set, clear ASYNC_SW_OUT_FLW;
2746 * If IXON is set, no matter what IXON flag is before this
2747 * function call to asy_program,
2748 * we will use the old ASYNC_SW_OUT_FLW status.
2749 * Because of handling IXON in the driver, we also should re-calculate
2750 * the value of ASYNC_OUT_FLW_RESUME bit, but in fact,
2751 * the TCSET* commands which call asy_program
2752 * are put into the write queue, so there is no output needed to
2753 * be resumed at this point.
2754 */
2755 if (!(IXON & async->async_ttycommon.t_iflag))
2756 async->async_flags &= ~ASYNC_SW_OUT_FLW;
2757
2758 /* manually flush receive buffer or fifo (workaround for buggy fifos) */
2759 if (mode == ASY_INIT)
2760 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
2761 for (flush_reg = asy->asy_fifo_buf; flush_reg-- > 0; ) {
2762 (void) asy_get(asy, ASY_RHR);
2763 }
2764 } else {
2765 flush_reg = asy_get(asy, ASY_RHR);
2766 }
2767
2768 if (ocflags != (c_flag & ~CLOCAL) || mode == ASY_INIT) {
2769 /* Set line control */
2770 uint8_t lcr = 0;
2771
2772 if (c_flag & CSTOPB)
2773 lcr |= ASY_LCR_STOP2; /* 2 stop bits */
2774
2775 if (c_flag & PARENB)
2776 lcr |= ASY_LCR_PEN;
2777
2778 if ((c_flag & PARODD) == 0)
2779 lcr |= ASY_LCR_EPS;
2780
2781 switch (c_flag & CSIZE) {
2782 case CS5:
2783 lcr |= ASY_LCR_BITS5;
2784 break;
2785 case CS6:
2786 lcr |= ASY_LCR_BITS6;
2787 break;
2788 case CS7:
2789 lcr |= ASY_LCR_BITS7;
2790 break;
2791 case CS8:
2792 lcr |= ASY_LCR_BITS8;
2793 break;
2794 }
2795
2796 asy_clr(asy, ASY_LCR, ASY_LCR_WLS0 | ASY_LCR_WLS1 |
2797 ASY_LCR_STB | ASY_LCR_PEN | ASY_LCR_EPS);
2798 asy_set(asy, ASY_LCR, lcr);
2799 asy_set_baudrate(asy, baudrate);
2800
2801 /*
2802 * If we have a FIFO buffer, enable/flush
2803 * at intialize time, flush if transitioning from
2804 * CREAD off to CREAD on.
2805 */
2806 if ((ocflags & CREAD) == 0 && (c_flag & CREAD) ||
2807 mode == ASY_INIT)
2808 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN)
2809 asy_reset_fifo(asy, ASY_FCR_RHR_FL);
2810
2811 /* remember the new cflags */
2812 asy->asy_ocflag = c_flag & ~CLOCAL;
2813 }
2814
2815 if (baudrate == 0)
2816 asy_put(asy, ASY_MCR,
2817 (asy->asy_mcr & ASY_MCR_RTS) | ASY_MCR_OUT2);
2818 else
2819 asy_put(asy, ASY_MCR, asy->asy_mcr | ASY_MCR_OUT2);
2820
2821 /*
2822 * Call the modem status interrupt handler to check for the carrier
2823 * in case CLOCAL was turned off after the carrier came on.
2824 * (Note: Modem status interrupt is not enabled if CLOCAL is ON.)
2825 */
2826 async_msint(asy);
2827
2828 /* Set interrupt control */
2829 ASY_DPRINTF(asy, ASY_DEBUG_MODM2,
2830 "c_flag & CLOCAL = %x t_cflag & CRTSCTS = %x",
2831 c_flag & CLOCAL, async->async_ttycommon.t_cflag & CRTSCTS);
2832
2833
2834 /* Always enable transmit and line status interrupts. */
2835 ier = ASY_IER_TIEN | ASY_IER_SIEN;
2836
2837 /*
2838 * Enable Modem status interrupt if hardware flow control is enabled or
2839 * this isn't a direct-wired (local) line, which ignores DCD.
2840 */
2841 if (((c_flag & CLOCAL) == 0) ||
2842 (async->async_ttycommon.t_cflag & CRTSCTS))
2843 ier |= ASY_IER_MIEN;
2844
2845 if (c_flag & CREAD)
2846 ier |= ASY_IER_RIEN;
2847
2848 asy_enable_interrupts(asy, ier);
2849 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
2850 }
2851
2852 static boolean_t
asy_baudok(struct asycom * asy)2853 asy_baudok(struct asycom *asy)
2854 {
2855 struct asyncline *async = asy->asy_priv;
2856 int baudrate;
2857
2858
2859 baudrate = BAUDINDEX(async->async_ttycommon.t_cflag);
2860
2861 if (baudrate >= ARRAY_SIZE(asy_baud_tab))
2862 return (0);
2863
2864 return (baudrate == 0 ||
2865 asy_baud_tab[baudrate].asy_dll != 0 ||
2866 asy_baud_tab[baudrate].asy_dlh != 0);
2867 }
2868
2869 /*
2870 * asyintr() is the High Level Interrupt Handler.
2871 *
2872 * There are four different interrupt types indexed by ISR register values:
2873 * 0: modem
2874 * 1: Tx holding register is empty, ready for next char
2875 * 2: Rx register now holds a char to be picked up
2876 * 3: error or break on line
2877 * This routine checks the Bit 0 (interrupt-not-pending) to determine if
2878 * the interrupt is from this port.
2879 */
2880 uint_t
asyintr(caddr_t argasy,caddr_t argunused __unused)2881 asyintr(caddr_t argasy, caddr_t argunused __unused)
2882 {
2883 struct asycom *asy = (struct asycom *)argasy;
2884 struct asyncline *async = asy->asy_priv;
2885 int ret_status = DDI_INTR_UNCLAIMED;
2886
2887 mutex_enter(&asy->asy_excl_hi);
2888 if ((async == NULL) ||
2889 !(async->async_flags & (ASYNC_ISOPEN|ASYNC_WOPEN))) {
2890 const uint8_t intr_id = asy_get(asy, ASY_ISR);
2891
2892 if ((intr_id & ASY_ISR_NOINTR) == 0) {
2893 /*
2894 * reset the device by:
2895 * reading line status
2896 * reading any data from data status register
2897 * reading modem status
2898 */
2899 (void) asy_get(asy, ASY_LSR);
2900 (void) asy_get(asy, ASY_RHR);
2901 asy->asy_msr = asy_get(asy, ASY_MSR);
2902 ret_status = DDI_INTR_CLAIMED;
2903 }
2904 mutex_exit(&asy->asy_excl_hi);
2905 return (ret_status);
2906 }
2907
2908 /* By this point we're sure this is for us. */
2909 ret_status = DDI_INTR_CLAIMED;
2910
2911 /*
2912 * Before this flag was set, interrupts were disabled. We may still get
2913 * here if asyintr() waited on the mutex.
2914 */
2915 if (asy->asy_flags & ASY_DDI_SUSPENDED) {
2916 mutex_exit(&asy->asy_excl_hi);
2917 return (ret_status);
2918 }
2919
2920 /*
2921 * We will loop until the interrupt line is pulled low. asy
2922 * interrupt is edge triggered.
2923 */
2924 for (;;) {
2925 const uint8_t intr_id = asy_get(asy, ASY_ISR);
2926
2927 if (intr_id & ASY_ISR_NOINTR)
2928 break;
2929
2930 ASY_DPRINTF(asy, ASY_DEBUG_INTR, "interrupt_id = 0x%x",
2931 intr_id);
2932
2933 const uint8_t lsr = asy_get(asy, ASY_LSR);
2934
2935 switch (intr_id & ASY_ISR_MASK) {
2936 case ASY_ISR_ID_RLST:
2937 case ASY_ISR_ID_RDA:
2938 case ASY_ISR_ID_TMO:
2939 /* receiver interrupt or receiver errors */
2940 async_rxint(asy, lsr);
2941 break;
2942
2943 case ASY_ISR_ID_THRE:
2944 /*
2945 * The transmit-ready interrupt implies an empty
2946 * transmit-hold register (or FIFO). Check that it is
2947 * present before attempting to transmit more data.
2948 */
2949 if ((lsr & ASY_LSR_THRE) == 0) {
2950 /*
2951 * Taking a THRE interrupt only to find THRE
2952 * absent would be a surprise, except for a
2953 * racing asyputchar(), which ignores the
2954 * excl_hi mutex when writing to the device.
2955 */
2956 continue;
2957 }
2958 async_txint(asy);
2959 /*
2960 * Unlike the other interrupts which fall through to
2961 * attempting to fill the output register/FIFO, THRE
2962 * has no need having just done so.
2963 */
2964 continue;
2965
2966 case ASY_ISR_ID_MST:
2967 /* modem status interrupt */
2968 async_msint(asy);
2969 break;
2970 }
2971
2972 /* Refill the output FIFO if it has gone empty */
2973 if ((lsr & ASY_LSR_THRE) && (async->async_flags & ASYNC_BUSY) &&
2974 (async->async_ocnt > 0))
2975 async_txint(asy);
2976 }
2977
2978 mutex_exit(&asy->asy_excl_hi);
2979 return (ret_status);
2980 }
2981
2982 /*
2983 * Transmitter interrupt service routine.
2984 * If there is more data to transmit in the current pseudo-DMA block,
2985 * send the next character if output is not stopped or draining.
2986 * Otherwise, queue up a soft interrupt.
2987 *
2988 * XXX - Needs review for HW FIFOs.
2989 */
2990 static void
async_txint(struct asycom * asy)2991 async_txint(struct asycom *asy)
2992 {
2993 struct asyncline *async = asy->asy_priv;
2994 int fifo_len;
2995
2996 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
2997
2998 /*
2999 * If ASYNC_BREAK or ASYNC_OUT_SUSPEND has been set, return to
3000 * asyintr()'s context to claim the interrupt without performing
3001 * any action. No character will be loaded into FIFO/THR until
3002 * timed or untimed break is removed
3003 */
3004 if (async->async_flags & (ASYNC_BREAK|ASYNC_OUT_SUSPEND))
3005 return;
3006
3007 fifo_len = asy->asy_fifo_buf; /* with FIFO buffers */
3008 if (fifo_len > asy_max_tx_fifo)
3009 fifo_len = asy_max_tx_fifo;
3010
3011 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3012 fifo_len--;
3013
3014 if (async->async_ocnt > 0 && fifo_len > 0 &&
3015 !(async->async_flags &
3016 (ASYNC_HW_OUT_FLW|ASYNC_SW_OUT_FLW|ASYNC_STOPPED))) {
3017 while (fifo_len-- > 0 && async->async_ocnt-- > 0) {
3018 asy_put(asy, ASY_THR, *async->async_optr++);
3019 }
3020 async->async_flags |= ASYNC_PROGRESS;
3021 }
3022
3023 if (fifo_len <= 0)
3024 return;
3025
3026 asysetsoft(asy);
3027 }
3028
3029 /*
3030 * Interrupt on port: handle PPS event. This function is only called
3031 * for a port on which PPS event handling has been enabled.
3032 */
3033 static void
asy_ppsevent(struct asycom * asy,int msr)3034 asy_ppsevent(struct asycom *asy, int msr)
3035 {
3036 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3037
3038 if (asy->asy_flags & ASY_PPS_EDGE) {
3039 /* Have seen leading edge, now look for and record drop */
3040 if ((msr & ASY_MSR_DCD) == 0)
3041 asy->asy_flags &= ~ASY_PPS_EDGE;
3042 /*
3043 * Waiting for leading edge, look for rise; stamp event and
3044 * calibrate kernel clock.
3045 */
3046 } else if (msr & ASY_MSR_DCD) {
3047 /*
3048 * This code captures a timestamp at the designated
3049 * transition of the PPS signal (DCD asserted). The
3050 * code provides a pointer to the timestamp, as well
3051 * as the hardware counter value at the capture.
3052 *
3053 * Note: the kernel has nano based time values while
3054 * NTP requires micro based, an in-line fast algorithm
3055 * to convert nsec to usec is used here -- see hrt2ts()
3056 * in common/os/timers.c for a full description.
3057 */
3058 struct timeval *tvp = &asy_ppsev.tv;
3059 timestruc_t ts;
3060 long nsec, usec;
3061
3062 asy->asy_flags |= ASY_PPS_EDGE;
3063 LED_OFF;
3064 gethrestime(&ts);
3065 LED_ON;
3066 nsec = ts.tv_nsec;
3067 usec = nsec + (nsec >> 2);
3068 usec = nsec + (usec >> 1);
3069 usec = nsec + (usec >> 2);
3070 usec = nsec + (usec >> 4);
3071 usec = nsec - (usec >> 3);
3072 usec = nsec + (usec >> 2);
3073 usec = nsec + (usec >> 3);
3074 usec = nsec + (usec >> 4);
3075 usec = nsec + (usec >> 1);
3076 usec = nsec + (usec >> 6);
3077 tvp->tv_usec = usec >> 10;
3078 tvp->tv_sec = ts.tv_sec;
3079
3080 ++asy_ppsev.serial;
3081
3082 /*
3083 * Because the kernel keeps a high-resolution time,
3084 * pass the current highres timestamp in tvp and zero
3085 * in usec.
3086 */
3087 ddi_hardpps(tvp, 0);
3088 }
3089 }
3090
3091 /*
3092 * Receiver interrupt: RDA interrupt, FIFO timeout interrupt or receive
3093 * error interrupt.
3094 * Try to put the character into the circular buffer for this line; if it
3095 * overflows, indicate a circular buffer overrun. If this port is always
3096 * to be serviced immediately, or the character is a STOP character, or
3097 * more than 15 characters have arrived, queue up a soft interrupt to
3098 * drain the circular buffer.
3099 * XXX - needs review for hw FIFOs support.
3100 */
3101
3102 static void
async_rxint(struct asycom * asy,uchar_t lsr)3103 async_rxint(struct asycom *asy, uchar_t lsr)
3104 {
3105 struct asyncline *async = asy->asy_priv;
3106 uchar_t c;
3107 uint_t s, needsoft = 0;
3108 tty_common_t *tp;
3109 int looplim = asy->asy_fifo_buf * 2;
3110
3111 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3112
3113 tp = &async->async_ttycommon;
3114 if (!(tp->t_cflag & CREAD)) {
3115 /* Line is not open for reading. Flush receiver FIFO. */
3116 while ((lsr & (ASY_LSR_DR | ASY_LSR_ERRORS)) != 0) {
3117 (void) asy_get(asy, ASY_RHR);
3118 lsr = asy_get(asy, ASY_LSR);
3119 if (looplim-- < 0) /* limit loop */
3120 break;
3121 }
3122 return;
3123 }
3124
3125 while ((lsr & (ASY_LSR_DR | ASY_LSR_ERRORS)) != 0) {
3126 c = 0;
3127 s = 0; /* reset error status */
3128 if (lsr & ASY_LSR_DR) {
3129 c = asy_get(asy, ASY_RHR);
3130
3131 /*
3132 * We handle XON/XOFF char if IXON is set,
3133 * but if received char is _POSIX_VDISABLE,
3134 * we left it to the up level module.
3135 */
3136 if (tp->t_iflag & IXON) {
3137 if ((c == async->async_stopc) &&
3138 (c != _POSIX_VDISABLE)) {
3139 async_flowcontrol_sw_output(asy,
3140 FLOW_STOP);
3141 goto check_looplim;
3142 } else if ((c == async->async_startc) &&
3143 (c != _POSIX_VDISABLE)) {
3144 async_flowcontrol_sw_output(asy,
3145 FLOW_START);
3146 needsoft = 1;
3147 goto check_looplim;
3148 }
3149 if ((tp->t_iflag & IXANY) &&
3150 (async->async_flags & ASYNC_SW_OUT_FLW)) {
3151 async_flowcontrol_sw_output(asy,
3152 FLOW_START);
3153 needsoft = 1;
3154 }
3155 }
3156 }
3157
3158 /*
3159 * Check for character break sequence
3160 */
3161 if ((abort_enable == KIOCABORTALTERNATE) &&
3162 (asy->asy_flags & ASY_CONSOLE)) {
3163 if (abort_charseq_recognize(c))
3164 abort_sequence_enter((char *)NULL);
3165 }
3166
3167 /* Handle framing errors */
3168 if (lsr & ASY_LSR_ERRORS) {
3169 if (lsr & ASY_LSR_PE) {
3170 if (tp->t_iflag & INPCK) /* parity enabled */
3171 s |= PERROR;
3172 }
3173
3174 if (lsr & (ASY_LSR_FE | ASY_LSR_BI))
3175 s |= FRERROR;
3176 if (lsr & ASY_LSR_OE) {
3177 async->async_hw_overrun = 1;
3178 s |= OVERRUN;
3179 }
3180 }
3181
3182 if (s == 0)
3183 if ((tp->t_iflag & PARMRK) &&
3184 !(tp->t_iflag & (IGNPAR|ISTRIP)) &&
3185 (c == 0377))
3186 if (RING_POK(async, 2)) {
3187 RING_PUT(async, 0377);
3188 RING_PUT(async, c);
3189 } else
3190 async->async_sw_overrun = 1;
3191 else
3192 if (RING_POK(async, 1))
3193 RING_PUT(async, c);
3194 else
3195 async->async_sw_overrun = 1;
3196 else
3197 if (s & FRERROR) /* Handle framing errors */
3198 if (c == 0)
3199 if ((asy->asy_flags & ASY_CONSOLE) &&
3200 (abort_enable !=
3201 KIOCABORTALTERNATE))
3202 abort_sequence_enter((char *)0);
3203 else
3204 async->async_break++;
3205 else
3206 if (RING_POK(async, 1))
3207 RING_MARK(async, c, s);
3208 else
3209 async->async_sw_overrun = 1;
3210 else /* Parity errors are handled by ldterm */
3211 if (RING_POK(async, 1))
3212 RING_MARK(async, c, s);
3213 else
3214 async->async_sw_overrun = 1;
3215 check_looplim:
3216 lsr = asy_get(asy, ASY_LSR);
3217 if (looplim-- < 0) /* limit loop */
3218 break;
3219 }
3220 if ((RING_CNT(async) > (RINGSIZE * 3)/4) &&
3221 !(async->async_inflow_source & IN_FLOW_RINGBUFF)) {
3222 async_flowcontrol_hw_input(asy, FLOW_STOP, IN_FLOW_RINGBUFF);
3223 (void) async_flowcontrol_sw_input(asy, FLOW_STOP,
3224 IN_FLOW_RINGBUFF);
3225 }
3226
3227 if ((async->async_flags & ASYNC_SERVICEIMM) || needsoft ||
3228 (RING_FRAC(async)) || (async->async_polltid == 0)) {
3229 asysetsoft(asy); /* need a soft interrupt */
3230 }
3231 }
3232
3233 /*
3234 * Modem status interrupt.
3235 *
3236 * (Note: It is assumed that the MSR hasn't been read by asyintr().)
3237 */
3238
3239 static void
async_msint(struct asycom * asy)3240 async_msint(struct asycom *asy)
3241 {
3242 struct asyncline *async = asy->asy_priv;
3243 int msr, t_cflag = async->async_ttycommon.t_cflag;
3244
3245 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3246
3247 async_msint_retry:
3248 /* this resets the interrupt */
3249 msr = asy_get(asy, ASY_MSR);
3250 ASY_DPRINTF(asy, ASY_DEBUG_STATE, "call #%d:",
3251 ++(asy->asy_msint_cnt));
3252 ASY_DPRINTF(asy, ASY_DEBUG_STATE, " transition: %3s %3s %3s %3s",
3253 (msr & ASY_MSR_DCTS) ? "DCTS" : " ",
3254 (msr & ASY_MSR_DDSR) ? "DDSR" : " ",
3255 (msr & ASY_MSR_TERI) ? "TERI" : " ",
3256 (msr & ASY_MSR_DDCD) ? "DDCD" : " ");
3257 ASY_DPRINTF(asy, ASY_DEBUG_STATE, "current state: %3s %3s %3s %3s",
3258 (msr & ASY_MSR_CTS) ? "CTS " : " ",
3259 (msr & ASY_MSR_DSR) ? "DSR " : " ",
3260 (msr & ASY_MSR_RI) ? "RI " : " ",
3261 (msr & ASY_MSR_DCD) ? "DCD " : " ");
3262
3263 /* If CTS status is changed, do H/W output flow control */
3264 if ((t_cflag & CRTSCTS) && (((asy->asy_msr ^ msr) & ASY_MSR_CTS) != 0))
3265 async_flowcontrol_hw_output(asy,
3266 msr & ASY_MSR_CTS ? FLOW_START : FLOW_STOP);
3267 /*
3268 * Reading MSR resets the interrupt, we save the
3269 * value of msr so that other functions could examine MSR by
3270 * looking at asy_msr.
3271 */
3272 asy->asy_msr = (uchar_t)msr;
3273
3274 /* Handle PPS event */
3275 if (asy->asy_flags & ASY_PPS)
3276 asy_ppsevent(asy, msr);
3277
3278 async->async_ext++;
3279 asysetsoft(asy);
3280 /*
3281 * We will make sure that the modem status presented to us
3282 * during the previous read has not changed. If the chip samples
3283 * the modem status on the falling edge of the interrupt line,
3284 * and uses this state as the base for detecting change of modem
3285 * status, we would miss a change of modem status event that occured
3286 * after we initiated a read MSR operation.
3287 */
3288 msr = asy_get(asy, ASY_MSR);
3289 if (ASY_MSR_STATES(msr) != ASY_MSR_STATES(asy->asy_msr))
3290 goto async_msint_retry;
3291 }
3292
3293 /*
3294 * Pend a soft interrupt if one isn't already pending.
3295 */
3296 static void
asysetsoft(struct asycom * asy)3297 asysetsoft(struct asycom *asy)
3298 {
3299 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3300
3301 if (mutex_tryenter(&asy->asy_soft_lock) == 0)
3302 return;
3303
3304 asy->asy_flags |= ASY_NEEDSOFT;
3305 if (!asy->asysoftpend) {
3306 asy->asysoftpend = 1;
3307 mutex_exit(&asy->asy_soft_lock);
3308 (void) ddi_intr_trigger_softint(asy->asy_soft_inth, NULL);
3309 } else {
3310 mutex_exit(&asy->asy_soft_lock);
3311 }
3312 }
3313
3314 /*
3315 * Check the carrier signal DCD and handle carrier coming up or
3316 * going down, cleaning up as needed and signalling waiters.
3317 */
3318 static void
asy_carrier_check(struct asycom * asy)3319 asy_carrier_check(struct asycom *asy)
3320 {
3321 struct asyncline *async = asy->asy_priv;
3322 tty_common_t *tp = &async->async_ttycommon;
3323 queue_t *q = tp->t_readq;
3324 mblk_t *bp;
3325 int flushflag;
3326
3327 ASY_DPRINTF(asy, ASY_DEBUG_MODM2,
3328 "asy_msr & DCD = %x, tp->t_flags & TS_SOFTCAR = %x",
3329 asy->asy_msr & ASY_MSR_DCD, tp->t_flags & TS_SOFTCAR);
3330
3331 if (asy->asy_msr & ASY_MSR_DCD) {
3332 /*
3333 * The DCD line is on. If we already had a carrier,
3334 * nothing changed and there's nothing to do.
3335 */
3336 if ((async->async_flags & ASYNC_CARR_ON) != 0)
3337 return;
3338
3339 ASY_DPRINTF(asy, ASY_DEBUG_MODM2, "set ASYNC_CARR_ON");
3340 async->async_flags |= ASYNC_CARR_ON;
3341 if (async->async_flags & ASYNC_ISOPEN) {
3342 mutex_exit(&asy->asy_excl_hi);
3343 mutex_exit(&asy->asy_excl);
3344 (void) putctl(q, M_UNHANGUP);
3345 mutex_enter(&asy->asy_excl);
3346 mutex_enter(&asy->asy_excl_hi);
3347 }
3348 cv_broadcast(&async->async_flags_cv);
3349
3350 return;
3351 }
3352
3353 /*
3354 * The DCD line is off. If we had no carrier, nothing changed
3355 * and there's nothing to do.
3356 */
3357 if ((async->async_flags & ASYNC_CARR_ON) == 0)
3358 return;
3359
3360 /*
3361 * The DCD line is off, but we had a carrier. If we're on a local line,
3362 * where carrier is ignored, or we're using a soft carrier, we're done
3363 * here.
3364 */
3365 if ((tp->t_cflag & CLOCAL) != 0 || (tp->t_flags & TS_SOFTCAR) != 0)
3366 goto out;
3367
3368 /*
3369 * Else, drop DTR, abort any output in progress, indicate that output
3370 * is not stopped.
3371 */
3372 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "carrier dropped, so drop DTR");
3373 asy_clr(asy, ASY_MCR, ASY_MCR_DTR);
3374
3375 if (async->async_flags & ASYNC_BUSY) {
3376 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
3377 "Carrier dropped. Clearing async_ocnt");
3378 async->async_ocnt = 0;
3379 }
3380
3381 async->async_flags &= ~ASYNC_STOPPED;
3382
3383 /* If nobody had the device open, we're done here. */
3384 if ((async->async_flags & ASYNC_ISOPEN) == 0)
3385 goto out;
3386
3387 /* Else, send a hangup notification upstream and clean up. */
3388 mutex_exit(&asy->asy_excl_hi);
3389 mutex_exit(&asy->asy_excl);
3390 (void) putctl(q, M_HANGUP);
3391 mutex_enter(&asy->asy_excl);
3392 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "putctl(q, M_HANGUP)");
3393
3394 /*
3395 * Flush the transmit FIFO. Any data left in there is invalid now.
3396 */
3397 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
3398 mutex_enter(&asy->asy_excl_hi);
3399 asy_reset_fifo(asy, ASY_FCR_THR_FL);
3400 mutex_exit(&asy->asy_excl_hi);
3401 }
3402
3403 /*
3404 * Flush our write queue if we have one. If we're in the midst of close,
3405 * then flush everything. Don't leave stale ioctls lying about.
3406 */
3407 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
3408 "Flushing to prevent HUPCL hanging");
3409 flushflag = (async->async_flags & ASYNC_CLOSING) ? FLUSHALL : FLUSHDATA;
3410 flushq(tp->t_writeq, flushflag);
3411
3412 /* Free the last active msg. */
3413 bp = async->async_xmitblk;
3414 if (bp != NULL) {
3415 freeb(bp);
3416 async->async_xmitblk = NULL;
3417 }
3418
3419 mutex_enter(&asy->asy_excl_hi);
3420 async->async_flags &= ~ASYNC_BUSY;
3421
3422
3423 out:
3424 /* Clear our carrier flag and signal anyone waiting. */
3425 async->async_flags &= ~ASYNC_CARR_ON;
3426 cv_broadcast(&async->async_flags_cv);
3427 }
3428
3429
3430 /*
3431 * Handle a second-stage interrupt.
3432 */
3433 /*ARGSUSED*/
3434 uint_t
asysoftintr(caddr_t intarg,caddr_t unusedarg __unused)3435 asysoftintr(caddr_t intarg, caddr_t unusedarg __unused)
3436 {
3437 struct asycom *asy = (struct asycom *)intarg;
3438 struct asyncline *async;
3439 int rv;
3440 uint_t cc;
3441
3442 /*
3443 * Test and clear soft interrupt.
3444 */
3445 mutex_enter(&asy->asy_soft_lock);
3446 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3447 rv = asy->asysoftpend;
3448 if (rv != 0)
3449 asy->asysoftpend = 0;
3450 mutex_exit(&asy->asy_soft_lock);
3451
3452 if (rv) {
3453 if (asy->asy_priv == NULL)
3454 return (rv ? DDI_INTR_CLAIMED : DDI_INTR_UNCLAIMED);
3455 async = (struct asyncline *)asy->asy_priv;
3456 mutex_enter(&asy->asy_excl_hi);
3457 if (asy->asy_flags & ASY_NEEDSOFT) {
3458 asy->asy_flags &= ~ASY_NEEDSOFT;
3459 mutex_exit(&asy->asy_excl_hi);
3460 async_softint(asy);
3461 mutex_enter(&asy->asy_excl_hi);
3462 }
3463
3464 /*
3465 * There are some instances where the softintr is not
3466 * scheduled and hence not called. It so happens that
3467 * causes the last few characters to be stuck in the
3468 * ringbuffer. Hence, call the handler once again so
3469 * the last few characters are cleared.
3470 */
3471 cc = RING_CNT(async);
3472 mutex_exit(&asy->asy_excl_hi);
3473 if (cc > 0)
3474 (void) async_softint(asy);
3475 }
3476 return (rv ? DDI_INTR_CLAIMED : DDI_INTR_UNCLAIMED);
3477 }
3478
3479 /*
3480 * Handle a software interrupt.
3481 */
3482 static void
async_softint(struct asycom * asy)3483 async_softint(struct asycom *asy)
3484 {
3485 struct asyncline *async = asy->asy_priv;
3486 uint_t cc;
3487 mblk_t *bp;
3488 queue_t *q;
3489 uchar_t val;
3490 uchar_t c;
3491 tty_common_t *tp;
3492 int nb;
3493 int instance = UNIT(async->async_dev);
3494
3495 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3496 mutex_enter(&asy->asy_excl_hi);
3497 if (asy->asy_flags & ASY_DOINGSOFT) {
3498 asy->asy_flags |= ASY_DOINGSOFT_RETRY;
3499 mutex_exit(&asy->asy_excl_hi);
3500 return;
3501 }
3502 asy->asy_flags |= ASY_DOINGSOFT;
3503 begin:
3504 asy->asy_flags &= ~ASY_DOINGSOFT_RETRY;
3505 mutex_exit(&asy->asy_excl_hi);
3506 mutex_enter(&asy->asy_excl);
3507 tp = &async->async_ttycommon;
3508 q = tp->t_readq;
3509
3510 if (async->async_flags & ASYNC_OUT_FLW_RESUME) {
3511 if (async->async_ocnt > 0) {
3512 mutex_enter(&asy->asy_excl_hi);
3513 async_resume(async);
3514 mutex_exit(&asy->asy_excl_hi);
3515 } else {
3516 if (async->async_xmitblk)
3517 freeb(async->async_xmitblk);
3518 async->async_xmitblk = NULL;
3519 async_start(async);
3520 }
3521 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
3522 }
3523
3524 mutex_enter(&asy->asy_excl_hi);
3525 if (async->async_ext) {
3526 async->async_ext = 0;
3527 asy_carrier_check(asy);
3528 }
3529 mutex_exit(&asy->asy_excl_hi);
3530
3531 /*
3532 * If data has been added to the circular buffer, remove
3533 * it from the buffer, and send it up the stream if there's
3534 * somebody listening. Try to do it 16 bytes at a time. If we
3535 * have more than 16 bytes to move, move 16 byte chunks and
3536 * leave the rest for next time around (maybe it will grow).
3537 */
3538 mutex_enter(&asy->asy_excl_hi);
3539 if (!(async->async_flags & ASYNC_ISOPEN)) {
3540 RING_INIT(async);
3541 goto rv;
3542 }
3543 if ((cc = RING_CNT(async)) == 0)
3544 goto rv;
3545 mutex_exit(&asy->asy_excl_hi);
3546
3547 if (!canput(q)) {
3548 mutex_enter(&asy->asy_excl_hi);
3549 if (!(async->async_inflow_source & IN_FLOW_STREAMS)) {
3550 async_flowcontrol_hw_input(asy, FLOW_STOP,
3551 IN_FLOW_STREAMS);
3552 (void) async_flowcontrol_sw_input(asy, FLOW_STOP,
3553 IN_FLOW_STREAMS);
3554 }
3555 goto rv;
3556 }
3557 if (async->async_inflow_source & IN_FLOW_STREAMS) {
3558 mutex_enter(&asy->asy_excl_hi);
3559 async_flowcontrol_hw_input(asy, FLOW_START,
3560 IN_FLOW_STREAMS);
3561 (void) async_flowcontrol_sw_input(asy, FLOW_START,
3562 IN_FLOW_STREAMS);
3563 mutex_exit(&asy->asy_excl_hi);
3564 }
3565
3566 ASY_DPRINTF(asy, ASY_DEBUG_INPUT, "%d char(s) in queue", cc);
3567
3568 if (!(bp = allocb(cc, BPRI_MED))) {
3569 mutex_exit(&asy->asy_excl);
3570 ttycommon_qfull(&async->async_ttycommon, q);
3571 mutex_enter(&asy->asy_excl);
3572 mutex_enter(&asy->asy_excl_hi);
3573 goto rv;
3574 }
3575 mutex_enter(&asy->asy_excl_hi);
3576 do {
3577 if (RING_ERR(async, S_ERRORS)) {
3578 RING_UNMARK(async);
3579 c = RING_GET(async);
3580 break;
3581 } else {
3582 *bp->b_wptr++ = RING_GET(async);
3583 }
3584 } while (--cc);
3585 mutex_exit(&asy->asy_excl_hi);
3586 mutex_exit(&asy->asy_excl);
3587 if (bp->b_wptr > bp->b_rptr) {
3588 if (!canput(q)) {
3589 asyerror(asy, CE_WARN, "local queue full");
3590 freemsg(bp);
3591 } else {
3592 (void) putq(q, bp);
3593 }
3594 } else {
3595 freemsg(bp);
3596 }
3597 /*
3598 * If we have a parity error, then send
3599 * up an M_BREAK with the "bad"
3600 * character as an argument. Let ldterm
3601 * figure out what to do with the error.
3602 */
3603 if (cc)
3604 (void) putctl1(q, M_BREAK, c);
3605 mutex_enter(&asy->asy_excl);
3606 mutex_enter(&asy->asy_excl_hi);
3607 if (cc) {
3608 asysetsoft(asy); /* finish cc chars */
3609 }
3610 rv:
3611 if ((RING_CNT(async) < (RINGSIZE/4)) &&
3612 (async->async_inflow_source & IN_FLOW_RINGBUFF)) {
3613 async_flowcontrol_hw_input(asy, FLOW_START, IN_FLOW_RINGBUFF);
3614 (void) async_flowcontrol_sw_input(asy, FLOW_START,
3615 IN_FLOW_RINGBUFF);
3616 }
3617
3618 /*
3619 * If a transmission has finished, indicate that it's finished,
3620 * and start that line up again.
3621 */
3622 if (async->async_break > 0) {
3623 nb = async->async_break;
3624 async->async_break = 0;
3625 if (async->async_flags & ASYNC_ISOPEN) {
3626 mutex_exit(&asy->asy_excl_hi);
3627 mutex_exit(&asy->asy_excl);
3628 for (; nb > 0; nb--)
3629 (void) putctl(q, M_BREAK);
3630 mutex_enter(&asy->asy_excl);
3631 mutex_enter(&asy->asy_excl_hi);
3632 }
3633 }
3634 if (async->async_ocnt <= 0 && (async->async_flags & ASYNC_BUSY)) {
3635 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
3636 "Clearing ASYNC_BUSY, async_ocnt=%d", async->async_ocnt);
3637 async->async_flags &= ~ASYNC_BUSY;
3638 mutex_exit(&asy->asy_excl_hi);
3639 if (async->async_xmitblk)
3640 freeb(async->async_xmitblk);
3641 async->async_xmitblk = NULL;
3642 async_start(async);
3643 /*
3644 * If the flag isn't set after doing the async_start above, we
3645 * may have finished all the queued output. Signal any thread
3646 * stuck in close.
3647 */
3648 if (!(async->async_flags & ASYNC_BUSY))
3649 cv_broadcast(&async->async_flags_cv);
3650 mutex_enter(&asy->asy_excl_hi);
3651 }
3652 /*
3653 * A note about these overrun bits: all they do is *tell* someone
3654 * about an error- They do not track multiple errors. In fact,
3655 * you could consider them latched register bits if you like.
3656 * We are only interested in printing the error message once for
3657 * any cluster of overrun errors.
3658 */
3659 if (async->async_hw_overrun) {
3660 if (async->async_flags & ASYNC_ISOPEN) {
3661 mutex_exit(&asy->asy_excl_hi);
3662 mutex_exit(&asy->asy_excl);
3663 asyerror(asy, CE_WARN, "silo overflow");
3664 mutex_enter(&asy->asy_excl);
3665 mutex_enter(&asy->asy_excl_hi);
3666 }
3667 async->async_hw_overrun = 0;
3668 }
3669 if (async->async_sw_overrun) {
3670 if (async->async_flags & ASYNC_ISOPEN) {
3671 mutex_exit(&asy->asy_excl_hi);
3672 mutex_exit(&asy->asy_excl);
3673 asyerror(asy, CE_WARN, "ring buffer overflow");
3674 mutex_enter(&asy->asy_excl);
3675 mutex_enter(&asy->asy_excl_hi);
3676 }
3677 async->async_sw_overrun = 0;
3678 }
3679 if (asy->asy_flags & ASY_DOINGSOFT_RETRY) {
3680 mutex_exit(&asy->asy_excl);
3681 goto begin;
3682 }
3683 asy->asy_flags &= ~ASY_DOINGSOFT;
3684 mutex_exit(&asy->asy_excl_hi);
3685 mutex_exit(&asy->asy_excl);
3686 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
3687 }
3688
3689 /*
3690 * Restart output on a line after a delay or break timer expired.
3691 */
3692 static void
async_restart(void * arg)3693 async_restart(void *arg)
3694 {
3695 struct asyncline *async = (struct asyncline *)arg;
3696 struct asycom *asy = async->async_common;
3697 uchar_t lcr;
3698
3699 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3700
3701 /*
3702 * If break timer expired, turn off the break bit.
3703 */
3704
3705 mutex_enter(&asy->asy_excl);
3706 /*
3707 * If ASYNC_OUT_SUSPEND is also set, we don't really
3708 * clean the HW break, TIOCCBRK is responsible for this.
3709 */
3710 if ((async->async_flags & ASYNC_BREAK) &&
3711 !(async->async_flags & ASYNC_OUT_SUSPEND)) {
3712 mutex_enter(&asy->asy_excl_hi);
3713 asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
3714 mutex_exit(&asy->asy_excl_hi);
3715 }
3716 async->async_flags &= ~(ASYNC_DELAY|ASYNC_BREAK);
3717 cv_broadcast(&async->async_flags_cv);
3718 async_start(async);
3719
3720 mutex_exit(&asy->asy_excl);
3721 }
3722
3723 /*
3724 * Start output on a line, unless it's busy, frozen, or otherwise.
3725 */
3726 static void
async_start(struct asyncline * async)3727 async_start(struct asyncline *async)
3728 {
3729 struct asycom *asy = async->async_common;
3730 int cc;
3731 queue_t *q;
3732 mblk_t *bp;
3733 uchar_t *xmit_addr;
3734 uchar_t val;
3735 int fifo_len = 1;
3736 boolean_t didsome;
3737 mblk_t *nbp;
3738
3739 #ifdef DEBUG
3740 int instance = UNIT(async->async_dev);
3741
3742 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3743 #endif
3744 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
3745 fifo_len = asy->asy_fifo_buf; /* with FIFO buffers */
3746 if (fifo_len > asy_max_tx_fifo)
3747 fifo_len = asy_max_tx_fifo;
3748 }
3749
3750 ASSERT(mutex_owned(&asy->asy_excl));
3751
3752 /*
3753 * If the chip is busy (i.e., we're waiting for a break timeout
3754 * to expire, or for the current transmission to finish, or for
3755 * output to finish draining from chip), don't grab anything new.
3756 */
3757 if (async->async_flags & (ASYNC_BREAK|ASYNC_BUSY)) {
3758 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "%s",
3759 async->async_flags & ASYNC_BREAK ? "break" : "busy");
3760 return;
3761 }
3762
3763 /*
3764 * Check only pended sw input flow control.
3765 */
3766 mutex_enter(&asy->asy_excl_hi);
3767 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3768 fifo_len--;
3769 mutex_exit(&asy->asy_excl_hi);
3770
3771 /*
3772 * If we're waiting for a delay timeout to expire, don't grab
3773 * anything new.
3774 */
3775 if (async->async_flags & ASYNC_DELAY) {
3776 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "start ASYNC_DELAY");
3777 return;
3778 }
3779
3780 if ((q = async->async_ttycommon.t_writeq) == NULL) {
3781 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "start writeq is null");
3782 return; /* not attached to a stream */
3783 }
3784
3785 for (;;) {
3786 if ((bp = getq(q)) == NULL)
3787 return; /* no data to transmit */
3788
3789 /*
3790 * We have a message block to work on.
3791 * Check whether it's a break, a delay, or an ioctl (the latter
3792 * occurs if the ioctl in question was waiting for the output
3793 * to drain). If it's one of those, process it immediately.
3794 */
3795 switch (bp->b_datap->db_type) {
3796
3797 case M_BREAK:
3798 /*
3799 * Set the break bit, and arrange for "async_restart"
3800 * to be called in 1/4 second; it will turn the
3801 * break bit off, and call "async_start" to grab
3802 * the next message.
3803 */
3804 mutex_enter(&asy->asy_excl_hi);
3805 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
3806 mutex_exit(&asy->asy_excl_hi);
3807 async->async_flags |= ASYNC_BREAK;
3808 (void) timeout(async_restart, (caddr_t)async,
3809 drv_usectohz(1000000)/4);
3810 freemsg(bp);
3811 return; /* wait for this to finish */
3812
3813 case M_DELAY:
3814 /*
3815 * Arrange for "async_restart" to be called when the
3816 * delay expires; it will turn ASYNC_DELAY off,
3817 * and call "async_start" to grab the next message.
3818 */
3819 (void) timeout(async_restart, (caddr_t)async,
3820 (int)(*(unsigned char *)bp->b_rptr + 6));
3821 async->async_flags |= ASYNC_DELAY;
3822 freemsg(bp);
3823 return; /* wait for this to finish */
3824
3825 case M_IOCTL:
3826 /*
3827 * This ioctl was waiting for the output ahead of
3828 * it to drain; obviously, it has. Do it, and
3829 * then grab the next message after it.
3830 */
3831 mutex_exit(&asy->asy_excl);
3832 async_ioctl(async, q, bp);
3833 mutex_enter(&asy->asy_excl);
3834 continue;
3835 }
3836
3837 while (bp != NULL && ((cc = MBLKL(bp)) == 0)) {
3838 nbp = bp->b_cont;
3839 freeb(bp);
3840 bp = nbp;
3841 }
3842 if (bp != NULL)
3843 break;
3844 }
3845
3846 /*
3847 * We have data to transmit. If output is stopped, put
3848 * it back and try again later.
3849 */
3850 if (async->async_flags & (ASYNC_HW_OUT_FLW | ASYNC_SW_OUT_FLW |
3851 ASYNC_STOPPED | ASYNC_OUT_SUSPEND)) {
3852 (void) putbq(q, bp);
3853 return;
3854 }
3855
3856 async->async_xmitblk = bp;
3857 xmit_addr = bp->b_rptr;
3858 bp = bp->b_cont;
3859 if (bp != NULL)
3860 (void) putbq(q, bp); /* not done with this message yet */
3861
3862 /*
3863 * In 5-bit mode, the high order bits are used
3864 * to indicate character sizes less than five,
3865 * so we need to explicitly mask before transmitting
3866 */
3867 if ((async->async_ttycommon.t_cflag & CSIZE) == CS5) {
3868 unsigned char *p = xmit_addr;
3869 int cnt = cc;
3870
3871 while (cnt--)
3872 *p++ &= (unsigned char) 0x1f;
3873 }
3874
3875 /*
3876 * Set up this block for pseudo-DMA.
3877 */
3878 mutex_enter(&asy->asy_excl_hi);
3879 /*
3880 * If the transmitter is ready, shove the first
3881 * character out.
3882 */
3883 didsome = B_FALSE;
3884 while (--fifo_len >= 0 && cc > 0) {
3885 if (!(asy_get(asy, ASY_LSR) & ASY_LSR_THRE))
3886 break;
3887 asy_put(asy, ASY_THR, *xmit_addr++);
3888 cc--;
3889 didsome = B_TRUE;
3890 }
3891 async->async_optr = xmit_addr;
3892 async->async_ocnt = cc;
3893 if (didsome)
3894 async->async_flags |= ASYNC_PROGRESS;
3895 ASY_DPRINTF(asy, ASY_DEBUG_BUSY, "Set ASYNC_BUSY, async_ocnt=%d",
3896 async->async_ocnt);
3897 async->async_flags |= ASYNC_BUSY;
3898 mutex_exit(&asy->asy_excl_hi);
3899 }
3900
3901 /*
3902 * Resume output by poking the transmitter.
3903 */
3904 static void
async_resume(struct asyncline * async)3905 async_resume(struct asyncline *async)
3906 {
3907 struct asycom *asy = async->async_common;
3908
3909 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3910 ASSERT(mutex_owned(&asy->asy_excl_hi));
3911
3912 if (asy_get(asy, ASY_LSR) & ASY_LSR_THRE) {
3913 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3914 return;
3915 if (async->async_ocnt > 0 &&
3916 !(async->async_flags &
3917 (ASYNC_HW_OUT_FLW|ASYNC_SW_OUT_FLW|ASYNC_OUT_SUSPEND))) {
3918 asy_put(asy, ASY_THR, *async->async_optr++);
3919 async->async_ocnt--;
3920 async->async_flags |= ASYNC_PROGRESS;
3921 }
3922 }
3923 }
3924
3925 /*
3926 * Hold the untimed break to last the minimum time.
3927 */
3928 static void
async_hold_utbrk(void * arg)3929 async_hold_utbrk(void *arg)
3930 {
3931 struct asyncline *async = arg;
3932 struct asycom *asy = async->async_common;
3933
3934 mutex_enter(&asy->asy_excl);
3935 async->async_flags &= ~ASYNC_HOLD_UTBRK;
3936 cv_broadcast(&async->async_flags_cv);
3937 async->async_utbrktid = 0;
3938 mutex_exit(&asy->asy_excl);
3939 }
3940
3941 /*
3942 * Resume the untimed break.
3943 */
3944 static void
async_resume_utbrk(struct asyncline * async)3945 async_resume_utbrk(struct asyncline *async)
3946 {
3947 uchar_t val;
3948 struct asycom *asy = async->async_common;
3949 ASSERT(mutex_owned(&asy->asy_excl));
3950
3951 /*
3952 * Because the wait time is very short,
3953 * so we use uninterruptably wait.
3954 */
3955 while (async->async_flags & ASYNC_HOLD_UTBRK) {
3956 cv_wait(&async->async_flags_cv, &asy->asy_excl);
3957 }
3958 mutex_enter(&asy->asy_excl_hi);
3959 /*
3960 * Timed break and untimed break can exist simultaneously,
3961 * if ASYNC_BREAK is also set at here, we don't
3962 * really clean the HW break.
3963 */
3964 if (!(async->async_flags & ASYNC_BREAK))
3965 asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
3966
3967 async->async_flags &= ~ASYNC_OUT_SUSPEND;
3968 cv_broadcast(&async->async_flags_cv);
3969 if (async->async_ocnt > 0) {
3970 async_resume(async);
3971 mutex_exit(&asy->asy_excl_hi);
3972 } else {
3973 async->async_flags &= ~ASYNC_BUSY;
3974 mutex_exit(&asy->asy_excl_hi);
3975 if (async->async_xmitblk != NULL) {
3976 freeb(async->async_xmitblk);
3977 async->async_xmitblk = NULL;
3978 }
3979 async_start(async);
3980 }
3981 }
3982
3983 /*
3984 * Process an "ioctl" message sent down to us.
3985 * Note that we don't need to get any locks until we are ready to access
3986 * the hardware. Nothing we access until then is going to be altered
3987 * outside of the STREAMS framework, so we should be safe.
3988 */
3989 int asydelay = 10000;
3990 static void
async_ioctl(struct asyncline * async,queue_t * wq,mblk_t * mp)3991 async_ioctl(struct asyncline *async, queue_t *wq, mblk_t *mp)
3992 {
3993 struct asycom *asy = async->async_common;
3994 tty_common_t *tp = &async->async_ttycommon;
3995 struct iocblk *iocp;
3996 unsigned datasize;
3997 int error = 0;
3998 uchar_t val;
3999 mblk_t *datamp;
4000 unsigned int index;
4001
4002 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
4003
4004 if (tp->t_iocpending != NULL) {
4005 /*
4006 * We were holding an "ioctl" response pending the
4007 * availability of an "mblk" to hold data to be passed up;
4008 * another "ioctl" came through, which means that "ioctl"
4009 * must have timed out or been aborted.
4010 */
4011 freemsg(async->async_ttycommon.t_iocpending);
4012 async->async_ttycommon.t_iocpending = NULL;
4013 }
4014
4015 iocp = (struct iocblk *)mp->b_rptr;
4016
4017 /*
4018 * For TIOCMGET and the PPS ioctls, do NOT call ttycommon_ioctl()
4019 * because this function frees up the message block (mp->b_cont) that
4020 * contains the user location where we pass back the results.
4021 *
4022 * Similarly, CONSOPENPOLLEDIO needs ioc_count, which ttycommon_ioctl
4023 * zaps. We know that ttycommon_ioctl doesn't know any CONS*
4024 * ioctls, so keep the others safe too.
4025 */
4026 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL, "%s",
4027 iocp->ioc_cmd == TIOCMGET ? "TIOCMGET" :
4028 iocp->ioc_cmd == TIOCMSET ? "TIOCMSET" :
4029 iocp->ioc_cmd == TIOCMBIS ? "TIOCMBIS" :
4030 iocp->ioc_cmd == TIOCMBIC ? "TIOCMBIC" :
4031 "other");
4032
4033 switch (iocp->ioc_cmd) {
4034 case TIOCMGET:
4035 case TIOCGPPS:
4036 case TIOCSPPS:
4037 case TIOCGPPSEV:
4038 case CONSOPENPOLLEDIO:
4039 case CONSCLOSEPOLLEDIO:
4040 case CONSSETABORTENABLE:
4041 case CONSGETABORTENABLE:
4042 error = -1; /* Do Nothing */
4043 break;
4044 default:
4045
4046 /*
4047 * The only way in which "ttycommon_ioctl" can fail is if the
4048 * "ioctl" requires a response containing data to be returned
4049 * to the user, and no mblk could be allocated for the data.
4050 * No such "ioctl" alters our state. Thus, we always go ahead
4051 * and do any state-changes the "ioctl" calls for. If we
4052 * couldn't allocate the data, "ttycommon_ioctl" has stashed
4053 * the "ioctl" away safely, so we just call "bufcall" to
4054 * request that we be called back when we stand a better
4055 * chance of allocating the data.
4056 */
4057 if ((datasize = ttycommon_ioctl(tp, wq, mp, &error)) != 0) {
4058 if (async->async_wbufcid)
4059 unbufcall(async->async_wbufcid);
4060 async->async_wbufcid = bufcall(datasize, BPRI_HI,
4061 (void (*)(void *)) async_reioctl,
4062 (void *)(intptr_t)async->async_common->asy_unit);
4063 return;
4064 }
4065 }
4066
4067 mutex_enter(&asy->asy_excl);
4068
4069 if (error == 0) {
4070 /*
4071 * "ttycommon_ioctl" did most of the work; we just use the
4072 * data it set up.
4073 */
4074 switch (iocp->ioc_cmd) {
4075
4076 case TCSETS:
4077 mutex_enter(&asy->asy_excl_hi);
4078 if (asy_baudok(asy))
4079 asy_program(asy, ASY_NOINIT);
4080 else
4081 error = EINVAL;
4082 mutex_exit(&asy->asy_excl_hi);
4083 break;
4084 case TCSETSF:
4085 case TCSETSW:
4086 case TCSETA:
4087 case TCSETAW:
4088 case TCSETAF:
4089 mutex_enter(&asy->asy_excl_hi);
4090 if (!asy_baudok(asy))
4091 error = EINVAL;
4092 else {
4093 if (asy_isbusy(asy))
4094 asy_waiteot(asy);
4095 asy_program(asy, ASY_NOINIT);
4096 }
4097 mutex_exit(&asy->asy_excl_hi);
4098 break;
4099 }
4100 } else if (error < 0) {
4101 /*
4102 * "ttycommon_ioctl" didn't do anything; we process it here.
4103 */
4104 error = 0;
4105 switch (iocp->ioc_cmd) {
4106
4107 case TIOCGPPS:
4108 /*
4109 * Get PPS on/off.
4110 */
4111 if (mp->b_cont != NULL)
4112 freemsg(mp->b_cont);
4113
4114 mp->b_cont = allocb(sizeof (int), BPRI_HI);
4115 if (mp->b_cont == NULL) {
4116 error = ENOMEM;
4117 break;
4118 }
4119 if (asy->asy_flags & ASY_PPS)
4120 *(int *)mp->b_cont->b_wptr = 1;
4121 else
4122 *(int *)mp->b_cont->b_wptr = 0;
4123 mp->b_cont->b_wptr += sizeof (int);
4124 mp->b_datap->db_type = M_IOCACK;
4125 iocp->ioc_count = sizeof (int);
4126 break;
4127
4128 case TIOCSPPS:
4129 /*
4130 * Set PPS on/off.
4131 */
4132 error = miocpullup(mp, sizeof (int));
4133 if (error != 0)
4134 break;
4135
4136 mutex_enter(&asy->asy_excl_hi);
4137 if (*(int *)mp->b_cont->b_rptr)
4138 asy->asy_flags |= ASY_PPS;
4139 else
4140 asy->asy_flags &= ~ASY_PPS;
4141 /* Reset edge sense */
4142 asy->asy_flags &= ~ASY_PPS_EDGE;
4143 mutex_exit(&asy->asy_excl_hi);
4144 mp->b_datap->db_type = M_IOCACK;
4145 break;
4146
4147 case TIOCGPPSEV:
4148 {
4149 /*
4150 * Get PPS event data.
4151 */
4152 mblk_t *bp;
4153 void *buf;
4154 #ifdef _SYSCALL32_IMPL
4155 struct ppsclockev32 p32;
4156 #endif
4157 struct ppsclockev ppsclockev;
4158
4159 if (mp->b_cont != NULL) {
4160 freemsg(mp->b_cont);
4161 mp->b_cont = NULL;
4162 }
4163
4164 if ((asy->asy_flags & ASY_PPS) == 0) {
4165 error = ENXIO;
4166 break;
4167 }
4168
4169 /* Protect from incomplete asy_ppsev */
4170 mutex_enter(&asy->asy_excl_hi);
4171 ppsclockev = asy_ppsev;
4172 mutex_exit(&asy->asy_excl_hi);
4173
4174 #ifdef _SYSCALL32_IMPL
4175 if ((iocp->ioc_flag & IOC_MODELS) != IOC_NATIVE) {
4176 TIMEVAL_TO_TIMEVAL32(&p32.tv, &ppsclockev.tv);
4177 p32.serial = ppsclockev.serial;
4178 buf = &p32;
4179 iocp->ioc_count = sizeof (struct ppsclockev32);
4180 } else
4181 #endif
4182 {
4183 buf = &ppsclockev;
4184 iocp->ioc_count = sizeof (struct ppsclockev);
4185 }
4186
4187 if ((bp = allocb(iocp->ioc_count, BPRI_HI)) == NULL) {
4188 error = ENOMEM;
4189 break;
4190 }
4191 mp->b_cont = bp;
4192
4193 bcopy(buf, bp->b_wptr, iocp->ioc_count);
4194 bp->b_wptr += iocp->ioc_count;
4195 mp->b_datap->db_type = M_IOCACK;
4196 break;
4197 }
4198
4199 case TCSBRK:
4200 error = miocpullup(mp, sizeof (int));
4201 if (error != 0)
4202 break;
4203
4204 if (*(int *)mp->b_cont->b_rptr == 0) {
4205
4206 /*
4207 * XXX Arrangements to ensure that a break
4208 * isn't in progress should be sufficient.
4209 * This ugly delay() is the only thing
4210 * that seems to work on the NCR Worldmark.
4211 * It should be replaced. Note that an
4212 * asy_waiteot() also does not work.
4213 */
4214 if (asydelay)
4215 delay(drv_usectohz(asydelay));
4216
4217 while (async->async_flags & ASYNC_BREAK) {
4218 cv_wait(&async->async_flags_cv,
4219 &asy->asy_excl);
4220 }
4221 mutex_enter(&asy->asy_excl_hi);
4222 /*
4223 * Wait until TSR is empty and then set the
4224 * break. ASYNC_BREAK has been set to ensure
4225 * that no characters are transmitted while the
4226 * TSR is being flushed and SOUT is being used
4227 * for the break signal.
4228 */
4229 async->async_flags |= ASYNC_BREAK;
4230 asy_wait_baudrate(asy);
4231 /*
4232 * Arrange for "async_restart"
4233 * to be called in 1/4 second;
4234 * it will turn the break bit off, and call
4235 * "async_start" to grab the next message.
4236 */
4237 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
4238 mutex_exit(&asy->asy_excl_hi);
4239 (void) timeout(async_restart, (caddr_t)async,
4240 drv_usectohz(1000000)/4);
4241 } else {
4242 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4243 "wait for flush");
4244 mutex_enter(&asy->asy_excl_hi);
4245 asy_waiteot(asy);
4246 mutex_exit(&asy->asy_excl_hi);
4247 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4248 "ldterm satisfied");
4249 }
4250 break;
4251
4252 case TIOCSBRK:
4253 if (!(async->async_flags & ASYNC_OUT_SUSPEND)) {
4254 mutex_enter(&asy->asy_excl_hi);
4255 async->async_flags |= ASYNC_OUT_SUSPEND;
4256 async->async_flags |= ASYNC_HOLD_UTBRK;
4257 asy_wait_baudrate(asy);
4258 mutex_exit(&asy->asy_excl_hi);
4259 /* wait for 100ms to hold BREAK */
4260 async->async_utbrktid =
4261 timeout((void (*)())async_hold_utbrk,
4262 (caddr_t)async,
4263 drv_usectohz(asy_min_utbrk));
4264 }
4265 mioc2ack(mp, NULL, 0, 0);
4266 break;
4267
4268 case TIOCCBRK:
4269 if (async->async_flags & ASYNC_OUT_SUSPEND)
4270 async_resume_utbrk(async);
4271 mioc2ack(mp, NULL, 0, 0);
4272 break;
4273
4274 case TIOCMSET:
4275 case TIOCMBIS:
4276 case TIOCMBIC:
4277 if (iocp->ioc_count != TRANSPARENT) {
4278 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4279 "non-transparent");
4280
4281 error = miocpullup(mp, sizeof (int));
4282 if (error != 0)
4283 break;
4284
4285 mutex_enter(&asy->asy_excl_hi);
4286 (void) asymctl(asy,
4287 dmtoasy(asy, *(int *)mp->b_cont->b_rptr),
4288 iocp->ioc_cmd);
4289 mutex_exit(&asy->asy_excl_hi);
4290 iocp->ioc_error = 0;
4291 mp->b_datap->db_type = M_IOCACK;
4292 } else {
4293 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4294 "transparent");
4295 mcopyin(mp, NULL, sizeof (int), NULL);
4296 }
4297 break;
4298
4299 case TIOCMGET:
4300 datamp = allocb(sizeof (int), BPRI_MED);
4301 if (datamp == NULL) {
4302 error = EAGAIN;
4303 break;
4304 }
4305
4306 mutex_enter(&asy->asy_excl_hi);
4307 *(int *)datamp->b_rptr = asymctl(asy, 0, TIOCMGET);
4308 mutex_exit(&asy->asy_excl_hi);
4309
4310 if (iocp->ioc_count == TRANSPARENT) {
4311 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4312 "transparent");
4313 mcopyout(mp, NULL, sizeof (int), NULL, datamp);
4314 } else {
4315 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4316 "non-transparent");
4317 mioc2ack(mp, datamp, sizeof (int), 0);
4318 }
4319 break;
4320
4321 case CONSOPENPOLLEDIO:
4322 error = miocpullup(mp, sizeof (struct cons_polledio *));
4323 if (error != 0)
4324 break;
4325
4326 *(struct cons_polledio **)mp->b_cont->b_rptr =
4327 &asy->polledio;
4328
4329 mp->b_datap->db_type = M_IOCACK;
4330 break;
4331
4332 case CONSCLOSEPOLLEDIO:
4333 mp->b_datap->db_type = M_IOCACK;
4334 iocp->ioc_error = 0;
4335 iocp->ioc_rval = 0;
4336 break;
4337
4338 case CONSSETABORTENABLE:
4339 error = secpolicy_console(iocp->ioc_cr);
4340 if (error != 0)
4341 break;
4342
4343 if (iocp->ioc_count != TRANSPARENT) {
4344 error = EINVAL;
4345 break;
4346 }
4347
4348 mutex_enter(&asy->asy_excl_hi);
4349 if (*(intptr_t *)mp->b_cont->b_rptr)
4350 asy->asy_flags |= ASY_CONSOLE;
4351 else
4352 asy->asy_flags &= ~ASY_CONSOLE;
4353 mutex_exit(&asy->asy_excl_hi);
4354
4355 mp->b_datap->db_type = M_IOCACK;
4356 iocp->ioc_error = 0;
4357 iocp->ioc_rval = 0;
4358 break;
4359
4360 case CONSGETABORTENABLE:
4361 /*CONSTANTCONDITION*/
4362 ASSERT(sizeof (boolean_t) <= sizeof (boolean_t *));
4363 /*
4364 * Store the return value right in the payload
4365 * we were passed. Crude.
4366 */
4367 mcopyout(mp, NULL, sizeof (boolean_t), NULL, NULL);
4368 *(boolean_t *)mp->b_cont->b_rptr =
4369 (asy->asy_flags & ASY_CONSOLE) != 0;
4370 break;
4371
4372 default:
4373 /*
4374 * If we don't understand it, it's an error. NAK it.
4375 */
4376 error = EINVAL;
4377 break;
4378 }
4379 }
4380 if (error != 0) {
4381 iocp->ioc_error = error;
4382 mp->b_datap->db_type = M_IOCNAK;
4383 }
4384 mutex_exit(&asy->asy_excl);
4385 qreply(wq, mp);
4386 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
4387 }
4388
4389 static int
asyrsrv(queue_t * q)4390 asyrsrv(queue_t *q)
4391 {
4392 mblk_t *bp;
4393 struct asyncline *async;
4394 struct asycom *asy;
4395
4396 async = (struct asyncline *)q->q_ptr;
4397 asy = (struct asycom *)async->async_common;
4398
4399 while (canputnext(q) && (bp = getq(q)))
4400 putnext(q, bp);
4401 mutex_enter(&asy->asy_excl_hi);
4402 asysetsoft(asy);
4403 mutex_exit(&asy->asy_excl_hi);
4404 async->async_polltid = 0;
4405 return (0);
4406 }
4407
4408 /*
4409 * The ASYWPUTDO_NOT_SUSP macro indicates to asywputdo() whether it should
4410 * handle messages as though the driver is operating normally or is
4411 * suspended. In the suspended case, some or all of the processing may have
4412 * to be delayed until the driver is resumed.
4413 */
4414 #define ASYWPUTDO_NOT_SUSP(async, wput) \
4415 !((wput) && ((async)->async_flags & ASYNC_DDI_SUSPENDED))
4416
4417 /*
4418 * Processing for write queue put procedure.
4419 * Respond to M_STOP, M_START, M_IOCTL, and M_FLUSH messages here;
4420 * set the flow control character for M_STOPI and M_STARTI messages;
4421 * queue up M_BREAK, M_DELAY, and M_DATA messages for processing
4422 * by the start routine, and then call the start routine; discard
4423 * everything else. Note that this driver does not incorporate any
4424 * mechanism to negotiate to handle the canonicalization process.
4425 * It expects that these functions are handled in upper module(s),
4426 * as we do in ldterm.
4427 */
4428 static int
asywputdo(queue_t * q,mblk_t * mp,boolean_t wput)4429 asywputdo(queue_t *q, mblk_t *mp, boolean_t wput)
4430 {
4431 struct asyncline *async;
4432 struct asycom *asy;
4433 int error;
4434
4435 async = (struct asyncline *)q->q_ptr;
4436 asy = async->async_common;
4437
4438 switch (mp->b_datap->db_type) {
4439
4440 case M_STOP:
4441 /*
4442 * Since we don't do real DMA, we can just let the
4443 * chip coast to a stop after applying the brakes.
4444 */
4445 mutex_enter(&asy->asy_excl);
4446 async->async_flags |= ASYNC_STOPPED;
4447 mutex_exit(&asy->asy_excl);
4448 freemsg(mp);
4449 break;
4450
4451 case M_START:
4452 mutex_enter(&asy->asy_excl);
4453 if (async->async_flags & ASYNC_STOPPED) {
4454 async->async_flags &= ~ASYNC_STOPPED;
4455 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4456 /*
4457 * If an output operation is in progress,
4458 * resume it. Otherwise, prod the start
4459 * routine.
4460 */
4461 if (async->async_ocnt > 0) {
4462 mutex_enter(&asy->asy_excl_hi);
4463 async_resume(async);
4464 mutex_exit(&asy->asy_excl_hi);
4465 } else {
4466 async_start(async);
4467 }
4468 }
4469 }
4470 mutex_exit(&asy->asy_excl);
4471 freemsg(mp);
4472 break;
4473
4474 case M_IOCTL:
4475 switch (((struct iocblk *)mp->b_rptr)->ioc_cmd) {
4476
4477 case TCSBRK:
4478 error = miocpullup(mp, sizeof (int));
4479 if (error != 0) {
4480 miocnak(q, mp, 0, error);
4481 return (0);
4482 }
4483
4484 if (*(int *)mp->b_cont->b_rptr != 0) {
4485 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4486 "flush request");
4487 (void) putq(q, mp);
4488
4489 mutex_enter(&asy->asy_excl);
4490 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4491 /*
4492 * If an TIOCSBRK is in progress,
4493 * clean it as TIOCCBRK does,
4494 * then kick off output.
4495 * If TIOCSBRK is not in progress,
4496 * just kick off output.
4497 */
4498 async_resume_utbrk(async);
4499 }
4500 mutex_exit(&asy->asy_excl);
4501 break;
4502 }
4503 /*FALLTHROUGH*/
4504 case TCSETSW:
4505 case TCSETSF:
4506 case TCSETAW:
4507 case TCSETAF:
4508 /*
4509 * The changes do not take effect until all
4510 * output queued before them is drained.
4511 * Put this message on the queue, so that
4512 * "async_start" will see it when it's done
4513 * with the output before it. Poke the
4514 * start routine, just in case.
4515 */
4516 (void) putq(q, mp);
4517
4518 mutex_enter(&asy->asy_excl);
4519 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4520 /*
4521 * If an TIOCSBRK is in progress,
4522 * clean it as TIOCCBRK does.
4523 * then kick off output.
4524 * If TIOCSBRK is not in progress,
4525 * just kick off output.
4526 */
4527 async_resume_utbrk(async);
4528 }
4529 mutex_exit(&asy->asy_excl);
4530 break;
4531
4532 default:
4533 /*
4534 * Do it now.
4535 */
4536 mutex_enter(&asy->asy_excl);
4537 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4538 mutex_exit(&asy->asy_excl);
4539 async_ioctl(async, q, mp);
4540 break;
4541 }
4542 async_put_suspq(asy, mp);
4543 mutex_exit(&asy->asy_excl);
4544 break;
4545 }
4546 break;
4547
4548 case M_FLUSH:
4549 if (*mp->b_rptr & FLUSHW) {
4550 mutex_enter(&asy->asy_excl);
4551
4552 /*
4553 * Abort any output in progress.
4554 */
4555 mutex_enter(&asy->asy_excl_hi);
4556 if (async->async_flags & ASYNC_BUSY) {
4557 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
4558 "Clearing async_ocnt, "
4559 "leaving ASYNC_BUSY set");
4560 async->async_ocnt = 0;
4561 async->async_flags &= ~ASYNC_BUSY;
4562 } /* if */
4563
4564 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4565 /* Flush FIFO buffers */
4566 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
4567 asy_reset_fifo(asy, ASY_FCR_THR_FL);
4568 }
4569 }
4570 mutex_exit(&asy->asy_excl_hi);
4571
4572 /*
4573 * Flush our write queue.
4574 */
4575 flushq(q, FLUSHDATA); /* XXX doesn't flush M_DELAY */
4576 if (async->async_xmitblk != NULL) {
4577 freeb(async->async_xmitblk);
4578 async->async_xmitblk = NULL;
4579 }
4580 mutex_exit(&asy->asy_excl);
4581 *mp->b_rptr &= ~FLUSHW; /* it has been flushed */
4582 }
4583 if (*mp->b_rptr & FLUSHR) {
4584 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4585 mutex_enter(&asy->asy_excl);
4586 mutex_enter(&asy->asy_excl_hi);
4587 /* Flush FIFO buffers */
4588 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
4589 asy_reset_fifo(asy, ASY_FCR_RHR_FL);
4590 }
4591 mutex_exit(&asy->asy_excl_hi);
4592 mutex_exit(&asy->asy_excl);
4593 }
4594 flushq(RD(q), FLUSHDATA);
4595 qreply(q, mp); /* give the read queues a crack at it */
4596 } else {
4597 freemsg(mp);
4598 }
4599
4600 /*
4601 * We must make sure we process messages that survive the
4602 * write-side flush.
4603 */
4604 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4605 mutex_enter(&asy->asy_excl);
4606 async_start(async);
4607 mutex_exit(&asy->asy_excl);
4608 }
4609 break;
4610
4611 case M_BREAK:
4612 case M_DELAY:
4613 case M_DATA:
4614 /*
4615 * Queue the message up to be transmitted,
4616 * and poke the start routine.
4617 */
4618 (void) putq(q, mp);
4619 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4620 mutex_enter(&asy->asy_excl);
4621 async_start(async);
4622 mutex_exit(&asy->asy_excl);
4623 }
4624 break;
4625
4626 case M_STOPI:
4627 mutex_enter(&asy->asy_excl);
4628 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4629 mutex_enter(&asy->asy_excl_hi);
4630 if (!(async->async_inflow_source & IN_FLOW_USER)) {
4631 async_flowcontrol_hw_input(asy, FLOW_STOP,
4632 IN_FLOW_USER);
4633 (void) async_flowcontrol_sw_input(asy,
4634 FLOW_STOP, IN_FLOW_USER);
4635 }
4636 mutex_exit(&asy->asy_excl_hi);
4637 mutex_exit(&asy->asy_excl);
4638 freemsg(mp);
4639 break;
4640 }
4641 async_put_suspq(asy, mp);
4642 mutex_exit(&asy->asy_excl);
4643 break;
4644
4645 case M_STARTI:
4646 mutex_enter(&asy->asy_excl);
4647 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4648 mutex_enter(&asy->asy_excl_hi);
4649 if (async->async_inflow_source & IN_FLOW_USER) {
4650 async_flowcontrol_hw_input(asy, FLOW_START,
4651 IN_FLOW_USER);
4652 (void) async_flowcontrol_sw_input(asy,
4653 FLOW_START, IN_FLOW_USER);
4654 }
4655 mutex_exit(&asy->asy_excl_hi);
4656 mutex_exit(&asy->asy_excl);
4657 freemsg(mp);
4658 break;
4659 }
4660 async_put_suspq(asy, mp);
4661 mutex_exit(&asy->asy_excl);
4662 break;
4663
4664 case M_CTL:
4665 if (MBLKL(mp) >= sizeof (struct iocblk) &&
4666 ((struct iocblk *)mp->b_rptr)->ioc_cmd == MC_POSIXQUERY) {
4667 mutex_enter(&asy->asy_excl);
4668 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4669 ((struct iocblk *)mp->b_rptr)->ioc_cmd =
4670 MC_HAS_POSIX;
4671 mutex_exit(&asy->asy_excl);
4672 qreply(q, mp);
4673 break;
4674 } else {
4675 async_put_suspq(asy, mp);
4676 }
4677 } else {
4678 /*
4679 * These MC_SERVICE type messages are used by upper
4680 * modules to tell this driver to send input up
4681 * immediately, or that it can wait for normal
4682 * processing that may or may not be done. Sun
4683 * requires these for the mouse module.
4684 * (XXX - for x86?)
4685 */
4686 mutex_enter(&asy->asy_excl);
4687 switch (*mp->b_rptr) {
4688
4689 case MC_SERVICEIMM:
4690 async->async_flags |= ASYNC_SERVICEIMM;
4691 break;
4692
4693 case MC_SERVICEDEF:
4694 async->async_flags &= ~ASYNC_SERVICEIMM;
4695 break;
4696 }
4697 mutex_exit(&asy->asy_excl);
4698 freemsg(mp);
4699 }
4700 break;
4701
4702 case M_IOCDATA:
4703 mutex_enter(&asy->asy_excl);
4704 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4705 mutex_exit(&asy->asy_excl);
4706 async_iocdata(q, mp);
4707 break;
4708 }
4709 async_put_suspq(asy, mp);
4710 mutex_exit(&asy->asy_excl);
4711 break;
4712
4713 default:
4714 freemsg(mp);
4715 break;
4716 }
4717 return (0);
4718 }
4719
4720 static int
asywput(queue_t * q,mblk_t * mp)4721 asywput(queue_t *q, mblk_t *mp)
4722 {
4723 return (asywputdo(q, mp, B_TRUE));
4724 }
4725
4726 /*
4727 * Retry an "ioctl", now that "bufcall" claims we may be able to allocate
4728 * the buffer we need.
4729 */
4730 static void
async_reioctl(void * unit)4731 async_reioctl(void *unit)
4732 {
4733 int instance = (uintptr_t)unit;
4734 struct asyncline *async;
4735 struct asycom *asy;
4736 queue_t *q;
4737 mblk_t *mp;
4738
4739 asy = ddi_get_soft_state(asy_soft_state, instance);
4740 ASSERT(asy != NULL);
4741 async = asy->asy_priv;
4742
4743 /*
4744 * The bufcall is no longer pending.
4745 */
4746 mutex_enter(&asy->asy_excl);
4747 async->async_wbufcid = 0;
4748 if ((q = async->async_ttycommon.t_writeq) == NULL) {
4749 mutex_exit(&asy->asy_excl);
4750 return;
4751 }
4752 if ((mp = async->async_ttycommon.t_iocpending) != NULL) {
4753 /* not pending any more */
4754 async->async_ttycommon.t_iocpending = NULL;
4755 mutex_exit(&asy->asy_excl);
4756 async_ioctl(async, q, mp);
4757 } else
4758 mutex_exit(&asy->asy_excl);
4759 }
4760
4761 static void
async_iocdata(queue_t * q,mblk_t * mp)4762 async_iocdata(queue_t *q, mblk_t *mp)
4763 {
4764 struct asyncline *async = (struct asyncline *)q->q_ptr;
4765 struct asycom *asy;
4766 struct iocblk *ip;
4767 struct copyresp *csp;
4768 #ifdef DEBUG
4769 int instance = UNIT(async->async_dev);
4770 #endif
4771
4772 asy = async->async_common;
4773 ip = (struct iocblk *)mp->b_rptr;
4774 csp = (struct copyresp *)mp->b_rptr;
4775
4776 if (csp->cp_rval != 0) {
4777 if (csp->cp_private)
4778 freemsg(csp->cp_private);
4779 freemsg(mp);
4780 return;
4781 }
4782
4783 mutex_enter(&asy->asy_excl);
4784 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "case %s",
4785 csp->cp_cmd == TIOCMGET ? "TIOCMGET" :
4786 csp->cp_cmd == TIOCMSET ? "TIOCMSET" :
4787 csp->cp_cmd == TIOCMBIS ? "TIOCMBIS" :
4788 "TIOCMBIC");
4789 switch (csp->cp_cmd) {
4790
4791 case TIOCMGET:
4792 if (mp->b_cont) {
4793 freemsg(mp->b_cont);
4794 mp->b_cont = NULL;
4795 }
4796 mp->b_datap->db_type = M_IOCACK;
4797 ip->ioc_error = 0;
4798 ip->ioc_count = 0;
4799 ip->ioc_rval = 0;
4800 mp->b_wptr = mp->b_rptr + sizeof (struct iocblk);
4801 break;
4802
4803 case TIOCMSET:
4804 case TIOCMBIS:
4805 case TIOCMBIC:
4806 mutex_enter(&asy->asy_excl_hi);
4807 (void) asymctl(asy, dmtoasy(asy, *(int *)mp->b_cont->b_rptr),
4808 csp->cp_cmd);
4809 mutex_exit(&asy->asy_excl_hi);
4810 mioc2ack(mp, NULL, 0, 0);
4811 break;
4812
4813 default:
4814 mp->b_datap->db_type = M_IOCNAK;
4815 ip->ioc_error = EINVAL;
4816 break;
4817 }
4818 qreply(q, mp);
4819 mutex_exit(&asy->asy_excl);
4820 }
4821
4822 /*
4823 * debugger/console support routines.
4824 */
4825
4826 /*
4827 * put a character out
4828 * Do not use interrupts. If char is LF, put out CR, LF.
4829 */
4830 static void
asyputchar(cons_polledio_arg_t arg,uchar_t c)4831 asyputchar(cons_polledio_arg_t arg, uchar_t c)
4832 {
4833 struct asycom *asy = (struct asycom *)arg;
4834
4835 if (c == '\n')
4836 asyputchar(arg, '\r');
4837
4838 while ((asy_get_reg(asy, ASY_LSR) & ASY_LSR_THRE) == 0) {
4839 /* wait for xmit to finish */
4840 drv_usecwait(10);
4841 }
4842
4843 /* put the character out */
4844 asy_put_reg(asy, ASY_THR, c);
4845 }
4846
4847 /*
4848 * See if there's a character available. If no character is
4849 * available, return 0. Run in polled mode, no interrupts.
4850 */
4851 static boolean_t
asyischar(cons_polledio_arg_t arg)4852 asyischar(cons_polledio_arg_t arg)
4853 {
4854 struct asycom *asy = (struct asycom *)arg;
4855
4856 return ((asy_get_reg(asy, ASY_LSR) & ASY_LSR_DR) != 0);
4857 }
4858
4859 /*
4860 * Get a character. Run in polled mode, no interrupts.
4861 */
4862 static int
asygetchar(cons_polledio_arg_t arg)4863 asygetchar(cons_polledio_arg_t arg)
4864 {
4865 struct asycom *asy = (struct asycom *)arg;
4866
4867 while (!asyischar(arg))
4868 drv_usecwait(10);
4869 return (asy_get_reg(asy, ASY_RHR));
4870 }
4871
4872 /*
4873 * Set or get the modem control status.
4874 */
4875 static int
asymctl(struct asycom * asy,int bits,int how)4876 asymctl(struct asycom *asy, int bits, int how)
4877 {
4878 int mcr_r, msr_r;
4879 int instance = asy->asy_unit;
4880
4881 ASSERT(mutex_owned(&asy->asy_excl_hi));
4882 ASSERT(mutex_owned(&asy->asy_excl));
4883
4884 /* Read Modem Control Registers */
4885 mcr_r = asy_get(asy, ASY_MCR);
4886
4887 switch (how) {
4888
4889 case TIOCMSET:
4890 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMSET, bits = %x", bits);
4891 mcr_r = bits; /* Set bits */
4892 break;
4893
4894 case TIOCMBIS:
4895 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMBIS, bits = %x", bits);
4896 mcr_r |= bits; /* Mask in bits */
4897 break;
4898
4899 case TIOCMBIC:
4900 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMBIC, bits = %x", bits);
4901 mcr_r &= ~bits; /* Mask out bits */
4902 break;
4903
4904 case TIOCMGET:
4905 /* Read Modem Status Registers */
4906 /*
4907 * If modem interrupts are enabled, we return the
4908 * saved value of msr. We read MSR only in async_msint()
4909 */
4910 if (asy_get(asy, ASY_IER) & ASY_IER_MIEN) {
4911 msr_r = asy->asy_msr;
4912 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
4913 "TIOCMGET, read msr_r = %x", msr_r);
4914 } else {
4915 msr_r = asy_get(asy, ASY_MSR);
4916 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
4917 "TIOCMGET, read MSR = %x", msr_r);
4918 }
4919 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "modem_lines = %x",
4920 asytodm(mcr_r, msr_r));
4921 return (asytodm(mcr_r, msr_r));
4922 }
4923
4924 asy_put(asy, ASY_MCR, mcr_r);
4925
4926 return (mcr_r);
4927 }
4928
4929 static int
asytodm(int mcr_r,int msr_r)4930 asytodm(int mcr_r, int msr_r)
4931 {
4932 int b = 0;
4933
4934 /* MCR registers */
4935 if (mcr_r & ASY_MCR_RTS)
4936 b |= TIOCM_RTS;
4937
4938 if (mcr_r & ASY_MCR_DTR)
4939 b |= TIOCM_DTR;
4940
4941 /* MSR registers */
4942 if (msr_r & ASY_MSR_DCD)
4943 b |= TIOCM_CAR;
4944
4945 if (msr_r & ASY_MSR_CTS)
4946 b |= TIOCM_CTS;
4947
4948 if (msr_r & ASY_MSR_DSR)
4949 b |= TIOCM_DSR;
4950
4951 if (msr_r & ASY_MSR_RI)
4952 b |= TIOCM_RNG;
4953 return (b);
4954 }
4955
4956 static int
dmtoasy(struct asycom * asy,int bits)4957 dmtoasy(struct asycom *asy, int bits)
4958 {
4959 int b = 0;
4960
4961 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "bits = %x", bits);
4962 #ifdef CAN_NOT_SET /* only DTR and RTS can be set */
4963 if (bits & TIOCM_CAR)
4964 b |= ASY_MSR_DCD;
4965 if (bits & TIOCM_CTS)
4966 b |= ASY_MSR_CTS;
4967 if (bits & TIOCM_DSR)
4968 b |= ASY_MSR_DSR;
4969 if (bits & TIOCM_RNG)
4970 b |= ASY_MSR_RI;
4971 #endif
4972
4973 if (bits & TIOCM_RTS) {
4974 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "set b & RTS");
4975 b |= ASY_MCR_RTS;
4976 }
4977 if (bits & TIOCM_DTR) {
4978 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "set b & DTR");
4979 b |= ASY_MCR_DTR;
4980 }
4981
4982 return (b);
4983 }
4984
4985 static void
asyerror(const struct asycom * asy,int level,const char * fmt,...)4986 asyerror(const struct asycom *asy, int level, const char *fmt, ...)
4987 {
4988 va_list adx;
4989 static time_t last;
4990 static const char *lastfmt;
4991 time_t now;
4992
4993 /*
4994 * Don't print the same error message too often.
4995 * Print the message only if we have not printed the
4996 * message within the last second.
4997 * Note: that fmt cannot be a pointer to a string
4998 * stored on the stack. The fmt pointer
4999 * must be in the data segment otherwise lastfmt would point
5000 * to non-sense.
5001 */
5002 now = gethrestime_sec();
5003 if (last == now && lastfmt == fmt)
5004 return;
5005
5006 last = now;
5007 lastfmt = fmt;
5008
5009 va_start(adx, fmt);
5010 vdev_err(asy->asy_dip, level, fmt, adx);
5011 va_end(adx);
5012 }
5013
5014 /*
5015 * asy_parse_mode(dev_info_t *devi, struct asycom *asy)
5016 * The value of this property is in the form of "9600,8,n,1,-"
5017 * 1) speed: 9600, 4800, ...
5018 * 2) data bits
5019 * 3) parity: n(none), e(even), o(odd)
5020 * 4) stop bits
5021 * 5) handshake: -(none), h(hardware: rts/cts), s(software: xon/off)
5022 *
5023 * This parsing came from a SPARCstation eeprom.
5024 */
5025 static void
asy_parse_mode(dev_info_t * devi,struct asycom * asy)5026 asy_parse_mode(dev_info_t *devi, struct asycom *asy)
5027 {
5028 char name[40];
5029 char val[40];
5030 int len;
5031 int ret;
5032 char *p;
5033 char *p1;
5034
5035 ASSERT(asy->asy_com_port != 0);
5036
5037 /*
5038 * Parse the ttyx-mode property
5039 */
5040 (void) sprintf(name, "tty%c-mode", asy->asy_com_port + 'a' - 1);
5041 len = sizeof (val);
5042 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
5043 if (ret != DDI_PROP_SUCCESS) {
5044 (void) sprintf(name, "com%c-mode", asy->asy_com_port + '0');
5045 len = sizeof (val);
5046 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
5047 }
5048
5049 /* no property to parse */
5050 asy->asy_cflag = 0;
5051 if (ret != DDI_PROP_SUCCESS)
5052 return;
5053
5054 p = val;
5055 /* ---- baud rate ---- */
5056 asy->asy_cflag = CREAD|B9600; /* initial default */
5057 if (p && (p1 = strchr(p, ',')) != 0) {
5058 *p1++ = '\0';
5059 } else {
5060 asy->asy_cflag |= ASY_LCR_BITS8; /* add default bits */
5061 return;
5062 }
5063
5064 if (strcmp(p, "110") == 0)
5065 asy->asy_bidx = B110;
5066 else if (strcmp(p, "150") == 0)
5067 asy->asy_bidx = B150;
5068 else if (strcmp(p, "300") == 0)
5069 asy->asy_bidx = B300;
5070 else if (strcmp(p, "600") == 0)
5071 asy->asy_bidx = B600;
5072 else if (strcmp(p, "1200") == 0)
5073 asy->asy_bidx = B1200;
5074 else if (strcmp(p, "2400") == 0)
5075 asy->asy_bidx = B2400;
5076 else if (strcmp(p, "4800") == 0)
5077 asy->asy_bidx = B4800;
5078 else if (strcmp(p, "9600") == 0)
5079 asy->asy_bidx = B9600;
5080 else if (strcmp(p, "19200") == 0)
5081 asy->asy_bidx = B19200;
5082 else if (strcmp(p, "38400") == 0)
5083 asy->asy_bidx = B38400;
5084 else if (strcmp(p, "57600") == 0)
5085 asy->asy_bidx = B57600;
5086 else if (strcmp(p, "115200") == 0)
5087 asy->asy_bidx = B115200;
5088 else
5089 asy->asy_bidx = B9600;
5090
5091 asy->asy_cflag &= ~CBAUD;
5092 if (asy->asy_bidx > CBAUD) { /* > 38400 uses the CBAUDEXT bit */
5093 asy->asy_cflag |= CBAUDEXT;
5094 asy->asy_cflag |= asy->asy_bidx - CBAUD - 1;
5095 } else {
5096 asy->asy_cflag |= asy->asy_bidx;
5097 }
5098
5099 ASSERT(asy->asy_bidx == BAUDINDEX(asy->asy_cflag));
5100
5101 /* ---- Next item is data bits ---- */
5102 p = p1;
5103 if (p && (p1 = strchr(p, ',')) != 0) {
5104 *p1++ = '\0';
5105 } else {
5106 asy->asy_cflag |= ASY_LCR_BITS8; /* add default bits */
5107 return;
5108 }
5109 switch (*p) {
5110 default:
5111 case '8':
5112 asy->asy_cflag |= CS8;
5113 asy->asy_lcr = ASY_LCR_BITS8;
5114 break;
5115 case '7':
5116 asy->asy_cflag |= CS7;
5117 asy->asy_lcr = ASY_LCR_BITS7;
5118 break;
5119 case '6':
5120 asy->asy_cflag |= CS6;
5121 asy->asy_lcr = ASY_LCR_BITS6;
5122 break;
5123 case '5':
5124 /* LINTED: CS5 is currently zero (but might change) */
5125 asy->asy_cflag |= CS5;
5126 asy->asy_lcr = ASY_LCR_BITS5;
5127 break;
5128 }
5129
5130 /* ---- Parity info ---- */
5131 p = p1;
5132 if (p && (p1 = strchr(p, ',')) != 0) {
5133 *p1++ = '\0';
5134 } else {
5135 return;
5136 }
5137 switch (*p) {
5138 default:
5139 case 'n':
5140 break;
5141 case 'e':
5142 asy->asy_cflag |= PARENB;
5143 asy->asy_lcr |= ASY_LCR_PEN;
5144 break;
5145 case 'o':
5146 asy->asy_cflag |= PARENB|PARODD;
5147 asy->asy_lcr |= ASY_LCR_PEN | ASY_LCR_EPS;
5148 break;
5149 }
5150
5151 /* ---- Find stop bits ---- */
5152 p = p1;
5153 if (p && (p1 = strchr(p, ',')) != 0) {
5154 *p1++ = '\0';
5155 } else {
5156 return;
5157 }
5158 if (*p == '2') {
5159 asy->asy_cflag |= CSTOPB;
5160 asy->asy_lcr |= ASY_LCR_STB;
5161 }
5162
5163 /* ---- handshake is next ---- */
5164 p = p1;
5165 if (p) {
5166 if ((p1 = strchr(p, ',')) != 0)
5167 *p1++ = '\0';
5168
5169 if (*p == 'h')
5170 asy->asy_cflag |= CRTSCTS;
5171 else if (*p == 's')
5172 asy->asy_cflag |= CRTSXOFF;
5173 }
5174 }
5175
5176 /*
5177 * Check for abort character sequence
5178 */
5179 static boolean_t
abort_charseq_recognize(uchar_t ch)5180 abort_charseq_recognize(uchar_t ch)
5181 {
5182 static int state = 0;
5183 #define CNTRL(c) ((c)&037)
5184 static char sequence[] = { '\r', '~', CNTRL('b') };
5185
5186 if (ch == sequence[state]) {
5187 if (++state >= sizeof (sequence)) {
5188 state = 0;
5189 return (B_TRUE);
5190 }
5191 } else {
5192 state = (ch == sequence[0]) ? 1 : 0;
5193 }
5194 return (B_FALSE);
5195 }
5196
5197 /*
5198 * Flow control functions
5199 */
5200 /*
5201 * Software input flow control
5202 * This function can execute software input flow control sucessfully
5203 * at most of situations except that the line is in BREAK status
5204 * (timed and untimed break).
5205 * INPUT VALUE of onoff:
5206 * FLOW_START means to send out a XON char
5207 * and clear SW input flow control flag.
5208 * FLOW_STOP means to send out a XOFF char
5209 * and set SW input flow control flag.
5210 * FLOW_CHECK means to check whether there is pending XON/XOFF
5211 * if it is true, send it out.
5212 * INPUT VALUE of type:
5213 * IN_FLOW_RINGBUFF means flow control is due to RING BUFFER
5214 * IN_FLOW_STREAMS means flow control is due to STREAMS
5215 * IN_FLOW_USER means flow control is due to user's commands
5216 * RETURN VALUE: B_FALSE means no flow control char is sent
5217 * B_TRUE means one flow control char is sent
5218 */
5219 static boolean_t
async_flowcontrol_sw_input(struct asycom * asy,async_flowc_action onoff,int type)5220 async_flowcontrol_sw_input(struct asycom *asy, async_flowc_action onoff,
5221 int type)
5222 {
5223 struct asyncline *async = asy->asy_priv;
5224 int instance = UNIT(async->async_dev);
5225 int rval = B_FALSE;
5226
5227 ASSERT(mutex_owned(&asy->asy_excl_hi));
5228
5229 if (!(async->async_ttycommon.t_iflag & IXOFF))
5230 return (rval);
5231
5232 /*
5233 * If we get this far, then we know IXOFF is set.
5234 */
5235 switch (onoff) {
5236 case FLOW_STOP:
5237 async->async_inflow_source |= type;
5238
5239 /*
5240 * We'll send an XOFF character for each of up to
5241 * three different input flow control attempts to stop input.
5242 * If we already send out one XOFF, but FLOW_STOP comes again,
5243 * it seems that input flow control becomes more serious,
5244 * then send XOFF again.
5245 */
5246 if (async->async_inflow_source & (IN_FLOW_RINGBUFF |
5247 IN_FLOW_STREAMS | IN_FLOW_USER))
5248 async->async_flags |= ASYNC_SW_IN_FLOW |
5249 ASYNC_SW_IN_NEEDED;
5250 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "input sflow stop, type = %x",
5251 async->async_inflow_source);
5252 break;
5253 case FLOW_START:
5254 async->async_inflow_source &= ~type;
5255 if (async->async_inflow_source == 0) {
5256 async->async_flags = (async->async_flags &
5257 ~ASYNC_SW_IN_FLOW) | ASYNC_SW_IN_NEEDED;
5258 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "input sflow start");
5259 }
5260 break;
5261 default:
5262 break;
5263 }
5264
5265 if (((async->async_flags & (ASYNC_SW_IN_NEEDED | ASYNC_BREAK |
5266 ASYNC_OUT_SUSPEND)) == ASYNC_SW_IN_NEEDED) &&
5267 (asy_get(asy, ASY_LSR) & ASY_LSR_THRE)) {
5268 /*
5269 * If we get this far, then we know we need to send out
5270 * XON or XOFF char.
5271 */
5272 async->async_flags = (async->async_flags &
5273 ~ASYNC_SW_IN_NEEDED) | ASYNC_BUSY;
5274 asy_put(asy, ASY_THR,
5275 async->async_flags & ASYNC_SW_IN_FLOW ?
5276 async->async_stopc : async->async_startc);
5277 rval = B_TRUE;
5278 }
5279 return (rval);
5280 }
5281
5282 /*
5283 * Software output flow control
5284 * This function can be executed sucessfully at any situation.
5285 * It does not handle HW, and just change the SW output flow control flag.
5286 * INPUT VALUE of onoff:
5287 * FLOW_START means to clear SW output flow control flag,
5288 * also combine with HW output flow control status to
5289 * determine if we need to set ASYNC_OUT_FLW_RESUME.
5290 * FLOW_STOP means to set SW output flow control flag,
5291 * also clear ASYNC_OUT_FLW_RESUME.
5292 */
5293 static void
async_flowcontrol_sw_output(struct asycom * asy,async_flowc_action onoff)5294 async_flowcontrol_sw_output(struct asycom *asy, async_flowc_action onoff)
5295 {
5296 struct asyncline *async = asy->asy_priv;
5297 int instance = UNIT(async->async_dev);
5298
5299 ASSERT(mutex_owned(&asy->asy_excl_hi));
5300
5301 if (!(async->async_ttycommon.t_iflag & IXON))
5302 return;
5303
5304 switch (onoff) {
5305 case FLOW_STOP:
5306 async->async_flags |= ASYNC_SW_OUT_FLW;
5307 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
5308 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "output sflow stop");
5309 break;
5310 case FLOW_START:
5311 async->async_flags &= ~ASYNC_SW_OUT_FLW;
5312 if (!(async->async_flags & ASYNC_HW_OUT_FLW))
5313 async->async_flags |= ASYNC_OUT_FLW_RESUME;
5314 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "output sflow start");
5315 break;
5316 default:
5317 break;
5318 }
5319 }
5320
5321 /*
5322 * Hardware input flow control
5323 * This function can be executed sucessfully at any situation.
5324 * It directly changes RTS depending on input parameter onoff.
5325 * INPUT VALUE of onoff:
5326 * FLOW_START means to clear HW input flow control flag,
5327 * and pull up RTS if it is low.
5328 * FLOW_STOP means to set HW input flow control flag,
5329 * and low RTS if it is high.
5330 * INPUT VALUE of type:
5331 * IN_FLOW_RINGBUFF means flow control is due to RING BUFFER
5332 * IN_FLOW_STREAMS means flow control is due to STREAMS
5333 * IN_FLOW_USER means flow control is due to user's commands
5334 */
5335 static void
async_flowcontrol_hw_input(struct asycom * asy,async_flowc_action onoff,int type)5336 async_flowcontrol_hw_input(struct asycom *asy, async_flowc_action onoff,
5337 int type)
5338 {
5339 uchar_t mcr;
5340 uchar_t flag;
5341 struct asyncline *async = asy->asy_priv;
5342 int instance = UNIT(async->async_dev);
5343
5344 ASSERT(mutex_owned(&asy->asy_excl_hi));
5345
5346 if (!(async->async_ttycommon.t_cflag & CRTSXOFF))
5347 return;
5348
5349 switch (onoff) {
5350 case FLOW_STOP:
5351 async->async_inflow_source |= type;
5352 if (async->async_inflow_source & (IN_FLOW_RINGBUFF |
5353 IN_FLOW_STREAMS | IN_FLOW_USER))
5354 async->async_flags |= ASYNC_HW_IN_FLOW;
5355 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "input hflow stop, type = %x",
5356 async->async_inflow_source);
5357 break;
5358 case FLOW_START:
5359 async->async_inflow_source &= ~type;
5360 if (async->async_inflow_source == 0) {
5361 async->async_flags &= ~ASYNC_HW_IN_FLOW;
5362 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "input hflow start");
5363 }
5364 break;
5365 default:
5366 break;
5367 }
5368 mcr = asy_get(asy, ASY_MCR);
5369 flag = (async->async_flags & ASYNC_HW_IN_FLOW) ? 0 : ASY_MCR_RTS;
5370
5371 if (((mcr ^ flag) & ASY_MCR_RTS) != 0) {
5372 asy_put(asy, ASY_MCR, (mcr ^ ASY_MCR_RTS));
5373 }
5374 }
5375
5376 /*
5377 * Hardware output flow control
5378 * This function can execute HW output flow control sucessfully
5379 * at any situation.
5380 * It doesn't really change RTS, and just change
5381 * HW output flow control flag depending on CTS status.
5382 * INPUT VALUE of onoff:
5383 * FLOW_START means to clear HW output flow control flag.
5384 * also combine with SW output flow control status to
5385 * determine if we need to set ASYNC_OUT_FLW_RESUME.
5386 * FLOW_STOP means to set HW output flow control flag.
5387 * also clear ASYNC_OUT_FLW_RESUME.
5388 */
5389 static void
async_flowcontrol_hw_output(struct asycom * asy,async_flowc_action onoff)5390 async_flowcontrol_hw_output(struct asycom *asy, async_flowc_action onoff)
5391 {
5392 struct asyncline *async = asy->asy_priv;
5393 int instance = UNIT(async->async_dev);
5394
5395 ASSERT(mutex_owned(&asy->asy_excl_hi));
5396
5397 if (!(async->async_ttycommon.t_cflag & CRTSCTS))
5398 return;
5399
5400 switch (onoff) {
5401 case FLOW_STOP:
5402 async->async_flags |= ASYNC_HW_OUT_FLW;
5403 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
5404 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "output hflow stop");
5405 break;
5406 case FLOW_START:
5407 async->async_flags &= ~ASYNC_HW_OUT_FLW;
5408 if (!(async->async_flags & ASYNC_SW_OUT_FLW))
5409 async->async_flags |= ASYNC_OUT_FLW_RESUME;
5410 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "output hflow start");
5411 break;
5412 default:
5413 break;
5414 }
5415 }
5416
5417
5418 /*
5419 * quiesce(9E) entry point.
5420 *
5421 * This function is called when the system is single-threaded at high
5422 * PIL with preemption disabled. Therefore, this function must not be
5423 * blocked.
5424 *
5425 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
5426 * DDI_FAILURE indicates an error condition and should almost never happen.
5427 */
5428 static int
asyquiesce(dev_info_t * devi)5429 asyquiesce(dev_info_t *devi)
5430 {
5431 int instance;
5432 struct asycom *asy;
5433
5434 instance = ddi_get_instance(devi); /* find out which unit */
5435
5436 asy = ddi_get_soft_state(asy_soft_state, instance);
5437 if (asy == NULL)
5438 return (DDI_FAILURE);
5439
5440 asy_disable_interrupts(asy, ASY_IER_ALL);
5441
5442 /* Flush the FIFOs */
5443 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
5444
5445 return (DDI_SUCCESS);
5446 }
5447