1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
23 /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */
24 /* All Rights Reserved */
25
26 /*
27 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
28 * Copyright 2012 Milan Jurik. All rights reserved.
29 * Copyright (c) 2016 by Delphix. All rights reserved.
30 * Copyright 2025 Oxide Computer Company
31 * Copyright 2024 Hans Rosenfeld
32 */
33
34
35 /*
36 * Serial I/O driver for 8250/16450/16550A/16650/16750/16950 chips.
37 */
38
39 #include <sys/param.h>
40 #include <sys/types.h>
41 #include <sys/signal.h>
42 #include <sys/stream.h>
43 #include <sys/termio.h>
44 #include <sys/errno.h>
45 #include <sys/file.h>
46 #include <sys/cmn_err.h>
47 #include <sys/stropts.h>
48 #include <sys/strsubr.h>
49 #include <sys/strtty.h>
50 #include <sys/debug.h>
51 #include <sys/kbio.h>
52 #include <sys/cred.h>
53 #include <sys/stat.h>
54 #include <sys/consdev.h>
55 #include <sys/mkdev.h>
56 #include <sys/kmem.h>
57 #include <sys/cred.h>
58 #include <sys/strsun.h>
59 #ifdef DEBUG
60 #include <sys/promif.h>
61 #endif
62 #include <sys/modctl.h>
63 #include <sys/ddi.h>
64 #include <sys/sunddi.h>
65 #include <sys/pci.h>
66 #include <sys/asy.h>
67 #include <sys/policy.h>
68 #include <sys/sysmacros.h>
69
70 /*
71 * set the RX FIFO trigger_level to half the RX FIFO size for now
72 * we may want to make this configurable later.
73 */
74 static int asy_trig_level = ASY_FCR_RHR_TRIG_8;
75
76 int asy_drain_check = 15000000; /* tunable: exit drain check time */
77 int asy_min_dtr_low = 500000; /* tunable: minimum DTR down time */
78 int asy_min_utbrk = 100000; /* tunable: minumum untimed brk time */
79
80 int asymaxchip = ASY_MAXCHIP; /* tunable: limit chip support we look for */
81
82 /*
83 * Just in case someone has a chip with broken loopback mode, we provide a
84 * means to disable the loopback test. By default, we only loopback test
85 * UARTs which look like they have FIFOs bigger than 16 bytes.
86 * Set to 0 to suppress test, or to 2 to enable test on any size FIFO.
87 */
88 int asy_fifo_test = 1; /* tunable: set to 0, 1, or 2 */
89
90 /*
91 * Allow ability to switch off testing of the scratch register.
92 * Some UART emulators might not have it. This will also disable the test
93 * for Exar/Startech ST16C650, as that requires use of the SCR register.
94 */
95 int asy_scr_test = 1; /* tunable: set to 0 to disable SCR reg test */
96
97 /*
98 * As we don't yet support on-chip flow control, it's a bad idea to put a
99 * large number of characters in the TX FIFO, since if other end tells us
100 * to stop transmitting, we can only stop filling the TX FIFO, but it will
101 * still carry on draining by itself, so remote end still gets what's left
102 * in the FIFO.
103 */
104 int asy_max_tx_fifo = 16; /* tunable: max fill of TX FIFO */
105
106 #define async_stopc async_ttycommon.t_stopc
107 #define async_startc async_ttycommon.t_startc
108
109 #define ASY_INIT 1
110 #define ASY_NOINIT 0
111
112 /* enum value for sw and hw flow control action */
113 typedef enum {
114 FLOW_CHECK,
115 FLOW_STOP,
116 FLOW_START
117 } async_flowc_action;
118
119 #ifdef DEBUG
120 #define ASY_DEBUG_INIT 0x0001 /* Output msgs during driver initialization. */
121 #define ASY_DEBUG_INPUT 0x0002 /* Report characters received during int. */
122 #define ASY_DEBUG_EOT 0x0004 /* Output msgs when wait for xmit to finish. */
123 #define ASY_DEBUG_CLOSE 0x0008 /* Output msgs when driver open/close called */
124 #define ASY_DEBUG_HFLOW 0x0010 /* Output msgs when H/W flowcontrol is active */
125 #define ASY_DEBUG_PROCS 0x0020 /* Output each proc name as it is entered. */
126 #define ASY_DEBUG_STATE 0x0040 /* Output value of Interrupt Service Reg. */
127 #define ASY_DEBUG_INTR 0x0080 /* Output value of Interrupt Service Reg. */
128 #define ASY_DEBUG_OUT 0x0100 /* Output msgs about output events. */
129 #define ASY_DEBUG_BUSY 0x0200 /* Output msgs when xmit is enabled/disabled */
130 #define ASY_DEBUG_MODEM 0x0400 /* Output msgs about modem status & control. */
131 #define ASY_DEBUG_MODM2 0x0800 /* Output msgs about modem status & control. */
132 #define ASY_DEBUG_IOCTL 0x1000 /* Output msgs about ioctl messages. */
133 #define ASY_DEBUG_CHIP 0x2000 /* Output msgs about chip identification. */
134 #define ASY_DEBUG_SFLOW 0x4000 /* Output msgs when S/W flowcontrol is active */
135
136 static int debug = 0;
137
138 #define ASY_DEBUG(asy, x) (asy->asy_debug & (x))
139 #define ASY_DPRINTF(asy, fac, format, ...) \
140 if (ASY_DEBUG(asy, fac)) \
141 asyerror(asy, CE_CONT, "!%s: " format, __func__, ##__VA_ARGS__)
142 #else
143 #define ASY_DEBUG(asy, x) B_FALSE
144 #define ASY_DPRINTF(asy, fac, format, ...)
145 #endif
146
147 /*
148 * PPS (Pulse Per Second) support.
149 */
150 void ddi_hardpps(struct timeval *, int);
151 /*
152 * This is protected by the asy_excl_hi of the port on which PPS event
153 * handling is enabled. Note that only one port should have this enabled at
154 * any one time. Enabling PPS handling on multiple ports will result in
155 * unpredictable (but benign) results.
156 */
157 static struct ppsclockev asy_ppsev;
158
159 #ifdef PPSCLOCKLED
160 /* XXX Use these to observe PPS latencies and jitter on a scope */
161 #define LED_ON
162 #define LED_OFF
163 #else
164 #define LED_ON
165 #define LED_OFF
166 #endif
167
168 static void asy_put_idx(const struct asycom *, asy_reg_t, uint8_t);
169 static uint8_t asy_get_idx(const struct asycom *, asy_reg_t);
170
171 static void asy_put_add(const struct asycom *, asy_reg_t, uint8_t);
172 static uint8_t asy_get_add(const struct asycom *, asy_reg_t);
173
174 static void asy_put_ext(const struct asycom *, asy_reg_t, uint8_t);
175 static uint8_t asy_get_ext(const struct asycom *, asy_reg_t);
176
177 static void asy_put_reg(const struct asycom *, asy_reg_t, uint8_t);
178 static uint8_t asy_get_reg(const struct asycom *, asy_reg_t);
179
180 static void asy_put(const struct asycom *, asy_reg_t, uint8_t);
181 static uint8_t asy_get(const struct asycom *, asy_reg_t);
182
183 static void asy_set(const struct asycom *, asy_reg_t, uint8_t);
184 static void asy_clr(const struct asycom *, asy_reg_t, uint8_t);
185
186 static void asy_enable_interrupts(const struct asycom *, uint8_t);
187 static void asy_disable_interrupts(const struct asycom *, uint8_t);
188 static void asy_set_baudrate(const struct asycom *, int);
189 static void asy_wait_baudrate(struct asycom *);
190
191 #define BAUDINDEX(cflg) (((cflg) & CBAUDEXT) ? \
192 (((cflg) & CBAUD) + CBAUD + 1) : ((cflg) & CBAUD))
193
194 static void asysetsoft(struct asycom *);
195 static uint_t asysoftintr(caddr_t, caddr_t);
196 static uint_t asyintr(caddr_t, caddr_t);
197
198 static boolean_t abort_charseq_recognize(uchar_t ch);
199
200 /* The async interrupt entry points */
201 static void async_txint(struct asycom *asy);
202 static void async_rxint(struct asycom *asy, uchar_t lsr);
203 static void async_msint(struct asycom *asy);
204 static void async_softint(struct asycom *asy);
205
206 static void async_ioctl(struct asyncline *async, queue_t *q, mblk_t *mp);
207 static void async_reioctl(void *unit);
208 static void async_iocdata(queue_t *q, mblk_t *mp);
209 static void async_restart(void *arg);
210 static void async_start(struct asyncline *async);
211 static void async_resume(struct asyncline *async);
212 static void asy_program(struct asycom *asy, int mode);
213 static void asyinit(struct asycom *asy);
214 static void asy_waiteot(struct asycom *asy);
215 static void asyputchar(cons_polledio_arg_t, uchar_t c);
216 static int asygetchar(cons_polledio_arg_t);
217 static boolean_t asyischar(cons_polledio_arg_t);
218
219 static int asymctl(struct asycom *, int, int);
220 static int asytodm(int, int);
221 static int dmtoasy(struct asycom *, int);
222 static void asyerror(const struct asycom *, int, const char *, ...)
223 __KPRINTFLIKE(3);
224 static void asy_parse_mode(dev_info_t *devi, struct asycom *asy);
225 static void asy_soft_state_free(struct asycom *);
226 static char *asy_hw_name(struct asycom *asy);
227 static void async_hold_utbrk(void *arg);
228 static void async_resume_utbrk(struct asyncline *async);
229 static void async_dtr_free(struct asyncline *async);
230 static int asy_identify_chip(dev_info_t *devi, struct asycom *asy);
231 static void asy_reset_fifo(struct asycom *asy, uchar_t flags);
232 static void asy_carrier_check(struct asycom *);
233 static int asy_getproperty(dev_info_t *devi, struct asycom *asy,
234 const char *property);
235 static boolean_t async_flowcontrol_sw_input(struct asycom *asy,
236 async_flowc_action onoff, int type);
237 static void async_flowcontrol_sw_output(struct asycom *asy,
238 async_flowc_action onoff);
239 static void async_flowcontrol_hw_input(struct asycom *asy,
240 async_flowc_action onoff, int type);
241 static void async_flowcontrol_hw_output(struct asycom *asy,
242 async_flowc_action onoff);
243
244 #define GET_PROP(devi, pname, pflag, pval, plen) \
245 (ddi_prop_op(DDI_DEV_T_ANY, (devi), PROP_LEN_AND_VAL_BUF, \
246 (pflag), (pname), (caddr_t)(pval), (plen)))
247
248 kmutex_t asy_glob_lock; /* lock protecting global data manipulation */
249 void *asy_soft_state;
250
251 /* Standard COM port I/O addresses */
252 static const int standard_com_ports[] = {
253 COM1_IOADDR, COM2_IOADDR, COM3_IOADDR, COM4_IOADDR
254 };
255
256 static int *com_ports;
257 static uint_t num_com_ports;
258
259 #ifdef DEBUG
260 /*
261 * Set this to true to make the driver pretend to do a suspend. Useful
262 * for debugging suspend/resume code with a serial debugger.
263 */
264 boolean_t asy_nosuspend = B_FALSE;
265 #endif
266
267
268 /*
269 * Baud rate table. Indexed by #defines found in sys/termios.h
270 *
271 * The default crystal frequency is 1.8432 MHz. The 8250A used a fixed /16
272 * prescaler and a 16bit divisor, split in two registers (DLH and DLL).
273 *
274 * The 16950 adds TCR and CKS registers. The TCR can be used to set the
275 * prescaler from /4 to /16. The CKS can be used, among other things, to
276 * select a isochronous 1x mode, effectively disabling the prescaler.
277 * This would theoretically allow a baud rate of 1843200 driven directly
278 * by the default crystal frequency, although the highest termios.h-defined
279 * baud rate we can support is half of that, 921600 baud.
280 */
281 #define UNSUPPORTED 0x00, 0x00, 0x00
282 static struct {
283 uint8_t asy_dlh;
284 uint8_t asy_dll;
285 uint8_t asy_tcr;
286 } asy_baud_tab[] = {
287 [B0] = { UNSUPPORTED }, /* 0 baud */
288 [B50] = { 0x09, 0x00, 0x00 }, /* 50 baud */
289 [B75] = { 0x06, 0x00, 0x00 }, /* 75 baud */
290 [B110] = { 0x04, 0x17, 0x00 }, /* 110 baud (0.026% error) */
291 [B134] = { 0x03, 0x59, 0x00 }, /* 134 baud (0.058% error) */
292 [B150] = { 0x03, 0x00, 0x00 }, /* 150 baud */
293 [B200] = { 0x02, 0x40, 0x00 }, /* 200 baud */
294 [B300] = { 0x01, 0x80, 0x00 }, /* 300 baud */
295 [B600] = { 0x00, 0xc0, 0x00 }, /* 600 baud */
296 [B1200] = { 0x00, 0x60, 0x00 }, /* 1200 baud */
297 [B1800] = { 0x00, 0x40, 0x00 }, /* 1800 baud */
298 [B2400] = { 0x00, 0x30, 0x00 }, /* 2400 baud */
299 [B4800] = { 0x00, 0x18, 0x00 }, /* 4800 baud */
300 [B9600] = { 0x00, 0x0c, 0x00 }, /* 9600 baud */
301 [B19200] = { 0x00, 0x06, 0x00 }, /* 19200 baud */
302 [B38400] = { 0x00, 0x03, 0x00 }, /* 38400 baud */
303 [B57600] = { 0x00, 0x02, 0x00 }, /* 57600 baud */
304 [B76800] = { 0x00, 0x06, 0x04 }, /* 76800 baud (16950) */
305 [B115200] = { 0x00, 0x01, 0x00 }, /* 115200 baud */
306 [B153600] = { 0x00, 0x03, 0x04 }, /* 153600 baud (16950) */
307 [B230400] = { 0x00, 0x02, 0x04 }, /* 230400 baud (16950) */
308 [B307200] = { 0x00, 0x01, 0x06 }, /* 307200 baud (16950) */
309 [B460800] = { 0x00, 0x01, 0x04 }, /* 460800 baud (16950) */
310 [B921600] = { 0x00, 0x02, 0x01 }, /* 921600 baud (16950) */
311 [B1000000] = { UNSUPPORTED }, /* 1000000 baud */
312 [B1152000] = { UNSUPPORTED }, /* 1152000 baud */
313 [B1500000] = { UNSUPPORTED }, /* 1500000 baud */
314 [B2000000] = { UNSUPPORTED }, /* 2000000 baud */
315 [B2500000] = { UNSUPPORTED }, /* 2500000 baud */
316 [B3000000] = { UNSUPPORTED }, /* 3000000 baud */
317 [B3500000] = { UNSUPPORTED }, /* 3500000 baud */
318 [B4000000] = { UNSUPPORTED }, /* 4000000 baud */
319 };
320
321 /*
322 * Register table. For each logical register, we define the minimum hwtype, the
323 * register offset, and function pointers for reading and writing the register.
324 * A NULL pointer indicates the register cannot be read from or written to,
325 * respectively.
326 */
327 static struct {
328 int asy_min_hwtype;
329 int8_t asy_reg_off;
330 uint8_t (*asy_get_reg)(const struct asycom *, asy_reg_t);
331 void (*asy_put_reg)(const struct asycom *, asy_reg_t, uint8_t);
332 } asy_reg_table[] = {
333 [ASY_ILLEGAL] = { 0, -1, NULL, NULL },
334 /* 8250 / 16450 / 16550 registers */
335 [ASY_THR] = { ASY_8250A, 0, NULL, asy_put_reg },
336 [ASY_RHR] = { ASY_8250A, 0, asy_get_reg, NULL },
337 [ASY_IER] = { ASY_8250A, 1, asy_get_reg, asy_put_reg },
338 [ASY_FCR] = { ASY_16550, 2, NULL, asy_put_reg },
339 [ASY_ISR] = { ASY_8250A, 2, asy_get_reg, NULL },
340 [ASY_LCR] = { ASY_8250A, 3, asy_get_reg, asy_put_reg },
341 [ASY_MCR] = { ASY_8250A, 4, asy_get_reg, asy_put_reg },
342 [ASY_LSR] = { ASY_8250A, 5, asy_get_reg, NULL },
343 [ASY_MSR] = { ASY_8250A, 6, asy_get_reg, NULL },
344 [ASY_SPR] = { ASY_8250A, 7, asy_get_reg, asy_put_reg },
345 [ASY_DLL] = { ASY_8250A, 0, asy_get_reg, asy_put_reg },
346 [ASY_DLH] = { ASY_8250A, 1, asy_get_reg, asy_put_reg },
347 /* 16750 extended register */
348 [ASY_EFR] = { ASY_16750, 2, asy_get_ext, asy_put_ext },
349 /* 16650 extended registers */
350 [ASY_XON1] = { ASY_16650, 4, asy_get_ext, asy_put_ext },
351 [ASY_XON2] = { ASY_16650, 5, asy_get_ext, asy_put_ext },
352 [ASY_XOFF1] = { ASY_16650, 6, asy_get_ext, asy_put_ext },
353 [ASY_XOFF2] = { ASY_16650, 7, asy_get_ext, asy_put_ext },
354 /* 16950 additional registers */
355 [ASY_ASR] = { ASY_16950, 1, asy_get_add, asy_put_add },
356 [ASY_RFL] = { ASY_16950, 3, asy_get_add, NULL },
357 [ASY_TFL] = { ASY_16950, 4, asy_get_add, NULL },
358 [ASY_ICR] = { ASY_16950, 5, asy_get_reg, asy_put_reg },
359 /* 16950 indexed registers */
360 [ASY_ACR] = { ASY_16950, 0, asy_get_idx, asy_put_idx },
361 [ASY_CPR] = { ASY_16950, 1, asy_get_idx, asy_put_idx },
362 [ASY_TCR] = { ASY_16950, 2, asy_get_idx, asy_put_idx },
363 [ASY_CKS] = { ASY_16950, 3, asy_get_idx, asy_put_idx },
364 [ASY_TTL] = { ASY_16950, 4, asy_get_idx, asy_put_idx },
365 [ASY_RTL] = { ASY_16950, 5, asy_get_idx, asy_put_idx },
366 [ASY_FCL] = { ASY_16950, 6, asy_get_idx, asy_put_idx },
367 [ASY_FCH] = { ASY_16950, 7, asy_get_idx, asy_put_idx },
368 [ASY_ID1] = { ASY_16950, 8, asy_get_idx, NULL },
369 [ASY_ID2] = { ASY_16950, 9, asy_get_idx, NULL },
370 [ASY_ID3] = { ASY_16950, 10, asy_get_idx, NULL },
371 [ASY_REV] = { ASY_16950, 11, asy_get_idx, NULL },
372 [ASY_CSR] = { ASY_16950, 12, NULL, asy_put_idx },
373 [ASY_NMR] = { ASY_16950, 13, asy_get_idx, asy_put_idx },
374 };
375
376
377 static int asyrsrv(queue_t *q);
378 static int asyopen(queue_t *rq, dev_t *dev, int flag, int sflag, cred_t *cr);
379 static int asyclose(queue_t *q, int flag, cred_t *credp);
380 static int asywputdo(queue_t *q, mblk_t *mp, boolean_t);
381 static int asywput(queue_t *q, mblk_t *mp);
382
383 struct module_info asy_info = {
384 0,
385 "asy",
386 0,
387 INFPSZ,
388 4096,
389 128
390 };
391
392 static struct qinit asy_rint = {
393 putq,
394 asyrsrv,
395 asyopen,
396 asyclose,
397 NULL,
398 &asy_info,
399 NULL
400 };
401
402 static struct qinit asy_wint = {
403 asywput,
404 NULL,
405 NULL,
406 NULL,
407 NULL,
408 &asy_info,
409 NULL
410 };
411
412 struct streamtab asy_str_info = {
413 &asy_rint,
414 &asy_wint,
415 NULL,
416 NULL
417 };
418
419 static void asy_intr_free(struct asycom *);
420 static int asy_intr_setup(struct asycom *, int);
421
422 static void asy_softintr_free(struct asycom *);
423 static int asy_softintr_setup(struct asycom *);
424
425 static int asy_suspend(struct asycom *);
426 static int asy_resume(dev_info_t *);
427
428 static int asyinfo(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg,
429 void **result);
430 static int asyprobe(dev_info_t *);
431 static int asyattach(dev_info_t *, ddi_attach_cmd_t);
432 static int asydetach(dev_info_t *, ddi_detach_cmd_t);
433 static int asyquiesce(dev_info_t *);
434
435 static struct cb_ops cb_asy_ops = {
436 nodev, /* cb_open */
437 nodev, /* cb_close */
438 nodev, /* cb_strategy */
439 nodev, /* cb_print */
440 nodev, /* cb_dump */
441 nodev, /* cb_read */
442 nodev, /* cb_write */
443 nodev, /* cb_ioctl */
444 nodev, /* cb_devmap */
445 nodev, /* cb_mmap */
446 nodev, /* cb_segmap */
447 nochpoll, /* cb_chpoll */
448 ddi_prop_op, /* cb_prop_op */
449 &asy_str_info, /* cb_stream */
450 D_MP /* cb_flag */
451 };
452
453 struct dev_ops asy_ops = {
454 DEVO_REV, /* devo_rev */
455 0, /* devo_refcnt */
456 asyinfo, /* devo_getinfo */
457 nulldev, /* devo_identify */
458 asyprobe, /* devo_probe */
459 asyattach, /* devo_attach */
460 asydetach, /* devo_detach */
461 nodev, /* devo_reset */
462 &cb_asy_ops, /* devo_cb_ops */
463 NULL, /* devo_bus_ops */
464 NULL, /* power */
465 asyquiesce, /* quiesce */
466 };
467
468 static struct modldrv modldrv = {
469 &mod_driverops, /* Type of module. This one is a driver */
470 "ASY driver",
471 &asy_ops, /* driver ops */
472 };
473
474 static struct modlinkage modlinkage = {
475 MODREV_1,
476 (void *)&modldrv,
477 NULL
478 };
479
480 int
_init(void)481 _init(void)
482 {
483 int i;
484
485 i = ddi_soft_state_init(&asy_soft_state, sizeof (struct asycom), 2);
486 if (i == 0) {
487 mutex_init(&asy_glob_lock, NULL, MUTEX_DRIVER, NULL);
488 if ((i = mod_install(&modlinkage)) != 0) {
489 mutex_destroy(&asy_glob_lock);
490 ddi_soft_state_fini(&asy_soft_state);
491 #ifdef DEBUG
492 } else {
493 if (debug & ASY_DEBUG_INIT)
494 cmn_err(CE_NOTE, "!%s, debug = %x",
495 modldrv.drv_linkinfo, debug);
496 #endif
497 }
498 }
499 return (i);
500 }
501
502 int
_fini(void)503 _fini(void)
504 {
505 int i;
506
507 if ((i = mod_remove(&modlinkage)) == 0) {
508 #ifdef DEBUG
509 if (debug & ASY_DEBUG_INIT)
510 cmn_err(CE_NOTE, "!%s unloading",
511 modldrv.drv_linkinfo);
512 #endif
513 mutex_destroy(&asy_glob_lock);
514 /* free "motherboard-serial-ports" property if allocated */
515 if (com_ports != NULL && com_ports != (int *)standard_com_ports)
516 ddi_prop_free(com_ports);
517 com_ports = NULL;
518 ddi_soft_state_fini(&asy_soft_state);
519 }
520 return (i);
521 }
522
523 int
_info(struct modinfo * modinfop)524 _info(struct modinfo *modinfop)
525 {
526 return (mod_info(&modlinkage, modinfop));
527 }
528
529 static void
asy_put_idx(const struct asycom * asy,asy_reg_t reg,uint8_t val)530 asy_put_idx(const struct asycom *asy, asy_reg_t reg, uint8_t val)
531 {
532 ASSERT(asy->asy_hwtype >= ASY_16950);
533
534 ASSERT(reg >= ASY_ACR);
535 ASSERT(reg <= ASY_NREG);
536
537 /*
538 * The last value written to LCR must not have been the magic value for
539 * EFR access. Every time the driver writes that magic value to access
540 * EFR, XON1, XON2, XOFF1, and XOFF2, the driver restores the original
541 * value of LCR, so we should be good here.
542 *
543 * I'd prefer to ASSERT this, but I'm not sure it's worth the hassle.
544 */
545
546 /* Write indexed register offset to SPR. */
547 asy_put(asy, ASY_SPR, asy_reg_table[reg].asy_reg_off);
548
549 /* Write value to ICR. */
550 asy_put(asy, ASY_ICR, val);
551 }
552
553 static uint8_t
asy_get_idx(const struct asycom * asy,asy_reg_t reg)554 asy_get_idx(const struct asycom *asy, asy_reg_t reg)
555 {
556 uint8_t val;
557
558 ASSERT(asy->asy_hwtype >= ASY_16950);
559
560 ASSERT(reg >= ASY_ACR);
561 ASSERT(reg <= ASY_NREG);
562
563 /* Enable access to ICR in ACR. */
564 asy_put(asy, ASY_ACR, ASY_ACR_ICR | asy->asy_acr);
565
566 /* Write indexed register offset to SPR. */
567 asy_put(asy, ASY_SPR, asy_reg_table[reg].asy_reg_off);
568
569 /* Read value from ICR. */
570 val = asy_get(asy, ASY_ICR);
571
572 /* Restore ACR. */
573 asy_put(asy, ASY_ACR, asy->asy_acr);
574
575 return (val);
576 }
577
578 static void
asy_put_add(const struct asycom * asy,asy_reg_t reg,uint8_t val)579 asy_put_add(const struct asycom *asy, asy_reg_t reg, uint8_t val)
580 {
581 ASSERT(asy->asy_hwtype >= ASY_16950);
582
583 /* Only ASR is writable, RFL and TFL are read-only. */
584 ASSERT(reg == ASY_ASR);
585
586 /*
587 * Only ASR[0] (Transmitter Disabled) and ASR[1] (Remote Transmitter
588 * Disabled) are writable.
589 */
590 ASSERT((val & ~(ASY_ASR_TD | ASY_ASR_RTD)) == 0);
591
592 /* Enable access to ASR in ACR. */
593 asy_put(asy, ASY_ACR, ASY_ACR_ASR | asy->asy_acr);
594
595 /* Write value to ASR. */
596 asy_put_reg(asy, reg, val);
597
598 /* Restore ACR. */
599 asy_put(asy, ASY_ACR, asy->asy_acr);
600 }
601
602 static uint8_t
asy_get_add(const struct asycom * asy,asy_reg_t reg)603 asy_get_add(const struct asycom *asy, asy_reg_t reg)
604 {
605 uint8_t val;
606
607 ASSERT(asy->asy_hwtype >= ASY_16950);
608
609 ASSERT(reg >= ASY_ASR);
610 ASSERT(reg <= ASY_TFL);
611
612 /*
613 * The last value written to LCR must not have been the magic value for
614 * EFR access. Every time the driver writes that magic value to access
615 * EFR, XON1, XON2, XOFF1, and XOFF2, the driver restores the original
616 * value of LCR, so we should be good here.
617 *
618 * I'd prefer to ASSERT this, but I'm not sure it's worth the hassle.
619 */
620
621 /* Enable access to ASR in ACR. */
622 asy_put(asy, ASY_ACR, ASY_ACR_ASR | asy->asy_acr);
623
624 /* Read value from register. */
625 val = asy_get_reg(asy, reg);
626
627 /* Restore ACR. */
628 asy_put(asy, ASY_ACR, 0 | asy->asy_acr);
629
630 return (val);
631 }
632
633 static void
asy_put_ext(const struct asycom * asy,asy_reg_t reg,uint8_t val)634 asy_put_ext(const struct asycom *asy, asy_reg_t reg, uint8_t val)
635 {
636 uint8_t lcr;
637
638 /*
639 * On the 16750, EFR can be accessed when LCR[7]=1 (DLAB).
640 * Only two bits are assigned for auto RTS/CTS, which we don't support
641 * yet.
642 *
643 * So insist we have a 16650 or up.
644 */
645 ASSERT(asy->asy_hwtype >= ASY_16650);
646
647 ASSERT(reg >= ASY_EFR);
648 ASSERT(reg <= ASY_XOFF2);
649
650 /* Save LCR contents. */
651 lcr = asy_get(asy, ASY_LCR);
652
653 /* Enable extended register access. */
654 asy_put(asy, ASY_LCR, ASY_LCR_EFRACCESS);
655
656 /* Write extended register */
657 asy_put_reg(asy, reg, val);
658
659 /* Restore previous LCR contents, disabling extended register access. */
660 asy_put(asy, ASY_LCR, lcr);
661 }
662
663 static uint8_t
asy_get_ext(const struct asycom * asy,asy_reg_t reg)664 asy_get_ext(const struct asycom *asy, asy_reg_t reg)
665 {
666 uint8_t lcr, val;
667
668 /*
669 * On the 16750, EFR can be accessed when LCR[7]=1 (DLAB).
670 * Only two bits are assigned for auto RTS/CTS, which we don't support
671 * yet.
672 *
673 * So insist we have a 16650 or up.
674 */
675 ASSERT(asy->asy_hwtype >= ASY_16650);
676
677 ASSERT(reg >= ASY_EFR);
678 ASSERT(reg <= ASY_XOFF2);
679
680 /* Save LCR contents. */
681 lcr = asy_get(asy, ASY_LCR);
682
683 /* Enable extended register access. */
684 asy_put(asy, ASY_LCR, ASY_LCR_EFRACCESS);
685
686 /* Read extended register */
687 val = asy_get_reg(asy, reg);
688
689 /* Restore previous LCR contents, disabling extended register access. */
690 asy_put(asy, ASY_LCR, lcr);
691
692 return (val);
693 }
694
695 static void
asy_put_reg(const struct asycom * asy,asy_reg_t reg,uint8_t val)696 asy_put_reg(const struct asycom *asy, asy_reg_t reg, uint8_t val)
697 {
698 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
699
700 ddi_put8(asy->asy_iohandle,
701 asy->asy_ioaddr + asy_reg_table[reg].asy_reg_off, val);
702 }
703
704 static uint8_t
asy_get_reg(const struct asycom * asy,asy_reg_t reg)705 asy_get_reg(const struct asycom *asy, asy_reg_t reg)
706 {
707 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
708
709 return (ddi_get8(asy->asy_iohandle,
710 asy->asy_ioaddr + asy_reg_table[reg].asy_reg_off));
711 }
712
713 static void
asy_put(const struct asycom * asy,asy_reg_t reg,uint8_t val)714 asy_put(const struct asycom *asy, asy_reg_t reg, uint8_t val)
715 {
716 ASSERT(mutex_owned(&asy->asy_excl_hi));
717
718 ASSERT(reg > ASY_ILLEGAL);
719 ASSERT(reg < ASY_NREG);
720
721 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
722 ASSERT(asy_reg_table[reg].asy_put_reg != NULL);
723
724 asy_reg_table[reg].asy_put_reg(asy, reg, val);
725 }
726
727 static uint8_t
asy_get(const struct asycom * asy,asy_reg_t reg)728 asy_get(const struct asycom *asy, asy_reg_t reg)
729 {
730 uint8_t val;
731
732 ASSERT(mutex_owned(&asy->asy_excl_hi));
733
734 ASSERT(reg > ASY_ILLEGAL);
735 ASSERT(reg < ASY_NREG);
736
737 ASSERT(asy->asy_hwtype >= asy_reg_table[reg].asy_min_hwtype);
738 ASSERT(asy_reg_table[reg].asy_get_reg != NULL);
739
740 val = asy_reg_table[reg].asy_get_reg(asy, reg);
741
742 return (val);
743 }
744
745 static void
asy_set(const struct asycom * asy,asy_reg_t reg,uint8_t bits)746 asy_set(const struct asycom *asy, asy_reg_t reg, uint8_t bits)
747 {
748 uint8_t val = asy_get(asy, reg);
749
750 asy_put(asy, reg, val | bits);
751 }
752
753 static void
asy_clr(const struct asycom * asy,asy_reg_t reg,uint8_t bits)754 asy_clr(const struct asycom *asy, asy_reg_t reg, uint8_t bits)
755 {
756 uint8_t val = asy_get(asy, reg);
757
758 asy_put(asy, reg, val & ~bits);
759 }
760
761 static void
asy_enable_interrupts(const struct asycom * asy,uint8_t intr)762 asy_enable_interrupts(const struct asycom *asy, uint8_t intr)
763 {
764 /* Don't touch any IER bits we don't support. */
765 intr &= ASY_IER_ALL;
766
767 asy_set(asy, ASY_IER, intr);
768 }
769
770 static void
asy_disable_interrupts(const struct asycom * asy,uint8_t intr)771 asy_disable_interrupts(const struct asycom *asy, uint8_t intr)
772 {
773 /* Don't touch any IER bits we don't support. */
774 intr &= ASY_IER_ALL;
775
776 asy_clr(asy, ASY_IER, intr);
777 }
778
779 static void
asy_set_baudrate(const struct asycom * asy,int baudrate)780 asy_set_baudrate(const struct asycom *asy, int baudrate)
781 {
782 uint8_t tcr;
783
784 if (baudrate == 0)
785 return;
786
787 if (baudrate >= ARRAY_SIZE(asy_baud_tab))
788 return;
789
790 tcr = asy_baud_tab[baudrate].asy_tcr;
791
792 if (tcr != 0 && asy->asy_hwtype < ASY_16950)
793 return;
794
795 if (asy->asy_hwtype >= ASY_16950) {
796 if (tcr == 0x01) {
797 /* Isochronous 1x mode is selected in CKS, not TCR. */
798 asy_put(asy, ASY_CKS,
799 ASY_CKS_RCLK_1X | ASY_CKS_TCLK_1X);
800 asy_put(asy, ASY_TCR, 0);
801 } else {
802 /* Reset CKS in case it was set to 1x mode. */
803 asy_put(asy, ASY_CKS, 0);
804
805 ASSERT(tcr == 0x00 || tcr >= 0x04 || tcr <= 0x0f);
806 asy_put(asy, ASY_TCR, tcr);
807 }
808 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
809 "setting baudrate %d, CKS 0x%02x, TCR 0x%02x",
810 baudrate, asy_get(asy, ASY_CKS), asy_get(asy, ASY_TCR));
811 }
812
813 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
814 "setting baudrate %d, divisor 0x%02x%02x",
815 baudrate, asy_baud_tab[baudrate].asy_dlh,
816 asy_baud_tab[baudrate].asy_dll);
817
818 asy_set(asy, ASY_LCR, ASY_LCR_DLAB);
819
820 asy_put(asy, ASY_DLL, asy_baud_tab[baudrate].asy_dll);
821 asy_put(asy, ASY_DLH, asy_baud_tab[baudrate].asy_dlh);
822
823 asy_clr(asy, ASY_LCR, ASY_LCR_DLAB);
824 }
825
826 /*
827 * Loop until the TSR is empty.
828 *
829 * The wait period is clock / (baud * 16) * 16 * 2.
830 */
831 static void
asy_wait_baudrate(struct asycom * asy)832 asy_wait_baudrate(struct asycom *asy)
833 {
834 struct asyncline *async = asy->asy_priv;
835 int rate = BAUDINDEX(async->async_ttycommon.t_cflag);
836 clock_t usec =
837 ((((clock_t)asy_baud_tab[rate].asy_dlh) << 8) |
838 ((clock_t)asy_baud_tab[rate].asy_dll)) * 16 * 2;
839
840 ASSERT(mutex_owned(&asy->asy_excl));
841 ASSERT(mutex_owned(&asy->asy_excl_hi));
842
843 while ((asy_get(asy, ASY_LSR) & ASY_LSR_TEMT) == 0) {
844 mutex_exit(&asy->asy_excl_hi);
845 mutex_exit(&asy->asy_excl);
846 drv_usecwait(usec);
847 mutex_enter(&asy->asy_excl);
848 mutex_enter(&asy->asy_excl_hi);
849 }
850 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
851 }
852
853 void
async_put_suspq(struct asycom * asy,mblk_t * mp)854 async_put_suspq(struct asycom *asy, mblk_t *mp)
855 {
856 struct asyncline *async = asy->asy_priv;
857
858 ASSERT(mutex_owned(&asy->asy_excl));
859
860 if (async->async_suspqf == NULL)
861 async->async_suspqf = mp;
862 else
863 async->async_suspqb->b_next = mp;
864
865 async->async_suspqb = mp;
866 }
867
868 static mblk_t *
async_get_suspq(struct asycom * asy)869 async_get_suspq(struct asycom *asy)
870 {
871 struct asyncline *async = asy->asy_priv;
872 mblk_t *mp;
873
874 ASSERT(mutex_owned(&asy->asy_excl));
875
876 if ((mp = async->async_suspqf) != NULL) {
877 async->async_suspqf = mp->b_next;
878 mp->b_next = NULL;
879 } else {
880 async->async_suspqb = NULL;
881 }
882 return (mp);
883 }
884
885 static void
async_process_suspq(struct asycom * asy)886 async_process_suspq(struct asycom *asy)
887 {
888 struct asyncline *async = asy->asy_priv;
889 mblk_t *mp;
890
891 ASSERT(mutex_owned(&asy->asy_excl));
892
893 while ((mp = async_get_suspq(asy)) != NULL) {
894 queue_t *q;
895
896 q = async->async_ttycommon.t_writeq;
897 ASSERT(q != NULL);
898 mutex_exit(&asy->asy_excl);
899 (void) asywputdo(q, mp, B_FALSE);
900 mutex_enter(&asy->asy_excl);
901 }
902 async->async_flags &= ~ASYNC_DDI_SUSPENDED;
903 cv_broadcast(&async->async_flags_cv);
904 }
905
906 static int
asy_get_bus_type(dev_info_t * devinfo)907 asy_get_bus_type(dev_info_t *devinfo)
908 {
909 char *prop;
910 int bustype;
911
912 if (ddi_prop_lookup_string(DDI_DEV_T_ANY, devinfo, 0, "device_type",
913 &prop) != DDI_PROP_SUCCESS &&
914 ddi_prop_lookup_string(DDI_DEV_T_ANY, devinfo, 0, "bus-type",
915 &prop) != DDI_PROP_SUCCESS) {
916 dev_err(devinfo, CE_WARN,
917 "!%s: can't figure out device type for parent \"%s\"",
918 __func__, ddi_get_name(ddi_get_parent(devinfo)));
919 return (ASY_BUS_UNKNOWN);
920 }
921
922 if (strcmp(prop, "isa") == 0)
923 bustype = ASY_BUS_ISA;
924 else if (strcmp(prop, "pci") == 0)
925 bustype = ASY_BUS_PCI;
926 else if (strcmp(prop, "pciex") == 0)
927 return (ASY_BUS_PCI);
928 else
929 bustype = ASY_BUS_UNKNOWN;
930
931 ddi_prop_free(prop);
932 return (bustype);
933 }
934
935 static int
asy_get_io_regnum_pci(dev_info_t * devi,struct asycom * asy)936 asy_get_io_regnum_pci(dev_info_t *devi, struct asycom *asy)
937 {
938 int reglen, nregs;
939 int regnum, i;
940 uint64_t size;
941 struct pci_phys_spec *reglist;
942
943 if (ddi_getlongprop(DDI_DEV_T_ANY, devi, DDI_PROP_DONTPASS,
944 "reg", (caddr_t)®list, ®len) != DDI_PROP_SUCCESS) {
945 dev_err(devi, CE_WARN, "!%s: reg property"
946 " not found in devices property list", __func__);
947 return (-1);
948 }
949
950 regnum = -1;
951 nregs = reglen / sizeof (*reglist);
952 for (i = 0; i < nregs; i++) {
953 switch (reglist[i].pci_phys_hi & PCI_ADDR_MASK) {
954 case PCI_ADDR_IO: /* I/O bus reg property */
955 if (regnum == -1) /* use only the first one */
956 regnum = i;
957 break;
958
959 default:
960 break;
961 }
962 }
963
964 /* check for valid count of registers */
965 if (regnum >= 0) {
966 size = ((uint64_t)reglist[regnum].pci_size_low) |
967 ((uint64_t)reglist[regnum].pci_size_hi) << 32;
968 if (size < 8)
969 regnum = -1;
970 }
971 kmem_free(reglist, reglen);
972 return (regnum);
973 }
974
975 static int
asy_get_io_regnum_isa(dev_info_t * devi,struct asycom * asy)976 asy_get_io_regnum_isa(dev_info_t *devi, struct asycom *asy)
977 {
978 int regnum = -1;
979 int reglen, nregs;
980 struct {
981 uint_t bustype;
982 int base;
983 int size;
984 } *reglist;
985
986 if (ddi_getlongprop(DDI_DEV_T_ANY, devi, DDI_PROP_DONTPASS,
987 "reg", (caddr_t)®list, ®len) != DDI_PROP_SUCCESS) {
988 dev_err(devi, CE_WARN, "!%s: reg property not found "
989 "in devices property list", __func__);
990 return (-1);
991 }
992
993 nregs = reglen / sizeof (*reglist);
994
995 /*
996 * Find the first I/O bus in the "reg" property.
997 */
998 for (int i = 0; i < nregs && regnum == -1; i++) {
999 if (reglist[i].bustype == 1) {
1000 regnum = i;
1001 break;
1002 }
1003 }
1004
1005 /* check for valid count of registers */
1006 if ((regnum < 0) || (reglist[regnum].size < 8))
1007 regnum = -1;
1008
1009 kmem_free(reglist, reglen);
1010
1011 return (regnum);
1012 }
1013
1014 static int
asy_get_io_regnum(dev_info_t * devinfo,struct asycom * asy)1015 asy_get_io_regnum(dev_info_t *devinfo, struct asycom *asy)
1016 {
1017 switch (asy_get_bus_type(devinfo)) {
1018 case ASY_BUS_ISA:
1019 return (asy_get_io_regnum_isa(devinfo, asy));
1020 case ASY_BUS_PCI:
1021 return (asy_get_io_regnum_pci(devinfo, asy));
1022 default:
1023 return (-1);
1024 }
1025 }
1026
1027 static void
asy_intr_free(struct asycom * asy)1028 asy_intr_free(struct asycom *asy)
1029 {
1030 int i;
1031
1032 for (i = 0; i < asy->asy_intr_cnt; i++) {
1033 if (asy->asy_inth[i] == NULL)
1034 break;
1035
1036 if ((asy->asy_intr_cap & DDI_INTR_FLAG_BLOCK) != 0)
1037 (void) ddi_intr_block_disable(&asy->asy_inth[i], 1);
1038 else
1039 (void) ddi_intr_disable(asy->asy_inth[i]);
1040
1041 (void) ddi_intr_remove_handler(asy->asy_inth[i]);
1042 (void) ddi_intr_free(asy->asy_inth[i]);
1043 }
1044
1045 kmem_free(asy->asy_inth, asy->asy_inth_sz);
1046 asy->asy_inth = NULL;
1047 asy->asy_inth_sz = 0;
1048 }
1049
1050 static int
asy_intr_setup(struct asycom * asy,int intr_type)1051 asy_intr_setup(struct asycom *asy, int intr_type)
1052 {
1053 int nintrs, navail, count;
1054 int ret;
1055 int i;
1056
1057 if (asy->asy_intr_types == 0) {
1058 ret = ddi_intr_get_supported_types(asy->asy_dip,
1059 &asy->asy_intr_types);
1060 if (ret != DDI_SUCCESS) {
1061 asyerror(asy, CE_WARN,
1062 "ddi_intr_get_supported_types failed");
1063 return (ret);
1064 }
1065 }
1066
1067 if ((asy->asy_intr_types & intr_type) == 0)
1068 return (DDI_FAILURE);
1069
1070 ret = ddi_intr_get_nintrs(asy->asy_dip, intr_type, &nintrs);
1071 if (ret != DDI_SUCCESS) {
1072 asyerror(asy, CE_WARN, "ddi_intr_get_nintrs failed, type %d",
1073 intr_type);
1074 return (ret);
1075 }
1076
1077 if (nintrs < 1) {
1078 asyerror(asy, CE_WARN, "no interrupts of type %d", intr_type);
1079 return (DDI_FAILURE);
1080 }
1081
1082 ret = ddi_intr_get_navail(asy->asy_dip, intr_type, &navail);
1083 if (ret != DDI_SUCCESS) {
1084 asyerror(asy, CE_WARN, "ddi_intr_get_navail failed, type %d",
1085 intr_type);
1086 return (ret);
1087 }
1088
1089 if (navail < 1) {
1090 asyerror(asy, CE_WARN, "no available interrupts, type %d",
1091 intr_type);
1092 return (DDI_FAILURE);
1093 }
1094
1095 /*
1096 * Some PCI(e) RS232 adapters seem to support more than one interrupt,
1097 * but the asy driver really doesn't.
1098 */
1099 asy->asy_inth_sz = sizeof (ddi_intr_handle_t);
1100 asy->asy_inth = kmem_zalloc(asy->asy_inth_sz, KM_SLEEP);
1101 ret = ddi_intr_alloc(asy->asy_dip, asy->asy_inth, intr_type, 0, 1,
1102 &count, 0);
1103 if (ret != DDI_SUCCESS) {
1104 asyerror(asy, CE_WARN, "ddi_intr_alloc failed, count %d, "
1105 "type %d", navail, intr_type);
1106 goto fail;
1107 }
1108
1109 if (count != 1) {
1110 asyerror(asy, CE_WARN, "ddi_intr_alloc returned not 1 but %d "
1111 "interrupts of type %d", count, intr_type);
1112 goto fail;
1113 }
1114
1115 asy->asy_intr_cnt = count;
1116
1117 ret = ddi_intr_get_pri(asy->asy_inth[0], &asy->asy_intr_pri);
1118 if (ret != DDI_SUCCESS) {
1119 asyerror(asy, CE_WARN, "ddi_intr_get_pri failed, type %d",
1120 intr_type);
1121 goto fail;
1122 }
1123
1124 for (i = 0; i < count; i++) {
1125 ret = ddi_intr_add_handler(asy->asy_inth[i], asyintr,
1126 (void *)asy, (void *)(uintptr_t)i);
1127 if (ret != DDI_SUCCESS) {
1128 asyerror(asy, CE_WARN, "ddi_intr_add_handler failed, "
1129 "int %d, type %d", i, intr_type);
1130 goto fail;
1131 }
1132 }
1133
1134 (void) ddi_intr_get_cap(asy->asy_inth[0], &asy->asy_intr_cap);
1135
1136 for (i = 0; i < count; i++) {
1137 if (asy->asy_intr_cap & DDI_INTR_FLAG_BLOCK)
1138 ret = ddi_intr_block_enable(&asy->asy_inth[i], 1);
1139 else
1140 ret = ddi_intr_enable(asy->asy_inth[i]);
1141
1142 if (ret != DDI_SUCCESS) {
1143 asyerror(asy, CE_WARN,
1144 "enabling interrupt %d failed, type %d",
1145 i, intr_type);
1146 goto fail;
1147 }
1148 }
1149
1150 asy->asy_intr_type = intr_type;
1151 return (DDI_SUCCESS);
1152
1153 fail:
1154 asy_intr_free(asy);
1155 return (ret);
1156 }
1157
1158 static void
asy_softintr_free(struct asycom * asy)1159 asy_softintr_free(struct asycom *asy)
1160 {
1161 (void) ddi_intr_remove_softint(asy->asy_soft_inth);
1162 }
1163
1164 static int
asy_softintr_setup(struct asycom * asy)1165 asy_softintr_setup(struct asycom *asy)
1166 {
1167 int ret;
1168
1169 ret = ddi_intr_add_softint(asy->asy_dip, &asy->asy_soft_inth,
1170 ASY_SOFT_INT_PRI, asysoftintr, asy);
1171 if (ret != DDI_SUCCESS) {
1172 asyerror(asy, CE_WARN, "ddi_intr_add_softint failed");
1173 return (ret);
1174 }
1175
1176 /*
1177 * This may seem pointless since we specified ASY_SOFT_INT_PRI above,
1178 * but then it's probably a good idea to consider the soft interrupt
1179 * priority an opaque value and don't hardcode any assumptions about
1180 * its actual value here.
1181 */
1182 ret = ddi_intr_get_softint_pri(asy->asy_soft_inth,
1183 &asy->asy_soft_intr_pri);
1184 if (ret != DDI_SUCCESS) {
1185 asyerror(asy, CE_WARN, "ddi_intr_get_softint_pri failed");
1186 return (ret);
1187 }
1188
1189 return (DDI_SUCCESS);
1190 }
1191
1192
1193 static int
asy_resume(dev_info_t * devi)1194 asy_resume(dev_info_t *devi)
1195 {
1196 struct asyncline *async;
1197 struct asycom *asy;
1198 int instance = ddi_get_instance(devi); /* find out which unit */
1199
1200 #ifdef DEBUG
1201 if (asy_nosuspend)
1202 return (DDI_SUCCESS);
1203 #endif
1204 asy = ddi_get_soft_state(asy_soft_state, instance);
1205 if (asy == NULL)
1206 return (DDI_FAILURE);
1207
1208 mutex_enter(&asy->asy_soft_sr);
1209 mutex_enter(&asy->asy_excl);
1210 mutex_enter(&asy->asy_excl_hi);
1211
1212 async = asy->asy_priv;
1213 asy_disable_interrupts(asy, ASY_IER_ALL);
1214 if (asy_identify_chip(devi, asy) != DDI_SUCCESS) {
1215 mutex_exit(&asy->asy_excl_hi);
1216 mutex_exit(&asy->asy_excl);
1217 mutex_exit(&asy->asy_soft_sr);
1218 ASY_DPRINTF(asy, ASY_DEBUG_INIT,
1219 "Cannot identify UART chip at %p",
1220 (void *)asy->asy_ioaddr);
1221 return (DDI_FAILURE);
1222 }
1223 asy->asy_flags &= ~ASY_DDI_SUSPENDED;
1224 if (async->async_flags & ASYNC_ISOPEN) {
1225 asy_program(asy, ASY_INIT);
1226 /* Kick off output */
1227 if (async->async_ocnt > 0) {
1228 async_resume(async);
1229 } else {
1230 mutex_exit(&asy->asy_excl_hi);
1231 if (async->async_xmitblk)
1232 freeb(async->async_xmitblk);
1233 async->async_xmitblk = NULL;
1234 async_start(async);
1235 mutex_enter(&asy->asy_excl_hi);
1236 }
1237 asysetsoft(asy);
1238 }
1239 mutex_exit(&asy->asy_excl_hi);
1240 mutex_exit(&asy->asy_excl);
1241 mutex_exit(&asy->asy_soft_sr);
1242
1243 mutex_enter(&asy->asy_excl);
1244 if (async->async_flags & ASYNC_RESUME_BUFCALL) {
1245 async->async_wbufcid = bufcall(async->async_wbufcds,
1246 BPRI_HI, (void (*)(void *)) async_reioctl,
1247 (void *)(intptr_t)async->async_common->asy_unit);
1248 async->async_flags &= ~ASYNC_RESUME_BUFCALL;
1249 }
1250 async_process_suspq(asy);
1251 mutex_exit(&asy->asy_excl);
1252 return (DDI_SUCCESS);
1253 }
1254
1255 static int
asy_suspend(struct asycom * asy)1256 asy_suspend(struct asycom *asy)
1257 {
1258 struct asyncline *async = asy->asy_priv;
1259 unsigned i;
1260 uchar_t lsr;
1261
1262 #ifdef DEBUG
1263 if (asy_nosuspend)
1264 return (DDI_SUCCESS);
1265 #endif
1266 mutex_enter(&asy->asy_excl);
1267
1268 ASSERT(async->async_ops >= 0);
1269 while (async->async_ops > 0)
1270 cv_wait(&async->async_ops_cv, &asy->asy_excl);
1271
1272 async->async_flags |= ASYNC_DDI_SUSPENDED;
1273
1274 /* Wait for timed break and delay to complete */
1275 while ((async->async_flags & (ASYNC_BREAK|ASYNC_DELAY))) {
1276 if (cv_wait_sig(&async->async_flags_cv, &asy->asy_excl) == 0) {
1277 async_process_suspq(asy);
1278 mutex_exit(&asy->asy_excl);
1279 return (DDI_FAILURE);
1280 }
1281 }
1282
1283 /* Clear untimed break */
1284 if (async->async_flags & ASYNC_OUT_SUSPEND)
1285 async_resume_utbrk(async);
1286
1287 mutex_exit(&asy->asy_excl);
1288
1289 mutex_enter(&asy->asy_soft_sr);
1290 mutex_enter(&asy->asy_excl);
1291 if (async->async_wbufcid != 0) {
1292 bufcall_id_t bcid = async->async_wbufcid;
1293 async->async_wbufcid = 0;
1294 async->async_flags |= ASYNC_RESUME_BUFCALL;
1295 mutex_exit(&asy->asy_excl);
1296 unbufcall(bcid);
1297 mutex_enter(&asy->asy_excl);
1298 }
1299 mutex_enter(&asy->asy_excl_hi);
1300
1301 asy_disable_interrupts(asy, ASY_IER_ALL);
1302 asy->asy_flags |= ASY_DDI_SUSPENDED;
1303
1304 /*
1305 * Hardware interrupts are disabled we can drop our high level
1306 * lock and proceed.
1307 */
1308 mutex_exit(&asy->asy_excl_hi);
1309
1310 /* Process remaining RX characters and RX errors, if any */
1311 lsr = asy_get(asy, ASY_LSR);
1312 async_rxint(asy, lsr);
1313
1314 /* Wait for TX to drain */
1315 for (i = 1000; i > 0; i--) {
1316 lsr = asy_get(asy, ASY_LSR);
1317 if ((lsr & (ASY_LSR_TEMT | ASY_LSR_THRE)) ==
1318 (ASY_LSR_TEMT | ASY_LSR_THRE))
1319 break;
1320 delay(drv_usectohz(10000));
1321 }
1322 if (i == 0)
1323 asyerror(asy, CE_WARN, "transmitter wasn't drained before "
1324 "driver was suspended");
1325
1326 mutex_exit(&asy->asy_excl);
1327 mutex_exit(&asy->asy_soft_sr);
1328
1329 return (DDI_SUCCESS);
1330 }
1331
1332 static int
asydetach(dev_info_t * devi,ddi_detach_cmd_t cmd)1333 asydetach(dev_info_t *devi, ddi_detach_cmd_t cmd)
1334 {
1335 int instance;
1336 struct asycom *asy;
1337
1338 instance = ddi_get_instance(devi); /* find out which unit */
1339
1340 asy = ddi_get_soft_state(asy_soft_state, instance);
1341 if (asy == NULL)
1342 return (DDI_FAILURE);
1343
1344 switch (cmd) {
1345 case DDI_DETACH:
1346 break;
1347
1348 case DDI_SUSPEND:
1349 return (asy_suspend(asy));
1350
1351 default:
1352 return (DDI_FAILURE);
1353 }
1354
1355 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "%s shutdown", asy_hw_name(asy));
1356
1357 /*
1358 * Ensure that interrupts are disabled prior to destroying data and
1359 * mutexes that they depend on.
1360 */
1361 if ((asy->asy_progress & ASY_PROGRESS_INT) != 0)
1362 asy_intr_free(asy);
1363
1364 if ((asy->asy_progress & ASY_PROGRESS_SOFTINT) != 0)
1365 asy_softintr_free(asy);
1366
1367 if ((asy->asy_progress & ASY_PROGRESS_ASYNC) != 0) {
1368 struct asyncline *async = asy->asy_priv;
1369
1370 asy->asy_priv = NULL;
1371 /* cancel DTR hold timeout */
1372 if (async->async_dtrtid != 0) {
1373 (void) untimeout(async->async_dtrtid);
1374 async->async_dtrtid = 0;
1375 }
1376 cv_destroy(&async->async_flags_cv);
1377 kmem_free(async, sizeof (struct asyncline));
1378 }
1379
1380 if ((asy->asy_progress & ASY_PROGRESS_MINOR) != 0)
1381 ddi_remove_minor_node(devi, NULL);
1382
1383 if ((asy->asy_progress & ASY_PROGRESS_MUTEX) != 0) {
1384 mutex_destroy(&asy->asy_excl);
1385 mutex_destroy(&asy->asy_excl_hi);
1386 mutex_destroy(&asy->asy_soft_lock);
1387 }
1388
1389 if ((asy->asy_progress & ASY_PROGRESS_REGS) != 0)
1390 ddi_regs_map_free(&asy->asy_iohandle);
1391
1392 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "shutdown complete");
1393 asy_soft_state_free(asy);
1394
1395 return (DDI_SUCCESS);
1396 }
1397
1398 /*
1399 * asyprobe
1400 * We don't bother probing for the hardware, as since Solaris 2.6, device
1401 * nodes are only created for auto-detected hardware or nodes explicitly
1402 * created by the user, e.g. via the DCA. However, we should check the
1403 * device node is at least vaguely usable, i.e. we have a block of 8 i/o
1404 * ports. This prevents attempting to attach to bogus serial ports which
1405 * some BIOSs still partially report when they are disabled in the BIOS.
1406 */
1407 static int
asyprobe(dev_info_t * devi)1408 asyprobe(dev_info_t *devi)
1409 {
1410 return ((asy_get_io_regnum(devi, NULL) < 0) ?
1411 DDI_PROBE_FAILURE : DDI_PROBE_DONTCARE);
1412 }
1413
1414 static int
asyattach(dev_info_t * devi,ddi_attach_cmd_t cmd)1415 asyattach(dev_info_t *devi, ddi_attach_cmd_t cmd)
1416 {
1417 int instance;
1418 int mcr;
1419 int ret;
1420 int regnum = 0;
1421 int i;
1422 struct asycom *asy;
1423 char name[ASY_MINOR_LEN];
1424 int status;
1425 static ddi_device_acc_attr_t ioattr = {
1426 .devacc_attr_version = DDI_DEVICE_ATTR_V1,
1427 .devacc_attr_endian_flags = DDI_NEVERSWAP_ACC,
1428 .devacc_attr_dataorder = DDI_STRICTORDER_ACC,
1429 .devacc_attr_access = DDI_DEFAULT_ACC
1430 };
1431
1432 switch (cmd) {
1433 case DDI_ATTACH:
1434 break;
1435
1436 case DDI_RESUME:
1437 return (asy_resume(devi));
1438
1439 default:
1440 return (DDI_FAILURE);
1441 }
1442
1443 mutex_enter(&asy_glob_lock);
1444 if (com_ports == NULL) { /* need to initialize com_ports */
1445 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, devi, 0,
1446 "motherboard-serial-ports", &com_ports, &num_com_ports) !=
1447 DDI_PROP_SUCCESS) {
1448 /* Use our built-in COM[1234] values */
1449 com_ports = (int *)standard_com_ports;
1450 num_com_ports = sizeof (standard_com_ports) /
1451 sizeof (standard_com_ports[0]);
1452 }
1453 if (num_com_ports > 10) {
1454 /* We run out of single digits for device properties */
1455 num_com_ports = 10;
1456 cmn_err(CE_WARN,
1457 "%s: more than %d motherboard-serial-ports",
1458 asy_info.mi_idname, num_com_ports);
1459 }
1460 }
1461 mutex_exit(&asy_glob_lock);
1462
1463 instance = ddi_get_instance(devi); /* find out which unit */
1464 ret = ddi_soft_state_zalloc(asy_soft_state, instance);
1465 if (ret != DDI_SUCCESS)
1466 return (DDI_FAILURE);
1467 asy = ddi_get_soft_state(asy_soft_state, instance);
1468
1469 asy->asy_dip = devi;
1470 #ifdef DEBUG
1471 asy->asy_debug = debug;
1472 #endif
1473 asy->asy_unit = instance;
1474
1475 regnum = asy_get_io_regnum(devi, asy);
1476
1477 if (regnum < 0 ||
1478 ddi_regs_map_setup(devi, regnum, (caddr_t *)&asy->asy_ioaddr,
1479 (offset_t)0, (offset_t)0, &ioattr, &asy->asy_iohandle)
1480 != DDI_SUCCESS) {
1481 asyerror(asy, CE_WARN, "could not map UART registers @ %p",
1482 (void *)asy->asy_ioaddr);
1483 goto fail;
1484 }
1485
1486 asy->asy_progress |= ASY_PROGRESS_REGS;
1487
1488 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "UART @ %p", (void *)asy->asy_ioaddr);
1489
1490 /*
1491 * Lookup the i/o address to see if this is a standard COM port
1492 * in which case we assign it the correct tty[a-d] to match the
1493 * COM port number, or some other i/o address in which case it
1494 * will be assigned /dev/term/[0123...] in some rather arbitrary
1495 * fashion.
1496 */
1497 for (i = 0; i < num_com_ports; i++) {
1498 if (asy->asy_ioaddr == (uint8_t *)(uintptr_t)com_ports[i]) {
1499 asy->asy_com_port = i + 1;
1500 break;
1501 }
1502 }
1503
1504 /*
1505 * It appears that there was async hardware that on reset did not clear
1506 * IER. Hence when we enable interrupts, this hardware would cause the
1507 * system to hang if there was input available.
1508 *
1509 * Don't use asy_disable_interrupts() as the mutexes haven't been
1510 * initialized yet.
1511 */
1512 ddi_put8(asy->asy_iohandle,
1513 asy->asy_ioaddr + asy_reg_table[ASY_IER].asy_reg_off, 0);
1514
1515 /*
1516 * Establish default settings:
1517 * - use RTS/DTR after open
1518 * - 8N1 data format
1519 * - 9600 baud
1520 */
1521 asy->asy_mcr |= ASY_MCR_RTS | ASY_MCR_DTR;
1522 asy->asy_lcr = ASY_LCR_STOP1 | ASY_LCR_BITS8;
1523 asy->asy_bidx = B9600;
1524 asy->asy_fifo_buf = 1;
1525 asy->asy_use_fifo = ASY_FCR_FIFO_OFF;
1526
1527 #ifdef DEBUG
1528 asy->asy_msint_cnt = 0; /* # of times in async_msint */
1529 #endif
1530 mcr = 0; /* don't enable until open */
1531
1532 if (asy->asy_com_port != 0) {
1533 /*
1534 * For motherboard ports, emulate tty eeprom properties.
1535 * Actually, we can't tell if a port is motherboard or not,
1536 * so for "motherboard ports", read standard DOS COM ports.
1537 */
1538 switch (asy_getproperty(devi, asy, "ignore-cd")) {
1539 case 0: /* *-ignore-cd=False */
1540 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1541 "clear ASY_IGNORE_CD");
1542 asy->asy_flags &= ~ASY_IGNORE_CD; /* wait for cd */
1543 break;
1544 case 1: /* *-ignore-cd=True */
1545 /*FALLTHRU*/
1546 default: /* *-ignore-cd not defined */
1547 /*
1548 * We set rather silly defaults of soft carrier on
1549 * and DTR/RTS raised here because it might be that
1550 * one of the motherboard ports is the system console.
1551 */
1552 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1553 "set ASY_IGNORE_CD, set RTS & DTR");
1554 mcr = asy->asy_mcr; /* rts/dtr on */
1555 asy->asy_flags |= ASY_IGNORE_CD; /* ignore cd */
1556 break;
1557 }
1558
1559 /* Property for not raising DTR/RTS */
1560 switch (asy_getproperty(devi, asy, "rts-dtr-off")) {
1561 case 0: /* *-rts-dtr-off=False */
1562 asy->asy_flags |= ASY_RTS_DTR_OFF; /* OFF */
1563 mcr = asy->asy_mcr; /* rts/dtr on */
1564 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1565 "ASY_RTS_DTR_OFF set and DTR & RTS set");
1566 break;
1567 case 1: /* *-rts-dtr-off=True */
1568 /*FALLTHRU*/
1569 default: /* *-rts-dtr-off undefined */
1570 break;
1571 }
1572
1573 /* Parse property for tty modes */
1574 asy_parse_mode(devi, asy);
1575 } else {
1576 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
1577 "clear ASY_IGNORE_CD, clear RTS & DTR");
1578 asy->asy_flags &= ~ASY_IGNORE_CD; /* wait for cd */
1579 }
1580
1581 /*
1582 * Install per instance software interrupt handler.
1583 */
1584 if (asy_softintr_setup(asy) != DDI_SUCCESS) {
1585 asyerror(asy, CE_WARN, "Cannot set soft interrupt");
1586 goto fail;
1587 }
1588
1589 asy->asy_progress |= ASY_PROGRESS_SOFTINT;
1590
1591 /*
1592 * Install interrupt handler for this device.
1593 */
1594 if ((asy_intr_setup(asy, DDI_INTR_TYPE_MSIX) != DDI_SUCCESS) &&
1595 (asy_intr_setup(asy, DDI_INTR_TYPE_MSI) != DDI_SUCCESS) &&
1596 (asy_intr_setup(asy, DDI_INTR_TYPE_FIXED) != DDI_SUCCESS)) {
1597 asyerror(asy, CE_WARN, "Cannot set device interrupt");
1598 goto fail;
1599 }
1600
1601 asy->asy_progress |= ASY_PROGRESS_INT;
1602
1603 /*
1604 * Initialize mutexes before accessing the hardware
1605 */
1606 mutex_init(&asy->asy_soft_lock, NULL, MUTEX_DRIVER,
1607 DDI_INTR_PRI(asy->asy_soft_intr_pri));
1608 mutex_init(&asy->asy_soft_sr, NULL, MUTEX_DRIVER,
1609 DDI_INTR_PRI(asy->asy_soft_intr_pri));
1610
1611 mutex_init(&asy->asy_excl, NULL, MUTEX_DRIVER, NULL);
1612 mutex_init(&asy->asy_excl_hi, NULL, MUTEX_DRIVER,
1613 DDI_INTR_PRI(asy->asy_intr_pri));
1614
1615 asy->asy_progress |= ASY_PROGRESS_MUTEX;
1616
1617 mutex_enter(&asy->asy_excl);
1618 mutex_enter(&asy->asy_excl_hi);
1619
1620 if (asy_identify_chip(devi, asy) != DDI_SUCCESS) {
1621 ASY_DPRINTF(asy, ASY_DEBUG_INIT,
1622 "Cannot identify UART chip at %p",
1623 (void *)asy->asy_ioaddr);
1624 goto fail;
1625 }
1626
1627 asy_disable_interrupts(asy, ASY_IER_ALL);
1628 asy_put(asy, ASY_LCR, asy->asy_lcr);
1629 asy_set_baudrate(asy, asy->asy_bidx);
1630 asy_put(asy, ASY_MCR, mcr);
1631
1632 mutex_exit(&asy->asy_excl_hi);
1633 mutex_exit(&asy->asy_excl);
1634
1635 asyinit(asy); /* initialize the asyncline structure */
1636 asy->asy_progress |= ASY_PROGRESS_ASYNC;
1637
1638 /* create minor device nodes for this device */
1639 if (asy->asy_com_port != 0) {
1640 /*
1641 * For DOS COM ports, add letter suffix so
1642 * devfsadm can create correct link names.
1643 */
1644 name[0] = asy->asy_com_port + 'a' - 1;
1645 name[1] = '\0';
1646 } else {
1647 /*
1648 * asy port which isn't a standard DOS COM
1649 * port gets a numeric name based on instance
1650 */
1651 (void) snprintf(name, ASY_MINOR_LEN, "%d", instance);
1652 }
1653 status = ddi_create_minor_node(devi, name, S_IFCHR, instance,
1654 asy->asy_com_port != 0 ? DDI_NT_SERIAL_MB : DDI_NT_SERIAL, 0);
1655 if (status == DDI_SUCCESS) {
1656 (void) strcat(name, ",cu");
1657 status = ddi_create_minor_node(devi, name, S_IFCHR,
1658 OUTLINE | instance,
1659 asy->asy_com_port != 0 ? DDI_NT_SERIAL_MB_DO :
1660 DDI_NT_SERIAL_DO, 0);
1661 }
1662
1663 if (status != DDI_SUCCESS)
1664 goto fail;
1665
1666 asy->asy_progress |= ASY_PROGRESS_MINOR;
1667
1668 /*
1669 * Fill in the polled I/O structure.
1670 */
1671 asy->polledio.cons_polledio_version = CONSPOLLEDIO_V0;
1672 asy->polledio.cons_polledio_argument = (cons_polledio_arg_t)asy;
1673 asy->polledio.cons_polledio_putchar = asyputchar;
1674 asy->polledio.cons_polledio_getchar = asygetchar;
1675 asy->polledio.cons_polledio_ischar = asyischar;
1676 asy->polledio.cons_polledio_enter = NULL;
1677 asy->polledio.cons_polledio_exit = NULL;
1678
1679 ddi_report_dev(devi);
1680 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "done");
1681 return (DDI_SUCCESS);
1682
1683 fail:
1684 (void) asydetach(devi, DDI_DETACH);
1685 return (DDI_FAILURE);
1686 }
1687
1688 static int
asyinfo(dev_info_t * dip __unused,ddi_info_cmd_t infocmd,void * arg,void ** result)1689 asyinfo(dev_info_t *dip __unused, ddi_info_cmd_t infocmd, void *arg,
1690 void **result)
1691 {
1692 dev_t dev = (dev_t)arg;
1693 int instance, error;
1694 struct asycom *asy;
1695
1696 instance = UNIT(dev);
1697
1698 switch (infocmd) {
1699 case DDI_INFO_DEVT2DEVINFO:
1700 asy = ddi_get_soft_state(asy_soft_state, instance);
1701 if ((asy == NULL) || (asy->asy_dip == NULL))
1702 error = DDI_FAILURE;
1703 else {
1704 *result = (void *) asy->asy_dip;
1705 error = DDI_SUCCESS;
1706 }
1707 break;
1708 case DDI_INFO_DEVT2INSTANCE:
1709 *result = (void *)(intptr_t)instance;
1710 error = DDI_SUCCESS;
1711 break;
1712 default:
1713 error = DDI_FAILURE;
1714 }
1715 return (error);
1716 }
1717
1718 /* asy_getproperty -- walk through all name variants until we find a match */
1719
1720 static int
asy_getproperty(dev_info_t * devi,struct asycom * asy,const char * property)1721 asy_getproperty(dev_info_t *devi, struct asycom *asy, const char *property)
1722 {
1723 int len;
1724 int ret;
1725 char letter = asy->asy_com_port + 'a' - 1; /* for ttya */
1726 char number = asy->asy_com_port + '0'; /* for COM1 */
1727 char val[40];
1728 char name[40];
1729
1730 /* Property for ignoring DCD */
1731 (void) sprintf(name, "tty%c-%s", letter, property);
1732 len = sizeof (val);
1733 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1734 if (ret != DDI_PROP_SUCCESS) {
1735 (void) sprintf(name, "com%c-%s", number, property);
1736 len = sizeof (val);
1737 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1738 }
1739 if (ret != DDI_PROP_SUCCESS) {
1740 (void) sprintf(name, "tty0%c-%s", number, property);
1741 len = sizeof (val);
1742 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1743 }
1744 if (ret != DDI_PROP_SUCCESS) {
1745 (void) sprintf(name, "port-%c-%s", letter, property);
1746 len = sizeof (val);
1747 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
1748 }
1749 if (ret != DDI_PROP_SUCCESS)
1750 return (-1); /* property non-existant */
1751 if (val[0] == 'f' || val[0] == 'F' || val[0] == '0')
1752 return (0); /* property false/0 */
1753 return (1); /* property true/!0 */
1754 }
1755
1756 /* asy_soft_state_free - local wrapper for ddi_soft_state_free(9F) */
1757
1758 static void
asy_soft_state_free(struct asycom * asy)1759 asy_soft_state_free(struct asycom *asy)
1760 {
1761 if (asy->asy_priv != NULL) {
1762 kmem_free(asy->asy_priv, sizeof (struct asyncline));
1763 asy->asy_priv = NULL;
1764 }
1765 ddi_soft_state_free(asy_soft_state, asy->asy_unit);
1766 }
1767
1768 static char *
asy_hw_name(struct asycom * asy)1769 asy_hw_name(struct asycom *asy)
1770 {
1771 switch (asy->asy_hwtype) {
1772 case ASY_8250A:
1773 return ("8250A/16450");
1774 case ASY_16550:
1775 return ("16550");
1776 case ASY_16550A:
1777 return ("16550A");
1778 case ASY_16650:
1779 return ("16650");
1780 case ASY_16750:
1781 return ("16750");
1782 case ASY_16950:
1783 return ("16950");
1784 }
1785
1786 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "unknown asy_hwtype: %d",
1787 asy->asy_hwtype);
1788 return ("?");
1789 }
1790
1791 static boolean_t
asy_is_devid(struct asycom * asy,char * venprop,char * devprop,int venid,int devid)1792 asy_is_devid(struct asycom *asy, char *venprop, char *devprop,
1793 int venid, int devid)
1794 {
1795 if (ddi_prop_get_int(DDI_DEV_T_ANY, asy->asy_dip, DDI_PROP_DONTPASS,
1796 venprop, 0) != venid) {
1797 return (B_FALSE);
1798 }
1799
1800 if (ddi_prop_get_int(DDI_DEV_T_ANY, asy->asy_dip, DDI_PROP_DONTPASS,
1801 devprop, 0) != devid) {
1802 return (B_FALSE);
1803 }
1804
1805 return (B_FALSE);
1806 }
1807
1808 static void
asy_check_loopback(struct asycom * asy)1809 asy_check_loopback(struct asycom *asy)
1810 {
1811 if (asy_get_bus_type(asy->asy_dip) != ASY_BUS_PCI)
1812 return;
1813
1814 /* Check if this is a Agere/Lucent Venus PCI modem chipset. */
1815 if (asy_is_devid(asy, "vendor-id", "device-id", 0x11c1, 0x0480) ||
1816 asy_is_devid(asy, "subsystem-vendor-id", "subsystem-id", 0x11c1,
1817 0x0480))
1818 asy->asy_flags2 |= ASY2_NO_LOOPBACK;
1819 }
1820
1821 static int
asy_identify_chip(dev_info_t * devi,struct asycom * asy)1822 asy_identify_chip(dev_info_t *devi, struct asycom *asy)
1823 {
1824 int isr, lsr, mcr, spr;
1825 dev_t dev;
1826 uint_t hwtype;
1827
1828 /*
1829 * Initially, we'll assume we have the highest supported chip model
1830 * until we find out what we actually have.
1831 */
1832 asy->asy_hwtype = ASY_MAXCHIP;
1833
1834 /*
1835 * First, see if we can even do the loopback check, which may not work
1836 * on certain hardware.
1837 */
1838 asy_check_loopback(asy);
1839
1840 if (asy_scr_test) {
1841 /* Check that the scratch register works. */
1842
1843 /* write to scratch register */
1844 asy_put(asy, ASY_SPR, ASY_SPR_TEST);
1845 /* make sure that pattern doesn't just linger on the bus */
1846 asy_put(asy, ASY_FCR, 0x00);
1847 /* read data back from scratch register */
1848 spr = asy_get(asy, ASY_SPR);
1849 if (spr != ASY_SPR_TEST) {
1850 /*
1851 * Scratch register not working.
1852 * Probably not an async chip.
1853 * 8250 and 8250B don't have scratch registers,
1854 * but only worked in ancient PC XT's anyway.
1855 */
1856 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "UART @ %p "
1857 "scratch register: expected 0x5a, got 0x%02x",
1858 (void *)asy->asy_ioaddr, spr);
1859 return (DDI_FAILURE);
1860 }
1861 }
1862 /*
1863 * Use 16550 fifo reset sequence specified in NS application
1864 * note. Disable fifos until chip is initialized.
1865 */
1866 asy_put(asy, ASY_FCR, 0x00); /* disable */
1867 asy_put(asy, ASY_FCR, ASY_FCR_FIFO_EN); /* enable */
1868 asy_put(asy, ASY_FCR, ASY_FCR_FIFO_EN | ASY_FCR_RHR_FL); /* reset */
1869 if (asymaxchip >= ASY_16650 && asy_scr_test) {
1870 /*
1871 * Reset 16650 enhanced regs also, in case we have one of these
1872 */
1873 asy_put(asy, ASY_EFR, 0);
1874 }
1875
1876 /*
1877 * See what sort of FIFO we have.
1878 * Try enabling it and see what chip makes of this.
1879 */
1880
1881 asy->asy_fifor = 0;
1882 if (asymaxchip >= ASY_16550A)
1883 asy->asy_fifor |=
1884 ASY_FCR_FIFO_EN | ASY_FCR_DMA | (asy_trig_level & 0xff);
1885
1886 /*
1887 * On the 16750, FCR[5] enables the 64 byte FIFO. FCR[5] can only be set
1888 * while LCR[7] = 1 (DLAB), which is taken care of by asy_reset_fifo().
1889 */
1890 if (asymaxchip >= ASY_16750)
1891 asy->asy_fifor |= ASY_FCR_FIFO64;
1892
1893 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
1894
1895 mcr = asy_get(asy, ASY_MCR);
1896 isr = asy_get(asy, ASY_ISR);
1897
1898 /*
1899 * Note we get 0xff if chip didn't return us anything,
1900 * e.g. if there's no chip there.
1901 */
1902 if (isr == 0xff) {
1903 asyerror(asy, CE_WARN, "UART @ %p interrupt register: got 0xff",
1904 (void *)asy->asy_ioaddr);
1905 return (DDI_FAILURE);
1906 }
1907
1908 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
1909 "probe fifo FIFOR=0x%02x ISR=0x%02x MCR=0x%02x",
1910 asy->asy_fifor | ASY_FCR_THR_FL | ASY_FCR_RHR_FL, isr, mcr);
1911
1912 /*
1913 * Detect the chip type by comparing ISR[7,6] and ISR[5].
1914 *
1915 * When the FIFOs are enabled by setting FCR[0], ISR[7,6] read as 1.
1916 * Additionally on a 16750, the 64 byte FIFOs are enabled by setting
1917 * FCR[5], and ISR[5] will read as 1, too.
1918 *
1919 * We will check later whether we have a 16650, which requires EFR[4]=1
1920 * to enable its deeper FIFOs and extra features. It does not use FCR[5]
1921 * and ISR[5] to enable deeper FIFOs like the 16750 does.
1922 */
1923 switch (isr & (ASY_ISR_FIFOEN | ASY_ISR_FIFO64)) {
1924 case 0x40: /* 16550 with broken FIFOs */
1925 hwtype = ASY_16550;
1926 asy->asy_fifor = 0;
1927 break;
1928
1929 case ASY_ISR_FIFOEN: /* 16550A with working FIFOs */
1930 hwtype = ASY_16550A;
1931 asy->asy_fifo_buf = 16;
1932 asy->asy_use_fifo = ASY_FCR_FIFO_EN;
1933 asy->asy_fifor &= ~ASY_FCR_FIFO64;
1934 break;
1935
1936 case ASY_ISR_FIFOEN | ASY_ISR_FIFO64: /* 16750 with 64byte FIFOs */
1937 hwtype = ASY_16750;
1938 asy->asy_fifo_buf = 64;
1939 asy->asy_use_fifo = ASY_FCR_FIFO_EN;
1940 break;
1941
1942 default: /* 8250A/16450 without FIFOs */
1943 hwtype = ASY_8250A;
1944 asy->asy_fifor = 0;
1945 }
1946
1947 if (hwtype > asymaxchip) {
1948 asyerror(asy, CE_WARN, "UART @ %p "
1949 "unexpected probe result: "
1950 "FCR=0x%02x ISR=0x%02x MCR=0x%02x",
1951 (void *)asy->asy_ioaddr,
1952 asy->asy_fifor | ASY_FCR_THR_FL | ASY_FCR_RHR_FL, isr, mcr);
1953 return (DDI_FAILURE);
1954 }
1955
1956 /*
1957 * Now reset the FIFO operation appropriate for the chip type.
1958 * Note we must call asy_reset_fifo() before any possible
1959 * downgrade of the asy->asy_hwtype, or it may not disable
1960 * the more advanced features we specifically want downgraded.
1961 */
1962 asy_reset_fifo(asy, 0);
1963
1964 /*
1965 * Check for Exar/Startech ST16C650 or newer, which will still look like
1966 * a 16550A until we enable its enhanced mode.
1967 */
1968 if (hwtype >= ASY_16550A && asymaxchip >= ASY_16650 &&
1969 asy_scr_test) {
1970 /*
1971 * Write the XOFF2 register, which shadows SPR on the 16650.
1972 * On other chips, SPR will be overwritten.
1973 */
1974 asy_put(asy, ASY_XOFF2, 0);
1975
1976 /* read back scratch register */
1977 spr = asy_get(asy, ASY_SPR);
1978
1979 if (spr == ASY_SPR_TEST) {
1980 /* looks like we have an ST16650 -- enable it */
1981 hwtype = ASY_16650;
1982 asy_put(asy, ASY_EFR, ASY_EFR_ENH_EN);
1983
1984 /*
1985 * Some 16650-compatible chips are also compatible with
1986 * the 16750 and have deeper FIFOs, which we may have
1987 * detected above. Don't downgrade the FIFO size.
1988 */
1989 if (asy->asy_fifo_buf < 32)
1990 asy->asy_fifo_buf = 32;
1991
1992 /*
1993 * Use a 24 byte transmit FIFO trigger only if were
1994 * allowed to use >16 transmit FIFO depth by the
1995 * global tunable.
1996 */
1997 if (asy_max_tx_fifo >= asy->asy_fifo_buf)
1998 asy->asy_fifor |= ASY_FCR_THR_TRIG_24;
1999 asy_reset_fifo(asy, 0);
2000 }
2001 }
2002
2003 /*
2004 * If we think we got a 16650, we may actually have a 16950, so check
2005 * for that.
2006 */
2007 if (hwtype >= ASY_16650 && asymaxchip >= ASY_16950) {
2008 uint8_t ier, asr;
2009
2010 /*
2011 * First, clear IER and read it back. That should be a no-op as
2012 * either asyattach() or asy_resume() disabled all interrupts
2013 * before we were called.
2014 */
2015 asy_put(asy, ASY_IER, 0);
2016 ier = asy_get(asy, ASY_IER);
2017 if (ier != 0) {
2018 dev_err(asy->asy_dip, CE_WARN, "!%s: UART @ %p "
2019 "interrupt enable register: got 0x%02x", __func__,
2020 (void *)asy->asy_ioaddr, ier);
2021 return (DDI_FAILURE);
2022 }
2023
2024 /*
2025 * Next, try to read ASR, which shares the register offset with
2026 * IER. ASR can only be read if the ASR enable bit is set in
2027 * ACR, which itself is an indexed registers. This is taken care
2028 * of by asy_get().
2029 *
2030 * There are a few bits in ASR which should be 1 at this point,
2031 * definitely the TX idle bit (ASR[7]) and also the FIFO size
2032 * bit (ASR[6]) since we've done everything we can to enable any
2033 * deeper FIFO support.
2034 *
2035 * Thus if we read back ASR as 0, we failed to read it, and this
2036 * isn't the chip we're looking for.
2037 */
2038 asr = asy_get(asy, ASY_ASR);
2039
2040 if (asr != ier) {
2041 hwtype = ASY_16950;
2042
2043 if ((asr & ASY_ASR_FIFOSZ) != 0)
2044 asy->asy_fifo_buf = 128;
2045 else
2046 asy->asy_fifo_buf = 16;
2047
2048 asy_reset_fifo(asy, 0);
2049
2050 /*
2051 * Enable 16950 specific trigger level registers. Set
2052 * DTR pin to be compatible to 16450, 16550, and 16750.
2053 */
2054 asy->asy_acr = ASY_ACR_TRIG | ASY_ACR_DTR_NORM;
2055 asy_put(asy, ASY_ACR, asy->asy_acr);
2056
2057 /* Set half the FIFO size as receive trigger level. */
2058 asy_put(asy, ASY_RTL, asy->asy_fifo_buf/2);
2059
2060 /*
2061 * Set the transmit trigger level to 1.
2062 *
2063 * While one would expect that any transmit trigger
2064 * level would work (the 16550 uses a hardwired level
2065 * of 16), in my tests with a 16950 compatible chip
2066 * (MosChip 9912) I would never see a TX interrupt
2067 * on any transmit trigger level > 1.
2068 */
2069 asy_put(asy, ASY_TTL, 1);
2070
2071 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "ASR 0x%02x", asr);
2072 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "RFL 0x%02x",
2073 asy_get(asy, ASY_RFL));
2074 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TFL 0x%02x",
2075 asy_get(asy, ASY_TFL));
2076
2077 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "ACR 0x%02x",
2078 asy_get(asy, ASY_ACR));
2079 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "CPR 0x%02x",
2080 asy_get(asy, ASY_CPR));
2081 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TCR 0x%02x",
2082 asy_get(asy, ASY_TCR));
2083 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "CKS 0x%02x",
2084 asy_get(asy, ASY_CKS));
2085 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "TTL 0x%02x",
2086 asy_get(asy, ASY_TTL));
2087 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "RTL 0x%02x",
2088 asy_get(asy, ASY_RTL));
2089 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "FCL 0x%02x",
2090 asy_get(asy, ASY_FCL));
2091 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "FCH 0x%02x",
2092 asy_get(asy, ASY_FCH));
2093
2094 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
2095 "Chip ID: %02x%02x%02x,%02x",
2096 asy_get(asy, ASY_ID1), asy_get(asy, ASY_ID2),
2097 asy_get(asy, ASY_ID3), asy_get(asy, ASY_REV));
2098
2099 }
2100 }
2101
2102 asy->asy_hwtype = hwtype;
2103
2104 /*
2105 * If we think we might have a FIFO larger than 16 characters,
2106 * measure FIFO size and check it against expected.
2107 */
2108 if (asy_fifo_test > 0 &&
2109 !(asy->asy_flags2 & ASY2_NO_LOOPBACK) &&
2110 (asy->asy_fifo_buf > 16 ||
2111 (asy_fifo_test > 1 && asy->asy_use_fifo == ASY_FCR_FIFO_EN) ||
2112 ASY_DEBUG(asy, ASY_DEBUG_CHIP))) {
2113 int i;
2114
2115 /* Set baud rate to 57600 (fairly arbitrary choice) */
2116 asy_set_baudrate(asy, B57600);
2117 /* Set 8 bits, 1 stop bit */
2118 asy_put(asy, ASY_LCR, ASY_LCR_STOP1 | ASY_LCR_BITS8);
2119 /* Set loopback mode */
2120 asy_put(asy, ASY_MCR, ASY_MCR_LOOPBACK);
2121
2122 /* Overfill fifo */
2123 for (i = 0; i < asy->asy_fifo_buf * 2; i++) {
2124 asy_put(asy, ASY_THR, i);
2125 }
2126 /*
2127 * Now there's an interesting question here about which
2128 * FIFO we're testing the size of, RX or TX. We just
2129 * filled the TX FIFO much faster than it can empty,
2130 * although it is possible one or two characters may
2131 * have gone from it to the TX shift register.
2132 * We wait for enough time for all the characters to
2133 * move into the RX FIFO and any excess characters to
2134 * have been lost, and then read all the RX FIFO. So
2135 * the answer we finally get will be the size which is
2136 * the MIN(RX FIFO,(TX FIFO + 1 or 2)). The critical
2137 * one is actually the TX FIFO, because if we overfill
2138 * it in normal operation, the excess characters are
2139 * lost with no warning.
2140 */
2141 /*
2142 * Wait for characters to move into RX FIFO.
2143 * In theory, 200 * asy->asy_fifo_buf * 2 should be
2144 * enough. However, in practice it isn't always, so we
2145 * increase to 400 so some slow 16550A's finish, and we
2146 * increase to 3 so we spot more characters coming back
2147 * than we sent, in case that should ever happen.
2148 */
2149 delay(drv_usectohz(400 * asy->asy_fifo_buf * 3));
2150
2151 /* Now see how many characters we can read back */
2152 for (i = 0; i < asy->asy_fifo_buf * 3; i++) {
2153 lsr = asy_get(asy, ASY_LSR);
2154 if (!(lsr & ASY_LSR_DR))
2155 break; /* FIFO emptied */
2156 (void) asy_get(asy, ASY_RHR); /* lose another */
2157 }
2158
2159 ASY_DPRINTF(asy, ASY_DEBUG_CHIP,
2160 "FIFO size: expected=%d, measured=%d",
2161 asy->asy_fifo_buf, i);
2162
2163 hwtype = asy->asy_hwtype;
2164 if (i < asy->asy_fifo_buf) {
2165 /*
2166 * FIFO is somewhat smaller than we anticipated.
2167 * If we have 16 characters usable, then this
2168 * UART will probably work well enough in
2169 * 16550A mode. If less than 16 characters,
2170 * then we'd better not use it at all.
2171 * UARTs with busted FIFOs do crop up.
2172 */
2173 if (i >= 16 && asy->asy_fifo_buf >= 16) {
2174 /* fall back to a 16550A */
2175 hwtype = ASY_16550A;
2176 asy->asy_fifo_buf = 16;
2177 asy->asy_fifor &=
2178 ~(ASY_FCR_THR_TR0 | ASY_FCR_THR_TR1);
2179 } else {
2180 /* fall back to no FIFO at all */
2181 hwtype = ASY_16550;
2182 asy->asy_fifo_buf = 1;
2183 asy->asy_use_fifo = ASY_FCR_FIFO_OFF;
2184 asy->asy_fifor = 0;
2185 }
2186 } else if (i > asy->asy_fifo_buf) {
2187 /*
2188 * The FIFO is larger than expected. Use it if it is
2189 * a power of 2.
2190 */
2191 if (ISP2(i))
2192 asy->asy_fifo_buf = i;
2193 }
2194
2195 /*
2196 * We will need to reprogram the FIFO if we changed
2197 * our mind about how to drive it above, and in any
2198 * case, it would be a good idea to flush any garbage
2199 * out incase the loopback test left anything behind.
2200 * Again as earlier above, we must call asy_reset_fifo()
2201 * before any possible downgrade of asy->asy_hwtype.
2202 */
2203 if (asy->asy_hwtype >= ASY_16650 && hwtype < ASY_16650) {
2204 /* Disable 16650 enhanced mode */
2205 asy_put(asy, ASY_EFR, 0);
2206 }
2207 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
2208 asy->asy_hwtype = hwtype;
2209
2210 /* Clear loopback mode and restore DTR/RTS */
2211 asy_put(asy, ASY_MCR, mcr);
2212 }
2213
2214 ASY_DPRINTF(asy, ASY_DEBUG_CHIP, "%s @ %p",
2215 asy_hw_name(asy), (void *)asy->asy_ioaddr);
2216
2217 /* Make UART type visible in device tree for prtconf, etc */
2218 dev = makedevice(DDI_MAJOR_T_UNKNOWN, asy->asy_unit);
2219 (void) ddi_prop_update_string(dev, devi, "uart", asy_hw_name(asy));
2220
2221 if (asy->asy_hwtype == ASY_16550) /* for broken 16550's, */
2222 asy->asy_hwtype = ASY_8250A; /* drive them as 8250A */
2223
2224 return (DDI_SUCCESS);
2225 }
2226
2227 /*
2228 * asyinit() initializes the TTY protocol-private data for this channel
2229 * before enabling the interrupts.
2230 */
2231 static void
asyinit(struct asycom * asy)2232 asyinit(struct asycom *asy)
2233 {
2234 struct asyncline *async;
2235
2236 asy->asy_priv = kmem_zalloc(sizeof (struct asyncline), KM_SLEEP);
2237 async = asy->asy_priv;
2238 mutex_enter(&asy->asy_excl);
2239 async->async_common = asy;
2240 cv_init(&async->async_flags_cv, NULL, CV_DRIVER, NULL);
2241 mutex_exit(&asy->asy_excl);
2242 }
2243
2244 static int
asyopen(queue_t * rq,dev_t * dev,int flag,int sflag __unused,cred_t * cr)2245 asyopen(queue_t *rq, dev_t *dev, int flag, int sflag __unused, cred_t *cr)
2246 {
2247 struct asycom *asy;
2248 struct asyncline *async;
2249 int unit;
2250 int len;
2251 struct termios *termiosp;
2252
2253 unit = UNIT(*dev);
2254 asy = ddi_get_soft_state(asy_soft_state, unit);
2255 if (asy == NULL)
2256 return (ENXIO); /* unit not configured */
2257 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "enter");
2258 async = asy->asy_priv;
2259 mutex_enter(&asy->asy_excl);
2260
2261 again:
2262 mutex_enter(&asy->asy_excl_hi);
2263
2264 /*
2265 * Block waiting for carrier to come up, unless this is a no-delay open.
2266 */
2267 if (!(async->async_flags & ASYNC_ISOPEN)) {
2268 /*
2269 * Set the default termios settings (cflag).
2270 * Others are set in ldterm.
2271 */
2272 mutex_exit(&asy->asy_excl_hi);
2273
2274 if (ddi_getlongprop(DDI_DEV_T_ANY, ddi_root_node(),
2275 0, "ttymodes",
2276 (caddr_t)&termiosp, &len) == DDI_PROP_SUCCESS &&
2277 len == sizeof (struct termios)) {
2278 async->async_ttycommon.t_cflag = termiosp->c_cflag;
2279 kmem_free(termiosp, len);
2280 } else {
2281 asyerror(asy, CE_WARN,
2282 "couldn't get ttymodes property");
2283 }
2284 mutex_enter(&asy->asy_excl_hi);
2285
2286 /* eeprom mode support - respect properties */
2287 if (asy->asy_cflag)
2288 async->async_ttycommon.t_cflag = asy->asy_cflag;
2289
2290 async->async_ttycommon.t_iflag = 0;
2291 async->async_ttycommon.t_iocpending = NULL;
2292 async->async_ttycommon.t_size.ws_row = 0;
2293 async->async_ttycommon.t_size.ws_col = 0;
2294 async->async_ttycommon.t_size.ws_xpixel = 0;
2295 async->async_ttycommon.t_size.ws_ypixel = 0;
2296 async->async_dev = *dev;
2297 async->async_wbufcid = 0;
2298
2299 async->async_startc = CSTART;
2300 async->async_stopc = CSTOP;
2301 asy_program(asy, ASY_INIT);
2302 } else if ((async->async_ttycommon.t_flags & TS_XCLUDE) &&
2303 secpolicy_excl_open(cr) != 0) {
2304 mutex_exit(&asy->asy_excl_hi);
2305 mutex_exit(&asy->asy_excl);
2306 return (EBUSY);
2307 } else if ((*dev & OUTLINE) && !(async->async_flags & ASYNC_OUT)) {
2308 mutex_exit(&asy->asy_excl_hi);
2309 mutex_exit(&asy->asy_excl);
2310 return (EBUSY);
2311 }
2312
2313 if (*dev & OUTLINE)
2314 async->async_flags |= ASYNC_OUT;
2315
2316 /* Raise DTR on every open, but delay if it was just lowered. */
2317 while (async->async_flags & ASYNC_DTR_DELAY) {
2318 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2319 "waiting for the ASYNC_DTR_DELAY to be clear");
2320 mutex_exit(&asy->asy_excl_hi);
2321 if (cv_wait_sig(&async->async_flags_cv,
2322 &asy->asy_excl) == 0) {
2323 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2324 "interrupted by signal, exiting");
2325 mutex_exit(&asy->asy_excl);
2326 return (EINTR);
2327 }
2328 mutex_enter(&asy->asy_excl_hi);
2329 }
2330
2331 asy_set(asy, ASY_MCR, asy->asy_mcr & ASY_MCR_DTR);
2332
2333 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "\"Raise DTR on every open\": "
2334 "make mcr = %x, make TS_SOFTCAR = %s", asy_get(asy, ASY_MCR),
2335 (asy->asy_flags & ASY_IGNORE_CD) ? "ON" : "OFF");
2336
2337 if (asy->asy_flags & ASY_IGNORE_CD) {
2338 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2339 "ASY_IGNORE_CD set, set TS_SOFTCAR");
2340 async->async_ttycommon.t_flags |= TS_SOFTCAR;
2341 } else {
2342 async->async_ttycommon.t_flags &= ~TS_SOFTCAR;
2343 }
2344
2345 /*
2346 * Check carrier.
2347 */
2348 asy->asy_msr = asy_get(asy, ASY_MSR);
2349 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "TS_SOFTCAR is %s, MSR & DCD is %s",
2350 (async->async_ttycommon.t_flags & TS_SOFTCAR) ? "set" : "clear",
2351 (asy->asy_msr & ASY_MSR_DCD) ? "set" : "clear");
2352
2353 if (asy->asy_msr & ASY_MSR_DCD)
2354 async->async_flags |= ASYNC_CARR_ON;
2355 else
2356 async->async_flags &= ~ASYNC_CARR_ON;
2357 mutex_exit(&asy->asy_excl_hi);
2358
2359 /*
2360 * If FNDELAY and FNONBLOCK are clear, block until carrier up.
2361 * Quit on interrupt.
2362 */
2363 if (!(flag & (FNDELAY|FNONBLOCK)) &&
2364 !(async->async_ttycommon.t_cflag & CLOCAL)) {
2365 if ((!(async->async_flags & (ASYNC_CARR_ON|ASYNC_OUT)) &&
2366 !(async->async_ttycommon.t_flags & TS_SOFTCAR)) ||
2367 ((async->async_flags & ASYNC_OUT) &&
2368 !(*dev & OUTLINE))) {
2369 async->async_flags |= ASYNC_WOPEN;
2370 if (cv_wait_sig(&async->async_flags_cv,
2371 &asy->asy_excl) == B_FALSE) {
2372 async->async_flags &= ~ASYNC_WOPEN;
2373 mutex_exit(&asy->asy_excl);
2374 return (EINTR);
2375 }
2376 async->async_flags &= ~ASYNC_WOPEN;
2377 goto again;
2378 }
2379 } else if ((async->async_flags & ASYNC_OUT) && !(*dev & OUTLINE)) {
2380 mutex_exit(&asy->asy_excl);
2381 return (EBUSY);
2382 }
2383
2384 async->async_ttycommon.t_readq = rq;
2385 async->async_ttycommon.t_writeq = WR(rq);
2386 rq->q_ptr = WR(rq)->q_ptr = (caddr_t)async;
2387 mutex_exit(&asy->asy_excl);
2388 /*
2389 * Caution here -- qprocson sets the pointers that are used by canput
2390 * called by async_softint. ASYNC_ISOPEN must *not* be set until those
2391 * pointers are valid.
2392 */
2393 qprocson(rq);
2394 async->async_flags |= ASYNC_ISOPEN;
2395 async->async_polltid = 0;
2396 ASY_DPRINTF(asy, ASY_DEBUG_INIT, "done");
2397 return (0);
2398 }
2399
2400 static void
async_progress_check(void * arg)2401 async_progress_check(void *arg)
2402 {
2403 struct asyncline *async = arg;
2404 struct asycom *asy = async->async_common;
2405 mblk_t *bp;
2406
2407 /*
2408 * We define "progress" as either waiting on a timed break or delay, or
2409 * having had at least one transmitter interrupt. If none of these are
2410 * true, then just terminate the output and wake up that close thread.
2411 */
2412 mutex_enter(&asy->asy_excl);
2413 mutex_enter(&asy->asy_excl_hi);
2414 if (!(async->async_flags & (ASYNC_BREAK|ASYNC_DELAY|ASYNC_PROGRESS))) {
2415 async->async_ocnt = 0;
2416 async->async_flags &= ~ASYNC_BUSY;
2417 async->async_timer = 0;
2418 bp = async->async_xmitblk;
2419 async->async_xmitblk = NULL;
2420 mutex_exit(&asy->asy_excl_hi);
2421 if (bp != NULL)
2422 freeb(bp);
2423 /*
2424 * Since this timer is running, we know that we're in exit(2).
2425 * That means that the user can't possibly be waiting on any
2426 * valid ioctl(2) completion anymore, and we should just flush
2427 * everything.
2428 */
2429 flushq(async->async_ttycommon.t_writeq, FLUSHALL);
2430 cv_broadcast(&async->async_flags_cv);
2431 } else {
2432 async->async_flags &= ~ASYNC_PROGRESS;
2433 async->async_timer = timeout(async_progress_check, async,
2434 drv_usectohz(asy_drain_check));
2435 mutex_exit(&asy->asy_excl_hi);
2436 }
2437 mutex_exit(&asy->asy_excl);
2438 }
2439
2440 /*
2441 * Release DTR so that asyopen() can raise it.
2442 */
2443 static void
async_dtr_free(struct asyncline * async)2444 async_dtr_free(struct asyncline *async)
2445 {
2446 struct asycom *asy = async->async_common;
2447
2448 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2449 "async_dtr_free, clearing ASYNC_DTR_DELAY");
2450 mutex_enter(&asy->asy_excl);
2451 async->async_flags &= ~ASYNC_DTR_DELAY;
2452 async->async_dtrtid = 0;
2453 cv_broadcast(&async->async_flags_cv);
2454 mutex_exit(&asy->asy_excl);
2455 }
2456
2457 /*
2458 * Close routine.
2459 */
2460 static int
asyclose(queue_t * q,int flag,cred_t * credp __unused)2461 asyclose(queue_t *q, int flag, cred_t *credp __unused)
2462 {
2463 struct asyncline *async;
2464 struct asycom *asy;
2465
2466 async = (struct asyncline *)q->q_ptr;
2467 ASSERT(async != NULL);
2468
2469 asy = async->async_common;
2470
2471 ASY_DPRINTF(asy, ASY_DEBUG_CLOSE, "enter");
2472
2473 mutex_enter(&asy->asy_excl);
2474 async->async_flags |= ASYNC_CLOSING;
2475
2476 /*
2477 * Turn off PPS handling early to avoid events occuring during
2478 * close. Also reset the DCD edge monitoring bit.
2479 */
2480 mutex_enter(&asy->asy_excl_hi);
2481 asy->asy_flags &= ~(ASY_PPS | ASY_PPS_EDGE);
2482 mutex_exit(&asy->asy_excl_hi);
2483
2484 /*
2485 * There are two flavors of break -- timed (M_BREAK or TCSBRK) and
2486 * untimed (TIOCSBRK). For the timed case, these are enqueued on our
2487 * write queue and there's a timer running, so we don't have to worry
2488 * about them. For the untimed case, though, the user obviously made a
2489 * mistake, because these are handled immediately. We'll terminate the
2490 * break now and honor their implicit request by discarding the rest of
2491 * the data.
2492 */
2493 if (async->async_flags & ASYNC_OUT_SUSPEND) {
2494 if (async->async_utbrktid != 0) {
2495 (void) untimeout(async->async_utbrktid);
2496 async->async_utbrktid = 0;
2497 }
2498 mutex_enter(&asy->asy_excl_hi);
2499 (void) asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
2500 mutex_exit(&asy->asy_excl_hi);
2501 async->async_flags &= ~ASYNC_OUT_SUSPEND;
2502 goto nodrain;
2503 }
2504
2505 /*
2506 * If the user told us not to delay the close ("non-blocking"), then
2507 * don't bother trying to drain.
2508 *
2509 * If the user did M_STOP (ASYNC_STOPPED), there's no hope of ever
2510 * getting an M_START (since these messages aren't enqueued), and the
2511 * only other way to clear the stop condition is by loss of DCD, which
2512 * would discard the queue data. Thus, we drop the output data if
2513 * ASYNC_STOPPED is set.
2514 */
2515 if ((flag & (FNDELAY|FNONBLOCK)) ||
2516 (async->async_flags & ASYNC_STOPPED)) {
2517 goto nodrain;
2518 }
2519
2520 /*
2521 * If there's any pending output, then we have to try to drain it.
2522 * There are two main cases to be handled:
2523 * - called by close(2): need to drain until done or until
2524 * a signal is received. No timeout.
2525 * - called by exit(2): need to drain while making progress
2526 * or until a timeout occurs. No signals.
2527 *
2528 * If we can't rely on receiving a signal to get us out of a hung
2529 * session, then we have to use a timer. In this case, we set a timer
2530 * to check for progress in sending the output data -- all that we ask
2531 * (at each interval) is that there's been some progress made. Since
2532 * the interrupt routine grabs buffers from the write queue, we can't
2533 * trust changes in async_ocnt. Instead, we use a progress flag.
2534 *
2535 * Note that loss of carrier will cause the output queue to be flushed,
2536 * and we'll wake up again and finish normally.
2537 */
2538 if (!ddi_can_receive_sig() && asy_drain_check != 0) {
2539 async->async_flags &= ~ASYNC_PROGRESS;
2540 async->async_timer = timeout(async_progress_check, async,
2541 drv_usectohz(asy_drain_check));
2542 }
2543 while (async->async_ocnt > 0 ||
2544 async->async_ttycommon.t_writeq->q_first != NULL ||
2545 (async->async_flags & (ASYNC_BUSY|ASYNC_BREAK|ASYNC_DELAY))) {
2546 if (cv_wait_sig(&async->async_flags_cv, &asy->asy_excl) == 0)
2547 break;
2548 }
2549 if (async->async_timer != 0) {
2550 (void) untimeout(async->async_timer);
2551 async->async_timer = 0;
2552 }
2553
2554 nodrain:
2555 async->async_ocnt = 0;
2556 if (async->async_xmitblk != NULL)
2557 freeb(async->async_xmitblk);
2558 async->async_xmitblk = NULL;
2559
2560 /*
2561 * If line has HUPCL set or is incompletely opened fix up the modem
2562 * lines.
2563 */
2564 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "next check HUPCL flag");
2565 mutex_enter(&asy->asy_excl_hi);
2566 if ((async->async_ttycommon.t_cflag & HUPCL) ||
2567 (async->async_flags & ASYNC_WOPEN)) {
2568 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2569 "HUPCL flag = %x, ASYNC_WOPEN flag = %x",
2570 async->async_ttycommon.t_cflag & HUPCL,
2571 async->async_ttycommon.t_cflag & ASYNC_WOPEN);
2572 async->async_flags |= ASYNC_DTR_DELAY;
2573
2574 /* turn off DTR, RTS but NOT interrupt to 386 */
2575 if (asy->asy_flags & (ASY_IGNORE_CD|ASY_RTS_DTR_OFF)) {
2576 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2577 "ASY_IGNORE_CD flag = %x, "
2578 "ASY_RTS_DTR_OFF flag = %x",
2579 asy->asy_flags & ASY_IGNORE_CD,
2580 asy->asy_flags & ASY_RTS_DTR_OFF);
2581
2582 asy_put(asy, ASY_MCR, asy->asy_mcr | ASY_MCR_OUT2);
2583 } else {
2584 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
2585 "Dropping DTR and RTS");
2586 asy_put(asy, ASY_MCR, ASY_MCR_OUT2);
2587 }
2588 async->async_dtrtid =
2589 timeout((void (*)())async_dtr_free,
2590 (caddr_t)async, drv_usectohz(asy_min_dtr_low));
2591 }
2592 /*
2593 * If nobody's using it now, turn off receiver interrupts.
2594 */
2595 if ((async->async_flags & (ASYNC_WOPEN|ASYNC_ISOPEN)) == 0)
2596 asy_disable_interrupts(asy, ASY_IER_RIEN);
2597
2598 mutex_exit(&asy->asy_excl_hi);
2599
2600 ttycommon_close(&async->async_ttycommon);
2601
2602 /*
2603 * Cancel outstanding "bufcall" request.
2604 */
2605 if (async->async_wbufcid != 0) {
2606 unbufcall(async->async_wbufcid);
2607 async->async_wbufcid = 0;
2608 }
2609
2610 /* Note that qprocsoff can't be done until after interrupts are off */
2611 qprocsoff(q);
2612 q->q_ptr = WR(q)->q_ptr = NULL;
2613 async->async_ttycommon.t_readq = NULL;
2614 async->async_ttycommon.t_writeq = NULL;
2615
2616 /*
2617 * Clear out device state, except persistant device property flags.
2618 */
2619 async->async_flags &= (ASYNC_DTR_DELAY|ASY_RTS_DTR_OFF);
2620 cv_broadcast(&async->async_flags_cv);
2621 mutex_exit(&asy->asy_excl);
2622
2623 ASY_DPRINTF(asy, ASY_DEBUG_CLOSE, "done");
2624 return (0);
2625 }
2626
2627 static boolean_t
asy_isbusy(struct asycom * asy)2628 asy_isbusy(struct asycom *asy)
2629 {
2630 struct asyncline *async;
2631
2632 ASY_DPRINTF(asy, ASY_DEBUG_EOT, "enter");
2633 async = asy->asy_priv;
2634 ASSERT(mutex_owned(&asy->asy_excl));
2635 ASSERT(mutex_owned(&asy->asy_excl_hi));
2636 /*
2637 * XXXX this should be recoded
2638 */
2639 return ((async->async_ocnt > 0) ||
2640 ((asy_get(asy, ASY_LSR) & (ASY_LSR_TEMT | ASY_LSR_THRE)) == 0));
2641 }
2642
2643 static void
asy_waiteot(struct asycom * asy)2644 asy_waiteot(struct asycom *asy)
2645 {
2646 /*
2647 * Wait for the current transmission block and the
2648 * current fifo data to transmit. Once this is done
2649 * we may go on.
2650 */
2651 ASY_DPRINTF(asy, ASY_DEBUG_EOT, "enter");
2652 ASSERT(mutex_owned(&asy->asy_excl));
2653 ASSERT(mutex_owned(&asy->asy_excl_hi));
2654 while (asy_isbusy(asy)) {
2655 mutex_exit(&asy->asy_excl_hi);
2656 mutex_exit(&asy->asy_excl);
2657 drv_usecwait(10000); /* wait .01 */
2658 mutex_enter(&asy->asy_excl);
2659 mutex_enter(&asy->asy_excl_hi);
2660 }
2661 }
2662
2663 /* asy_reset_fifo -- flush fifos and [re]program fifo control register */
2664 static void
asy_reset_fifo(struct asycom * asy,uchar_t flush)2665 asy_reset_fifo(struct asycom *asy, uchar_t flush)
2666 {
2667 ASSERT(mutex_owned(&asy->asy_excl_hi));
2668
2669 /* On a 16750, we have to set DLAB in order to set ASY_FCR_FIFO64. */
2670 if (asy->asy_hwtype >= ASY_16750)
2671 asy_set(asy, ASY_LCR, ASY_LCR_DLAB);
2672
2673 asy_put(asy, ASY_FCR, asy->asy_fifor | flush);
2674
2675 /* Clear DLAB */
2676 if (asy->asy_hwtype >= ASY_16750)
2677 asy_clr(asy, ASY_LCR, ASY_LCR_DLAB);
2678 }
2679
2680 /*
2681 * Program the ASY port. Most of the async operation is based on the values
2682 * of 'c_iflag' and 'c_cflag'.
2683 */
2684 static void
asy_program(struct asycom * asy,int mode)2685 asy_program(struct asycom *asy, int mode)
2686 {
2687 struct asyncline *async;
2688 int baudrate, c_flag;
2689 uint8_t ier;
2690 int flush_reg;
2691 int ocflags;
2692
2693 ASSERT(mutex_owned(&asy->asy_excl));
2694 ASSERT(mutex_owned(&asy->asy_excl_hi));
2695
2696 async = asy->asy_priv;
2697 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "mode = 0x%08X, enter", mode);
2698
2699 baudrate = BAUDINDEX(async->async_ttycommon.t_cflag);
2700
2701 async->async_ttycommon.t_cflag &= ~(CIBAUD);
2702
2703 if (baudrate > CBAUD) {
2704 async->async_ttycommon.t_cflag |= CIBAUDEXT;
2705 async->async_ttycommon.t_cflag |=
2706 (((baudrate - CBAUD - 1) << IBSHIFT) & CIBAUD);
2707 } else {
2708 async->async_ttycommon.t_cflag &= ~CIBAUDEXT;
2709 async->async_ttycommon.t_cflag |=
2710 ((baudrate << IBSHIFT) & CIBAUD);
2711 }
2712
2713 c_flag = async->async_ttycommon.t_cflag &
2714 (CLOCAL|CREAD|CSTOPB|CSIZE|PARENB|PARODD|CBAUD|CBAUDEXT);
2715
2716 asy_disable_interrupts(asy, ASY_IER_ALL);
2717
2718 ocflags = asy->asy_ocflag;
2719
2720 /* flush/reset the status registers */
2721 (void) asy_get(asy, ASY_ISR);
2722 (void) asy_get(asy, ASY_LSR);
2723 asy->asy_msr = flush_reg = asy_get(asy, ASY_MSR);
2724 /*
2725 * The device is programmed in the open sequence, if we
2726 * have to hardware handshake, then this is a good time
2727 * to check if the device can receive any data.
2728 */
2729
2730 if ((CRTSCTS & async->async_ttycommon.t_cflag) &&
2731 !(flush_reg & ASY_MSR_CTS)) {
2732 async_flowcontrol_hw_output(asy, FLOW_STOP);
2733 } else {
2734 /*
2735 * We can not use async_flowcontrol_hw_output(asy, FLOW_START)
2736 * here, because if CRTSCTS is clear, we need clear
2737 * ASYNC_HW_OUT_FLW bit.
2738 */
2739 async->async_flags &= ~ASYNC_HW_OUT_FLW;
2740 }
2741
2742 /*
2743 * If IXON is not set, clear ASYNC_SW_OUT_FLW;
2744 * If IXON is set, no matter what IXON flag is before this
2745 * function call to asy_program,
2746 * we will use the old ASYNC_SW_OUT_FLW status.
2747 * Because of handling IXON in the driver, we also should re-calculate
2748 * the value of ASYNC_OUT_FLW_RESUME bit, but in fact,
2749 * the TCSET* commands which call asy_program
2750 * are put into the write queue, so there is no output needed to
2751 * be resumed at this point.
2752 */
2753 if (!(IXON & async->async_ttycommon.t_iflag))
2754 async->async_flags &= ~ASYNC_SW_OUT_FLW;
2755
2756 /* manually flush receive buffer or fifo (workaround for buggy fifos) */
2757 if (mode == ASY_INIT) {
2758 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
2759 for (flush_reg = asy->asy_fifo_buf; flush_reg-- > 0; ) {
2760 (void) asy_get(asy, ASY_RHR);
2761 }
2762 } else {
2763 flush_reg = asy_get(asy, ASY_RHR);
2764 }
2765 }
2766
2767 if (ocflags != (c_flag & ~CLOCAL) || mode == ASY_INIT) {
2768 /* Set line control */
2769 uint8_t lcr = 0;
2770
2771 if (c_flag & CSTOPB)
2772 lcr |= ASY_LCR_STOP2; /* 2 stop bits */
2773
2774 if (c_flag & PARENB)
2775 lcr |= ASY_LCR_PEN;
2776
2777 if ((c_flag & PARODD) == 0)
2778 lcr |= ASY_LCR_EPS;
2779
2780 switch (c_flag & CSIZE) {
2781 case CS5:
2782 lcr |= ASY_LCR_BITS5;
2783 break;
2784 case CS6:
2785 lcr |= ASY_LCR_BITS6;
2786 break;
2787 case CS7:
2788 lcr |= ASY_LCR_BITS7;
2789 break;
2790 case CS8:
2791 lcr |= ASY_LCR_BITS8;
2792 break;
2793 }
2794
2795 asy_clr(asy, ASY_LCR, ASY_LCR_WLS0 | ASY_LCR_WLS1 |
2796 ASY_LCR_STB | ASY_LCR_PEN | ASY_LCR_EPS);
2797 asy_set(asy, ASY_LCR, lcr);
2798 asy_set_baudrate(asy, baudrate);
2799
2800 /*
2801 * If we have a FIFO buffer, enable/flush
2802 * at intialize time, flush if transitioning from
2803 * CREAD off to CREAD on.
2804 */
2805 if (((ocflags & CREAD) == 0 && (c_flag & CREAD)) ||
2806 mode == ASY_INIT) {
2807 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN)
2808 asy_reset_fifo(asy, ASY_FCR_RHR_FL);
2809 }
2810
2811 /* remember the new cflags */
2812 asy->asy_ocflag = c_flag & ~CLOCAL;
2813 }
2814
2815 if (baudrate == 0)
2816 asy_put(asy, ASY_MCR,
2817 (asy->asy_mcr & ASY_MCR_RTS) | ASY_MCR_OUT2);
2818 else
2819 asy_put(asy, ASY_MCR, asy->asy_mcr | ASY_MCR_OUT2);
2820
2821 /*
2822 * Call the modem status interrupt handler to check for the carrier
2823 * in case CLOCAL was turned off after the carrier came on.
2824 * (Note: Modem status interrupt is not enabled if CLOCAL is ON.)
2825 */
2826 async_msint(asy);
2827
2828 /* Set interrupt control */
2829 ASY_DPRINTF(asy, ASY_DEBUG_MODM2,
2830 "c_flag & CLOCAL = %x t_cflag & CRTSCTS = %x",
2831 c_flag & CLOCAL, async->async_ttycommon.t_cflag & CRTSCTS);
2832
2833
2834 /* Always enable transmit and line status interrupts. */
2835 ier = ASY_IER_TIEN | ASY_IER_SIEN;
2836
2837 /*
2838 * Enable Modem status interrupt if hardware flow control is enabled or
2839 * this isn't a direct-wired (local) line, which ignores DCD.
2840 */
2841 if (((c_flag & CLOCAL) == 0) ||
2842 (async->async_ttycommon.t_cflag & CRTSCTS))
2843 ier |= ASY_IER_MIEN;
2844
2845 if (c_flag & CREAD)
2846 ier |= ASY_IER_RIEN;
2847
2848 asy_enable_interrupts(asy, ier);
2849 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
2850 }
2851
2852 static boolean_t
asy_baudok(struct asycom * asy)2853 asy_baudok(struct asycom *asy)
2854 {
2855 struct asyncline *async = asy->asy_priv;
2856 int baudrate;
2857
2858
2859 baudrate = BAUDINDEX(async->async_ttycommon.t_cflag);
2860
2861 if (baudrate >= ARRAY_SIZE(asy_baud_tab))
2862 return (0);
2863
2864 return (baudrate == 0 ||
2865 asy_baud_tab[baudrate].asy_dll != 0 ||
2866 asy_baud_tab[baudrate].asy_dlh != 0);
2867 }
2868
2869 /*
2870 * asyintr() is the High Level Interrupt Handler.
2871 *
2872 * There are four different interrupt types indexed by ISR register values:
2873 * 0: modem
2874 * 1: Tx holding register is empty, ready for next char
2875 * 2: Rx register now holds a char to be picked up
2876 * 3: error or break on line
2877 * This routine checks the Bit 0 (interrupt-not-pending) to determine if
2878 * the interrupt is from this port.
2879 */
2880 uint_t
asyintr(caddr_t argasy,caddr_t argunused __unused)2881 asyintr(caddr_t argasy, caddr_t argunused __unused)
2882 {
2883 struct asycom *asy = (struct asycom *)argasy;
2884 struct asyncline *async;
2885 int ret_status = DDI_INTR_UNCLAIMED;
2886
2887 mutex_enter(&asy->asy_excl_hi);
2888 async = asy->asy_priv;
2889 if (async == NULL ||
2890 (async->async_flags & (ASYNC_ISOPEN|ASYNC_WOPEN)) == 0) {
2891 const uint8_t intr_id = asy_get(asy, ASY_ISR);
2892
2893 ASY_DPRINTF(asy, ASY_DEBUG_INTR,
2894 "not open async=%p flags=0x%x interrupt_id=0x%x",
2895 async, async == NULL ? 0 : async->async_flags, intr_id);
2896
2897 if ((intr_id & ASY_ISR_NOINTR) == 0) {
2898 /*
2899 * reset the device by:
2900 * reading line status
2901 * reading any data from data status register
2902 * reading modem status
2903 */
2904 (void) asy_get(asy, ASY_LSR);
2905 (void) asy_get(asy, ASY_RHR);
2906 asy->asy_msr = asy_get(asy, ASY_MSR);
2907 ret_status = DDI_INTR_CLAIMED;
2908 }
2909 mutex_exit(&asy->asy_excl_hi);
2910 return (ret_status);
2911 }
2912
2913 /* By this point we're sure this is for us. */
2914 ret_status = DDI_INTR_CLAIMED;
2915
2916 /*
2917 * Before this flag was set, interrupts were disabled. We may still get
2918 * here if asyintr() waited on the mutex.
2919 */
2920 if (asy->asy_flags & ASY_DDI_SUSPENDED) {
2921 mutex_exit(&asy->asy_excl_hi);
2922 return (ret_status);
2923 }
2924
2925 /*
2926 * We will loop until the interrupt line is pulled low. asy
2927 * interrupt is edge triggered.
2928 */
2929 for (;;) {
2930 const uint8_t intr_id = asy_get(asy, ASY_ISR);
2931 /*
2932 * Reading LSR will clear any error bits (ASY_LSR_ERRORS) which
2933 * are set which is why the value is passed through to
2934 * async_rxint() and not re-read there. In the unexpected event
2935 * that we've ended up here without a pending interrupt, the
2936 * ASY_ISR_NOINTR case, it should do no harm to have cleared
2937 * the error bits, and it means we can get some additional
2938 * information in the debug message if it's enabled.
2939 */
2940 const uint8_t lsr = asy_get(asy, ASY_LSR);
2941
2942 ASY_DPRINTF(asy, ASY_DEBUG_INTR,
2943 "interrupt_id=0x%x LSR=0x%x",
2944 intr_id, lsr);
2945
2946 if (intr_id & ASY_ISR_NOINTR)
2947 break;
2948
2949 switch (intr_id & ASY_ISR_MASK) {
2950 case ASY_ISR_ID_RLST:
2951 case ASY_ISR_ID_RDA:
2952 case ASY_ISR_ID_TMO:
2953 /* receiver interrupt or receiver errors */
2954 async_rxint(asy, lsr);
2955 break;
2956
2957 case ASY_ISR_ID_THRE:
2958 /*
2959 * The transmit-ready interrupt implies an empty
2960 * transmit-hold register (or FIFO). Check that it is
2961 * present before attempting to transmit more data.
2962 */
2963 if ((lsr & ASY_LSR_THRE) == 0) {
2964 /*
2965 * Taking a THRE interrupt only to find THRE
2966 * absent would be a surprise, except for a
2967 * racing asyputchar(), which ignores the
2968 * excl_hi mutex when writing to the device.
2969 */
2970 continue;
2971 }
2972 async_txint(asy);
2973 /*
2974 * Unlike the other interrupts which fall through to
2975 * attempting to fill the output register/FIFO, THRE
2976 * has no need having just done so.
2977 */
2978 continue;
2979
2980 case ASY_ISR_ID_MST:
2981 /* modem status interrupt */
2982 async_msint(asy);
2983 break;
2984 }
2985
2986 /* Refill the output FIFO if it has gone empty */
2987 if ((lsr & ASY_LSR_THRE) && (async->async_flags & ASYNC_BUSY) &&
2988 async->async_ocnt > 0)
2989 async_txint(asy);
2990 }
2991
2992 mutex_exit(&asy->asy_excl_hi);
2993 return (ret_status);
2994 }
2995
2996 /*
2997 * Transmitter interrupt service routine.
2998 * If there is more data to transmit in the current pseudo-DMA block,
2999 * send the next character if output is not stopped or draining.
3000 * Otherwise, queue up a soft interrupt.
3001 *
3002 * XXX - Needs review for HW FIFOs.
3003 */
3004 static void
async_txint(struct asycom * asy)3005 async_txint(struct asycom *asy)
3006 {
3007 struct asyncline *async = asy->asy_priv;
3008 int fifo_len;
3009
3010 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3011
3012 /*
3013 * If ASYNC_BREAK or ASYNC_OUT_SUSPEND has been set, return to
3014 * asyintr()'s context to claim the interrupt without performing
3015 * any action. No character will be loaded into FIFO/THR until
3016 * timed or untimed break is removed
3017 */
3018 if (async->async_flags & (ASYNC_BREAK|ASYNC_OUT_SUSPEND))
3019 return;
3020
3021 fifo_len = asy->asy_fifo_buf; /* with FIFO buffers */
3022 if (fifo_len > asy_max_tx_fifo)
3023 fifo_len = asy_max_tx_fifo;
3024
3025 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3026 fifo_len--;
3027
3028 if (async->async_ocnt > 0 && fifo_len > 0 &&
3029 !(async->async_flags &
3030 (ASYNC_HW_OUT_FLW|ASYNC_SW_OUT_FLW|ASYNC_STOPPED))) {
3031 while (fifo_len-- > 0 && async->async_ocnt-- > 0) {
3032 asy_put(asy, ASY_THR, *async->async_optr++);
3033 }
3034 async->async_flags |= ASYNC_PROGRESS;
3035 }
3036
3037 if (fifo_len <= 0)
3038 return;
3039
3040 asysetsoft(asy);
3041 }
3042
3043 /*
3044 * Interrupt on port: handle PPS event. This function is only called
3045 * for a port on which PPS event handling has been enabled.
3046 */
3047 static void
asy_ppsevent(struct asycom * asy,int msr)3048 asy_ppsevent(struct asycom *asy, int msr)
3049 {
3050 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3051
3052 if (asy->asy_flags & ASY_PPS_EDGE) {
3053 /* Have seen leading edge, now look for and record drop */
3054 if ((msr & ASY_MSR_DCD) == 0)
3055 asy->asy_flags &= ~ASY_PPS_EDGE;
3056 /*
3057 * Waiting for leading edge, look for rise; stamp event and
3058 * calibrate kernel clock.
3059 */
3060 } else if (msr & ASY_MSR_DCD) {
3061 /*
3062 * This code captures a timestamp at the designated
3063 * transition of the PPS signal (DCD asserted). The
3064 * code provides a pointer to the timestamp, as well
3065 * as the hardware counter value at the capture.
3066 *
3067 * Note: the kernel has nano based time values while
3068 * NTP requires micro based, an in-line fast algorithm
3069 * to convert nsec to usec is used here -- see hrt2ts()
3070 * in common/os/timers.c for a full description.
3071 */
3072 struct timeval *tvp = &asy_ppsev.tv;
3073 timestruc_t ts;
3074 long nsec, usec;
3075
3076 asy->asy_flags |= ASY_PPS_EDGE;
3077 LED_OFF;
3078 gethrestime(&ts);
3079 LED_ON;
3080 nsec = ts.tv_nsec;
3081 usec = nsec + (nsec >> 2);
3082 usec = nsec + (usec >> 1);
3083 usec = nsec + (usec >> 2);
3084 usec = nsec + (usec >> 4);
3085 usec = nsec - (usec >> 3);
3086 usec = nsec + (usec >> 2);
3087 usec = nsec + (usec >> 3);
3088 usec = nsec + (usec >> 4);
3089 usec = nsec + (usec >> 1);
3090 usec = nsec + (usec >> 6);
3091 tvp->tv_usec = usec >> 10;
3092 tvp->tv_sec = ts.tv_sec;
3093
3094 ++asy_ppsev.serial;
3095
3096 /*
3097 * Because the kernel keeps a high-resolution time,
3098 * pass the current highres timestamp in tvp and zero
3099 * in usec.
3100 */
3101 ddi_hardpps(tvp, 0);
3102 }
3103 }
3104
3105 /*
3106 * Receiver interrupt: RDA interrupt, FIFO timeout interrupt or receive
3107 * error interrupt.
3108 * Try to put the character into the circular buffer for this line; if it
3109 * overflows, indicate a circular buffer overrun. If this port is always
3110 * to be serviced immediately, or the character is a STOP character, or
3111 * more than 15 characters have arrived, queue up a soft interrupt to
3112 * drain the circular buffer.
3113 * XXX - needs review for hw FIFOs support.
3114 */
3115
3116 static void
async_rxint(struct asycom * asy,uchar_t lsr)3117 async_rxint(struct asycom *asy, uchar_t lsr)
3118 {
3119 struct asyncline *async = asy->asy_priv;
3120 uchar_t c;
3121 uint_t s, needsoft = 0;
3122 tty_common_t *tp;
3123 int looplim = asy->asy_fifo_buf * 2;
3124
3125 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3126
3127 tp = &async->async_ttycommon;
3128 if (!(tp->t_cflag & CREAD)) {
3129 /* Line is not open for reading. Flush receiver FIFO. */
3130 while ((lsr & (ASY_LSR_DR | ASY_LSR_ERRORS)) != 0) {
3131 (void) asy_get(asy, ASY_RHR);
3132 lsr = asy_get(asy, ASY_LSR);
3133 if (looplim-- < 0) /* limit loop */
3134 break;
3135 }
3136 return;
3137 }
3138
3139 while ((lsr & (ASY_LSR_DR | ASY_LSR_ERRORS)) != 0) {
3140 c = 0;
3141 s = 0; /* reset error status */
3142 if (lsr & ASY_LSR_DR) {
3143 c = asy_get(asy, ASY_RHR);
3144
3145 /*
3146 * We handle XON/XOFF char if IXON is set,
3147 * but if received char is _POSIX_VDISABLE,
3148 * we left it to the up level module.
3149 */
3150 if (tp->t_iflag & IXON) {
3151 if ((c == async->async_stopc) &&
3152 (c != _POSIX_VDISABLE)) {
3153 async_flowcontrol_sw_output(asy,
3154 FLOW_STOP);
3155 goto check_looplim;
3156 } else if ((c == async->async_startc) &&
3157 (c != _POSIX_VDISABLE)) {
3158 async_flowcontrol_sw_output(asy,
3159 FLOW_START);
3160 needsoft = 1;
3161 goto check_looplim;
3162 }
3163 if ((tp->t_iflag & IXANY) &&
3164 (async->async_flags & ASYNC_SW_OUT_FLW)) {
3165 async_flowcontrol_sw_output(asy,
3166 FLOW_START);
3167 needsoft = 1;
3168 }
3169 }
3170 }
3171
3172 /*
3173 * Check for character break sequence
3174 */
3175 if ((abort_enable == KIOCABORTALTERNATE) &&
3176 (asy->asy_flags & ASY_CONSOLE)) {
3177 if (abort_charseq_recognize(c))
3178 abort_sequence_enter((char *)NULL);
3179 }
3180
3181 /* Handle framing errors */
3182 if (lsr & ASY_LSR_ERRORS) {
3183 if (lsr & ASY_LSR_PE) {
3184 if (tp->t_iflag & INPCK) /* parity enabled */
3185 s |= PERROR;
3186 }
3187
3188 if (lsr & (ASY_LSR_FE | ASY_LSR_BI))
3189 s |= FRERROR;
3190 if (lsr & ASY_LSR_OE) {
3191 async->async_hw_overrun = 1;
3192 s |= OVERRUN;
3193 }
3194 }
3195
3196 if (s == 0)
3197 if ((tp->t_iflag & PARMRK) &&
3198 !(tp->t_iflag & (IGNPAR|ISTRIP)) &&
3199 (c == 0377))
3200 if (RING_POK(async, 2)) {
3201 RING_PUT(async, 0377);
3202 RING_PUT(async, c);
3203 } else
3204 async->async_sw_overrun = 1;
3205 else
3206 if (RING_POK(async, 1))
3207 RING_PUT(async, c);
3208 else
3209 async->async_sw_overrun = 1;
3210 else
3211 if (s & FRERROR) /* Handle framing errors */
3212 if (c == 0)
3213 if ((asy->asy_flags & ASY_CONSOLE) &&
3214 (abort_enable !=
3215 KIOCABORTALTERNATE))
3216 abort_sequence_enter((char *)0);
3217 else
3218 async->async_break++;
3219 else
3220 if (RING_POK(async, 1))
3221 RING_MARK(async, c, s);
3222 else
3223 async->async_sw_overrun = 1;
3224 else /* Parity errors are handled by ldterm */
3225 if (RING_POK(async, 1))
3226 RING_MARK(async, c, s);
3227 else
3228 async->async_sw_overrun = 1;
3229 check_looplim:
3230 lsr = asy_get(asy, ASY_LSR);
3231 if (looplim-- < 0) /* limit loop */
3232 break;
3233 }
3234 if ((RING_CNT(async) > (RINGSIZE * 3)/4) &&
3235 !(async->async_inflow_source & IN_FLOW_RINGBUFF)) {
3236 async_flowcontrol_hw_input(asy, FLOW_STOP, IN_FLOW_RINGBUFF);
3237 (void) async_flowcontrol_sw_input(asy, FLOW_STOP,
3238 IN_FLOW_RINGBUFF);
3239 }
3240
3241 if ((async->async_flags & ASYNC_SERVICEIMM) || needsoft ||
3242 (RING_FRAC(async)) || (async->async_polltid == 0)) {
3243 asysetsoft(asy); /* need a soft interrupt */
3244 }
3245 }
3246
3247 /*
3248 * Modem status interrupt.
3249 *
3250 * (Note: It is assumed that the MSR hasn't been read by asyintr().)
3251 */
3252
3253 static void
async_msint(struct asycom * asy)3254 async_msint(struct asycom *asy)
3255 {
3256 struct asyncline *async = asy->asy_priv;
3257 int msr, t_cflag = async->async_ttycommon.t_cflag;
3258
3259 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3260
3261 async_msint_retry:
3262 /* this resets the interrupt */
3263 msr = asy_get(asy, ASY_MSR);
3264 ASY_DPRINTF(asy, ASY_DEBUG_STATE, "call #%d:",
3265 ++(asy->asy_msint_cnt));
3266 ASY_DPRINTF(asy, ASY_DEBUG_STATE, " transition: %3s %3s %3s %3s",
3267 (msr & ASY_MSR_DCTS) ? "DCTS" : " ",
3268 (msr & ASY_MSR_DDSR) ? "DDSR" : " ",
3269 (msr & ASY_MSR_TERI) ? "TERI" : " ",
3270 (msr & ASY_MSR_DDCD) ? "DDCD" : " ");
3271 ASY_DPRINTF(asy, ASY_DEBUG_STATE, "current state: %3s %3s %3s %3s",
3272 (msr & ASY_MSR_CTS) ? "CTS " : " ",
3273 (msr & ASY_MSR_DSR) ? "DSR " : " ",
3274 (msr & ASY_MSR_RI) ? "RI " : " ",
3275 (msr & ASY_MSR_DCD) ? "DCD " : " ");
3276
3277 /* If CTS status is changed, do H/W output flow control */
3278 if ((t_cflag & CRTSCTS) && (((asy->asy_msr ^ msr) & ASY_MSR_CTS) != 0))
3279 async_flowcontrol_hw_output(asy,
3280 msr & ASY_MSR_CTS ? FLOW_START : FLOW_STOP);
3281 /*
3282 * Reading MSR resets the interrupt, we save the
3283 * value of msr so that other functions could examine MSR by
3284 * looking at asy_msr.
3285 */
3286 asy->asy_msr = (uchar_t)msr;
3287
3288 /* Handle PPS event */
3289 if (asy->asy_flags & ASY_PPS)
3290 asy_ppsevent(asy, msr);
3291
3292 async->async_ext++;
3293 asysetsoft(asy);
3294 /*
3295 * We will make sure that the modem status presented to us
3296 * during the previous read has not changed. If the chip samples
3297 * the modem status on the falling edge of the interrupt line,
3298 * and uses this state as the base for detecting change of modem
3299 * status, we would miss a change of modem status event that occured
3300 * after we initiated a read MSR operation.
3301 */
3302 msr = asy_get(asy, ASY_MSR);
3303 if (ASY_MSR_STATES(msr) != ASY_MSR_STATES(asy->asy_msr))
3304 goto async_msint_retry;
3305 }
3306
3307 /*
3308 * Pend a soft interrupt if one isn't already pending.
3309 */
3310 static void
asysetsoft(struct asycom * asy)3311 asysetsoft(struct asycom *asy)
3312 {
3313 ASSERT(MUTEX_HELD(&asy->asy_excl_hi));
3314
3315 if (mutex_tryenter(&asy->asy_soft_lock) == 0)
3316 return;
3317
3318 asy->asy_flags |= ASY_NEEDSOFT;
3319 if (!asy->asysoftpend) {
3320 asy->asysoftpend = 1;
3321 mutex_exit(&asy->asy_soft_lock);
3322 (void) ddi_intr_trigger_softint(asy->asy_soft_inth, NULL);
3323 } else {
3324 mutex_exit(&asy->asy_soft_lock);
3325 }
3326 }
3327
3328 /*
3329 * Check the carrier signal DCD and handle carrier coming up or
3330 * going down, cleaning up as needed and signalling waiters.
3331 */
3332 static void
asy_carrier_check(struct asycom * asy)3333 asy_carrier_check(struct asycom *asy)
3334 {
3335 struct asyncline *async = asy->asy_priv;
3336 tty_common_t *tp = &async->async_ttycommon;
3337 queue_t *q = tp->t_readq;
3338 mblk_t *bp;
3339 int flushflag;
3340
3341 ASY_DPRINTF(asy, ASY_DEBUG_MODM2,
3342 "asy_msr & DCD = %x, tp->t_flags & TS_SOFTCAR = %x",
3343 asy->asy_msr & ASY_MSR_DCD, tp->t_flags & TS_SOFTCAR);
3344
3345 if (asy->asy_msr & ASY_MSR_DCD) {
3346 /*
3347 * The DCD line is on. If we already had a carrier,
3348 * nothing changed and there's nothing to do.
3349 */
3350 if ((async->async_flags & ASYNC_CARR_ON) != 0)
3351 return;
3352
3353 ASY_DPRINTF(asy, ASY_DEBUG_MODM2, "set ASYNC_CARR_ON");
3354 async->async_flags |= ASYNC_CARR_ON;
3355 if (async->async_flags & ASYNC_ISOPEN) {
3356 mutex_exit(&asy->asy_excl_hi);
3357 mutex_exit(&asy->asy_excl);
3358 (void) putctl(q, M_UNHANGUP);
3359 mutex_enter(&asy->asy_excl);
3360 mutex_enter(&asy->asy_excl_hi);
3361 }
3362 cv_broadcast(&async->async_flags_cv);
3363
3364 return;
3365 }
3366
3367 /*
3368 * The DCD line is off. If we had no carrier, nothing changed
3369 * and there's nothing to do.
3370 */
3371 if ((async->async_flags & ASYNC_CARR_ON) == 0)
3372 return;
3373
3374 /*
3375 * The DCD line is off, but we had a carrier. If we're on a local line,
3376 * where carrier is ignored, or we're using a soft carrier, we're done
3377 * here.
3378 */
3379 if ((tp->t_cflag & CLOCAL) != 0 || (tp->t_flags & TS_SOFTCAR) != 0)
3380 goto out;
3381
3382 /*
3383 * Else, drop DTR, abort any output in progress, indicate that output
3384 * is not stopped.
3385 */
3386 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "carrier dropped, so drop DTR");
3387 asy_clr(asy, ASY_MCR, ASY_MCR_DTR);
3388
3389 if (async->async_flags & ASYNC_BUSY) {
3390 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
3391 "Carrier dropped. Clearing async_ocnt");
3392 async->async_ocnt = 0;
3393 }
3394
3395 async->async_flags &= ~ASYNC_STOPPED;
3396
3397 /* If nobody had the device open, we're done here. */
3398 if ((async->async_flags & ASYNC_ISOPEN) == 0)
3399 goto out;
3400
3401 /* Else, send a hangup notification upstream and clean up. */
3402 mutex_exit(&asy->asy_excl_hi);
3403 mutex_exit(&asy->asy_excl);
3404 (void) putctl(q, M_HANGUP);
3405 mutex_enter(&asy->asy_excl);
3406 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "putctl(q, M_HANGUP)");
3407
3408 /*
3409 * Flush the transmit FIFO. Any data left in there is invalid now.
3410 */
3411 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
3412 mutex_enter(&asy->asy_excl_hi);
3413 asy_reset_fifo(asy, ASY_FCR_THR_FL);
3414 mutex_exit(&asy->asy_excl_hi);
3415 }
3416
3417 /*
3418 * Flush our write queue if we have one. If we're in the midst of close,
3419 * then flush everything. Don't leave stale ioctls lying about.
3420 */
3421 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
3422 "Flushing to prevent HUPCL hanging");
3423 flushflag = (async->async_flags & ASYNC_CLOSING) ? FLUSHALL : FLUSHDATA;
3424 flushq(tp->t_writeq, flushflag);
3425
3426 /* Free the last active msg. */
3427 bp = async->async_xmitblk;
3428 if (bp != NULL) {
3429 freeb(bp);
3430 async->async_xmitblk = NULL;
3431 }
3432
3433 mutex_enter(&asy->asy_excl_hi);
3434 async->async_flags &= ~ASYNC_BUSY;
3435
3436
3437 out:
3438 /* Clear our carrier flag and signal anyone waiting. */
3439 async->async_flags &= ~ASYNC_CARR_ON;
3440 cv_broadcast(&async->async_flags_cv);
3441 }
3442
3443 /*
3444 * Handle a second-stage interrupt.
3445 */
3446 uint_t
asysoftintr(caddr_t intarg,caddr_t unusedarg __unused)3447 asysoftintr(caddr_t intarg, caddr_t unusedarg __unused)
3448 {
3449 struct asycom *asy = (struct asycom *)intarg;
3450 struct asyncline *async;
3451 int rv;
3452 uint_t cc;
3453
3454 /*
3455 * Test and clear soft interrupt.
3456 */
3457 mutex_enter(&asy->asy_soft_lock);
3458 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3459 rv = asy->asysoftpend;
3460 if (rv != 0)
3461 asy->asysoftpend = 0;
3462 mutex_exit(&asy->asy_soft_lock);
3463
3464 if (rv) {
3465 if (asy->asy_priv == NULL)
3466 return (rv ? DDI_INTR_CLAIMED : DDI_INTR_UNCLAIMED);
3467 async = (struct asyncline *)asy->asy_priv;
3468 mutex_enter(&asy->asy_excl_hi);
3469 if (asy->asy_flags & ASY_NEEDSOFT) {
3470 asy->asy_flags &= ~ASY_NEEDSOFT;
3471 mutex_exit(&asy->asy_excl_hi);
3472 async_softint(asy);
3473 mutex_enter(&asy->asy_excl_hi);
3474 }
3475
3476 /*
3477 * There are some instances where the softintr is not
3478 * scheduled and hence not called. It so happens that
3479 * causes the last few characters to be stuck in the
3480 * ringbuffer. Hence, call the handler once again so
3481 * the last few characters are cleared.
3482 */
3483 cc = RING_CNT(async);
3484 mutex_exit(&asy->asy_excl_hi);
3485 if (cc > 0)
3486 (void) async_softint(asy);
3487 }
3488 return (rv ? DDI_INTR_CLAIMED : DDI_INTR_UNCLAIMED);
3489 }
3490
3491 /*
3492 * Handle a software interrupt.
3493 */
3494 static void
async_softint(struct asycom * asy)3495 async_softint(struct asycom *asy)
3496 {
3497 struct asyncline *async = asy->asy_priv;
3498 uint_t cc;
3499 mblk_t *bp;
3500 queue_t *q;
3501 uchar_t c;
3502 tty_common_t *tp;
3503 int nb;
3504
3505 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3506 mutex_enter(&asy->asy_excl_hi);
3507 if (asy->asy_flags & ASY_DOINGSOFT) {
3508 asy->asy_flags |= ASY_DOINGSOFT_RETRY;
3509 mutex_exit(&asy->asy_excl_hi);
3510 return;
3511 }
3512 asy->asy_flags |= ASY_DOINGSOFT;
3513 begin:
3514 asy->asy_flags &= ~ASY_DOINGSOFT_RETRY;
3515 mutex_exit(&asy->asy_excl_hi);
3516 mutex_enter(&asy->asy_excl);
3517 tp = &async->async_ttycommon;
3518 q = tp->t_readq;
3519
3520 if (async->async_flags & ASYNC_OUT_FLW_RESUME) {
3521 if (async->async_ocnt > 0) {
3522 mutex_enter(&asy->asy_excl_hi);
3523 async_resume(async);
3524 mutex_exit(&asy->asy_excl_hi);
3525 } else {
3526 if (async->async_xmitblk)
3527 freeb(async->async_xmitblk);
3528 async->async_xmitblk = NULL;
3529 async_start(async);
3530 }
3531 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
3532 }
3533
3534 mutex_enter(&asy->asy_excl_hi);
3535 if (async->async_ext) {
3536 async->async_ext = 0;
3537 asy_carrier_check(asy);
3538 }
3539 mutex_exit(&asy->asy_excl_hi);
3540
3541 /*
3542 * If data has been added to the circular buffer, remove
3543 * it from the buffer, and send it up the stream if there's
3544 * somebody listening. Try to do it 16 bytes at a time. If we
3545 * have more than 16 bytes to move, move 16 byte chunks and
3546 * leave the rest for next time around (maybe it will grow).
3547 */
3548 mutex_enter(&asy->asy_excl_hi);
3549 if (!(async->async_flags & ASYNC_ISOPEN)) {
3550 RING_INIT(async);
3551 goto rv;
3552 }
3553 if ((cc = RING_CNT(async)) == 0)
3554 goto rv;
3555 mutex_exit(&asy->asy_excl_hi);
3556
3557 if (!canput(q)) {
3558 mutex_enter(&asy->asy_excl_hi);
3559 if (!(async->async_inflow_source & IN_FLOW_STREAMS)) {
3560 async_flowcontrol_hw_input(asy, FLOW_STOP,
3561 IN_FLOW_STREAMS);
3562 (void) async_flowcontrol_sw_input(asy, FLOW_STOP,
3563 IN_FLOW_STREAMS);
3564 }
3565 goto rv;
3566 }
3567 if (async->async_inflow_source & IN_FLOW_STREAMS) {
3568 mutex_enter(&asy->asy_excl_hi);
3569 async_flowcontrol_hw_input(asy, FLOW_START,
3570 IN_FLOW_STREAMS);
3571 (void) async_flowcontrol_sw_input(asy, FLOW_START,
3572 IN_FLOW_STREAMS);
3573 mutex_exit(&asy->asy_excl_hi);
3574 }
3575
3576 ASY_DPRINTF(asy, ASY_DEBUG_INPUT, "%d char(s) in queue", cc);
3577
3578 if (!(bp = allocb(cc, BPRI_MED))) {
3579 mutex_exit(&asy->asy_excl);
3580 ttycommon_qfull(&async->async_ttycommon, q);
3581 mutex_enter(&asy->asy_excl);
3582 mutex_enter(&asy->asy_excl_hi);
3583 goto rv;
3584 }
3585 mutex_enter(&asy->asy_excl_hi);
3586 do {
3587 if (RING_ERR(async, S_ERRORS)) {
3588 RING_UNMARK(async);
3589 c = RING_GET(async);
3590 break;
3591 } else {
3592 *bp->b_wptr++ = RING_GET(async);
3593 }
3594 } while (--cc);
3595 mutex_exit(&asy->asy_excl_hi);
3596 mutex_exit(&asy->asy_excl);
3597 if (bp->b_wptr > bp->b_rptr) {
3598 if (!canput(q)) {
3599 asyerror(asy, CE_WARN, "local queue full");
3600 freemsg(bp);
3601 } else {
3602 (void) putq(q, bp);
3603 }
3604 } else {
3605 freemsg(bp);
3606 }
3607 /*
3608 * If we have a parity error, then send
3609 * up an M_BREAK with the "bad"
3610 * character as an argument. Let ldterm
3611 * figure out what to do with the error.
3612 */
3613 if (cc)
3614 (void) putctl1(q, M_BREAK, c);
3615 mutex_enter(&asy->asy_excl);
3616 mutex_enter(&asy->asy_excl_hi);
3617 if (cc) {
3618 asysetsoft(asy); /* finish cc chars */
3619 }
3620 rv:
3621 if ((RING_CNT(async) < (RINGSIZE/4)) &&
3622 (async->async_inflow_source & IN_FLOW_RINGBUFF)) {
3623 async_flowcontrol_hw_input(asy, FLOW_START, IN_FLOW_RINGBUFF);
3624 (void) async_flowcontrol_sw_input(asy, FLOW_START,
3625 IN_FLOW_RINGBUFF);
3626 }
3627
3628 /*
3629 * If a transmission has finished, indicate that it's finished,
3630 * and start that line up again.
3631 */
3632 if (async->async_break > 0) {
3633 nb = async->async_break;
3634 async->async_break = 0;
3635 if (async->async_flags & ASYNC_ISOPEN) {
3636 mutex_exit(&asy->asy_excl_hi);
3637 mutex_exit(&asy->asy_excl);
3638 for (; nb > 0; nb--)
3639 (void) putctl(q, M_BREAK);
3640 mutex_enter(&asy->asy_excl);
3641 mutex_enter(&asy->asy_excl_hi);
3642 }
3643 }
3644 if (async->async_ocnt <= 0 && (async->async_flags & ASYNC_BUSY)) {
3645 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
3646 "Clearing ASYNC_BUSY, async_ocnt=%d", async->async_ocnt);
3647 async->async_flags &= ~ASYNC_BUSY;
3648 mutex_exit(&asy->asy_excl_hi);
3649 if (async->async_xmitblk)
3650 freeb(async->async_xmitblk);
3651 async->async_xmitblk = NULL;
3652 async_start(async);
3653 /*
3654 * If the flag isn't set after doing the async_start above, we
3655 * may have finished all the queued output. Signal any thread
3656 * stuck in close.
3657 */
3658 if (!(async->async_flags & ASYNC_BUSY))
3659 cv_broadcast(&async->async_flags_cv);
3660 mutex_enter(&asy->asy_excl_hi);
3661 }
3662 /*
3663 * A note about these overrun bits: all they do is *tell* someone
3664 * about an error- They do not track multiple errors. In fact,
3665 * you could consider them latched register bits if you like.
3666 * We are only interested in printing the error message once for
3667 * any cluster of overrun errors.
3668 */
3669 if (async->async_hw_overrun) {
3670 if (async->async_flags & ASYNC_ISOPEN) {
3671 mutex_exit(&asy->asy_excl_hi);
3672 mutex_exit(&asy->asy_excl);
3673 asyerror(asy, CE_WARN, "silo overflow");
3674 mutex_enter(&asy->asy_excl);
3675 mutex_enter(&asy->asy_excl_hi);
3676 }
3677 async->async_hw_overrun = 0;
3678 }
3679 if (async->async_sw_overrun) {
3680 if (async->async_flags & ASYNC_ISOPEN) {
3681 mutex_exit(&asy->asy_excl_hi);
3682 mutex_exit(&asy->asy_excl);
3683 asyerror(asy, CE_WARN, "ring buffer overflow");
3684 mutex_enter(&asy->asy_excl);
3685 mutex_enter(&asy->asy_excl_hi);
3686 }
3687 async->async_sw_overrun = 0;
3688 }
3689 if (asy->asy_flags & ASY_DOINGSOFT_RETRY) {
3690 mutex_exit(&asy->asy_excl);
3691 goto begin;
3692 }
3693 asy->asy_flags &= ~ASY_DOINGSOFT;
3694 mutex_exit(&asy->asy_excl_hi);
3695 mutex_exit(&asy->asy_excl);
3696 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
3697 }
3698
3699 /*
3700 * Restart output on a line after a delay or break timer expired.
3701 */
3702 static void
async_restart(void * arg)3703 async_restart(void *arg)
3704 {
3705 struct asyncline *async = (struct asyncline *)arg;
3706 struct asycom *asy = async->async_common;
3707
3708 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3709
3710 /*
3711 * If break timer expired, turn off the break bit.
3712 */
3713
3714 mutex_enter(&asy->asy_excl);
3715 /*
3716 * If ASYNC_OUT_SUSPEND is also set, we don't really
3717 * clean the HW break, TIOCCBRK is responsible for this.
3718 */
3719 if ((async->async_flags & ASYNC_BREAK) &&
3720 !(async->async_flags & ASYNC_OUT_SUSPEND)) {
3721 mutex_enter(&asy->asy_excl_hi);
3722 asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
3723 mutex_exit(&asy->asy_excl_hi);
3724 }
3725 async->async_flags &= ~(ASYNC_DELAY|ASYNC_BREAK);
3726 cv_broadcast(&async->async_flags_cv);
3727 async_start(async);
3728
3729 mutex_exit(&asy->asy_excl);
3730 }
3731
3732 /*
3733 * Start output on a line, unless it's busy, frozen, or otherwise.
3734 */
3735 static void
async_start(struct asyncline * async)3736 async_start(struct asyncline *async)
3737 {
3738 struct asycom *asy = async->async_common;
3739 int cc;
3740 queue_t *q;
3741 mblk_t *bp;
3742 uchar_t *xmit_addr;
3743 int fifo_len = 1;
3744 boolean_t didsome;
3745 mblk_t *nbp;
3746
3747 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3748
3749 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
3750 fifo_len = asy->asy_fifo_buf; /* with FIFO buffers */
3751 if (fifo_len > asy_max_tx_fifo)
3752 fifo_len = asy_max_tx_fifo;
3753 }
3754
3755 ASSERT(mutex_owned(&asy->asy_excl));
3756
3757 /*
3758 * If the chip is busy (i.e., we're waiting for a break timeout
3759 * to expire, or for the current transmission to finish, or for
3760 * output to finish draining from chip), don't grab anything new.
3761 */
3762 if (async->async_flags & (ASYNC_BREAK|ASYNC_BUSY)) {
3763 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "%s",
3764 async->async_flags & ASYNC_BREAK ? "break" : "busy");
3765 return;
3766 }
3767
3768 /*
3769 * Check only pended sw input flow control.
3770 */
3771 mutex_enter(&asy->asy_excl_hi);
3772 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3773 fifo_len--;
3774 mutex_exit(&asy->asy_excl_hi);
3775
3776 /*
3777 * If we're waiting for a delay timeout to expire, don't grab
3778 * anything new.
3779 */
3780 if (async->async_flags & ASYNC_DELAY) {
3781 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "start ASYNC_DELAY");
3782 return;
3783 }
3784
3785 if ((q = async->async_ttycommon.t_writeq) == NULL) {
3786 ASY_DPRINTF(asy, ASY_DEBUG_OUT, "start writeq is null");
3787 return; /* not attached to a stream */
3788 }
3789
3790 for (;;) {
3791 if ((bp = getq(q)) == NULL)
3792 return; /* no data to transmit */
3793
3794 /*
3795 * We have a message block to work on.
3796 * Check whether it's a break, a delay, or an ioctl (the latter
3797 * occurs if the ioctl in question was waiting for the output
3798 * to drain). If it's one of those, process it immediately.
3799 */
3800 switch (bp->b_datap->db_type) {
3801
3802 case M_BREAK:
3803 /*
3804 * Set the break bit, and arrange for "async_restart"
3805 * to be called in 1/4 second; it will turn the
3806 * break bit off, and call "async_start" to grab
3807 * the next message.
3808 */
3809 mutex_enter(&asy->asy_excl_hi);
3810 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
3811 mutex_exit(&asy->asy_excl_hi);
3812 async->async_flags |= ASYNC_BREAK;
3813 (void) timeout(async_restart, (caddr_t)async,
3814 drv_usectohz(1000000)/4);
3815 freemsg(bp);
3816 return; /* wait for this to finish */
3817
3818 case M_DELAY:
3819 /*
3820 * Arrange for "async_restart" to be called when the
3821 * delay expires; it will turn ASYNC_DELAY off,
3822 * and call "async_start" to grab the next message.
3823 */
3824 (void) timeout(async_restart, (caddr_t)async,
3825 (int)(*(unsigned char *)bp->b_rptr + 6));
3826 async->async_flags |= ASYNC_DELAY;
3827 freemsg(bp);
3828 return; /* wait for this to finish */
3829
3830 case M_IOCTL:
3831 /*
3832 * This ioctl was waiting for the output ahead of
3833 * it to drain; obviously, it has. Do it, and
3834 * then grab the next message after it.
3835 */
3836 mutex_exit(&asy->asy_excl);
3837 async_ioctl(async, q, bp);
3838 mutex_enter(&asy->asy_excl);
3839 continue;
3840 }
3841
3842 while (bp != NULL && ((cc = MBLKL(bp)) == 0)) {
3843 nbp = bp->b_cont;
3844 freeb(bp);
3845 bp = nbp;
3846 }
3847 if (bp != NULL)
3848 break;
3849 }
3850
3851 /*
3852 * We have data to transmit. If output is stopped, put
3853 * it back and try again later.
3854 */
3855 if (async->async_flags & (ASYNC_HW_OUT_FLW | ASYNC_SW_OUT_FLW |
3856 ASYNC_STOPPED | ASYNC_OUT_SUSPEND)) {
3857 (void) putbq(q, bp);
3858 return;
3859 }
3860
3861 async->async_xmitblk = bp;
3862 xmit_addr = bp->b_rptr;
3863 bp = bp->b_cont;
3864 if (bp != NULL)
3865 (void) putbq(q, bp); /* not done with this message yet */
3866
3867 /*
3868 * In 5-bit mode, the high order bits are used
3869 * to indicate character sizes less than five,
3870 * so we need to explicitly mask before transmitting
3871 */
3872 if ((async->async_ttycommon.t_cflag & CSIZE) == CS5) {
3873 unsigned char *p = xmit_addr;
3874 int cnt = cc;
3875
3876 while (cnt--)
3877 *p++ &= (unsigned char) 0x1f;
3878 }
3879
3880 /*
3881 * Set up this block for pseudo-DMA.
3882 */
3883 mutex_enter(&asy->asy_excl_hi);
3884 /*
3885 * If the transmitter is ready, shove the first
3886 * character out.
3887 */
3888 didsome = B_FALSE;
3889 while (--fifo_len >= 0 && cc > 0) {
3890 if (!(asy_get(asy, ASY_LSR) & ASY_LSR_THRE))
3891 break;
3892 asy_put(asy, ASY_THR, *xmit_addr++);
3893 cc--;
3894 didsome = B_TRUE;
3895 }
3896 async->async_optr = xmit_addr;
3897 async->async_ocnt = cc;
3898 if (didsome)
3899 async->async_flags |= ASYNC_PROGRESS;
3900 ASY_DPRINTF(asy, ASY_DEBUG_BUSY, "Set ASYNC_BUSY, async_ocnt=%d",
3901 async->async_ocnt);
3902 async->async_flags |= ASYNC_BUSY;
3903 mutex_exit(&asy->asy_excl_hi);
3904 }
3905
3906 /*
3907 * Resume output by poking the transmitter.
3908 */
3909 static void
async_resume(struct asyncline * async)3910 async_resume(struct asyncline *async)
3911 {
3912 struct asycom *asy = async->async_common;
3913
3914 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
3915 ASSERT(mutex_owned(&asy->asy_excl_hi));
3916
3917 if (asy_get(asy, ASY_LSR) & ASY_LSR_THRE) {
3918 if (async_flowcontrol_sw_input(asy, FLOW_CHECK, IN_FLOW_NULL))
3919 return;
3920 if (async->async_ocnt > 0 &&
3921 !(async->async_flags &
3922 (ASYNC_HW_OUT_FLW|ASYNC_SW_OUT_FLW|ASYNC_OUT_SUSPEND))) {
3923 asy_put(asy, ASY_THR, *async->async_optr++);
3924 async->async_ocnt--;
3925 async->async_flags |= ASYNC_PROGRESS;
3926 }
3927 }
3928 }
3929
3930 /*
3931 * Hold the untimed break to last the minimum time.
3932 */
3933 static void
async_hold_utbrk(void * arg)3934 async_hold_utbrk(void *arg)
3935 {
3936 struct asyncline *async = arg;
3937 struct asycom *asy = async->async_common;
3938
3939 mutex_enter(&asy->asy_excl);
3940 async->async_flags &= ~ASYNC_HOLD_UTBRK;
3941 cv_broadcast(&async->async_flags_cv);
3942 async->async_utbrktid = 0;
3943 mutex_exit(&asy->asy_excl);
3944 }
3945
3946 /*
3947 * Resume the untimed break.
3948 */
3949 static void
async_resume_utbrk(struct asyncline * async)3950 async_resume_utbrk(struct asyncline *async)
3951 {
3952 struct asycom *asy = async->async_common;
3953 ASSERT(mutex_owned(&asy->asy_excl));
3954
3955 /*
3956 * Because the wait time is very short,
3957 * so we use uninterruptably wait.
3958 */
3959 while (async->async_flags & ASYNC_HOLD_UTBRK) {
3960 cv_wait(&async->async_flags_cv, &asy->asy_excl);
3961 }
3962 mutex_enter(&asy->asy_excl_hi);
3963 /*
3964 * Timed break and untimed break can exist simultaneously,
3965 * if ASYNC_BREAK is also set at here, we don't
3966 * really clean the HW break.
3967 */
3968 if (!(async->async_flags & ASYNC_BREAK))
3969 asy_clr(asy, ASY_LCR, ASY_LCR_SETBRK);
3970
3971 async->async_flags &= ~ASYNC_OUT_SUSPEND;
3972 cv_broadcast(&async->async_flags_cv);
3973 if (async->async_ocnt > 0) {
3974 async_resume(async);
3975 mutex_exit(&asy->asy_excl_hi);
3976 } else {
3977 async->async_flags &= ~ASYNC_BUSY;
3978 mutex_exit(&asy->asy_excl_hi);
3979 if (async->async_xmitblk != NULL) {
3980 freeb(async->async_xmitblk);
3981 async->async_xmitblk = NULL;
3982 }
3983 async_start(async);
3984 }
3985 }
3986
3987 /*
3988 * Process an "ioctl" message sent down to us.
3989 * Note that we don't need to get any locks until we are ready to access
3990 * the hardware. Nothing we access until then is going to be altered
3991 * outside of the STREAMS framework, so we should be safe.
3992 */
3993 int asydelay = 10000;
3994 static void
async_ioctl(struct asyncline * async,queue_t * wq,mblk_t * mp)3995 async_ioctl(struct asyncline *async, queue_t *wq, mblk_t *mp)
3996 {
3997 struct asycom *asy = async->async_common;
3998 tty_common_t *tp = &async->async_ttycommon;
3999 struct iocblk *iocp;
4000 unsigned datasize;
4001 int error = 0;
4002 mblk_t *datamp;
4003
4004 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "enter");
4005
4006 if (tp->t_iocpending != NULL) {
4007 /*
4008 * We were holding an "ioctl" response pending the
4009 * availability of an "mblk" to hold data to be passed up;
4010 * another "ioctl" came through, which means that "ioctl"
4011 * must have timed out or been aborted.
4012 */
4013 freemsg(async->async_ttycommon.t_iocpending);
4014 async->async_ttycommon.t_iocpending = NULL;
4015 }
4016
4017 iocp = (struct iocblk *)mp->b_rptr;
4018
4019 /*
4020 * For TIOCMGET and the PPS ioctls, do NOT call ttycommon_ioctl()
4021 * because this function frees up the message block (mp->b_cont) that
4022 * contains the user location where we pass back the results.
4023 *
4024 * Similarly, CONSOPENPOLLEDIO needs ioc_count, which ttycommon_ioctl
4025 * zaps. We know that ttycommon_ioctl doesn't know any CONS*
4026 * ioctls, so keep the others safe too.
4027 */
4028 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL, "%s",
4029 iocp->ioc_cmd == TIOCMGET ? "TIOCMGET" :
4030 iocp->ioc_cmd == TIOCMSET ? "TIOCMSET" :
4031 iocp->ioc_cmd == TIOCMBIS ? "TIOCMBIS" :
4032 iocp->ioc_cmd == TIOCMBIC ? "TIOCMBIC" :
4033 "other");
4034
4035 switch (iocp->ioc_cmd) {
4036 case TIOCMGET:
4037 case TIOCGPPS:
4038 case TIOCSPPS:
4039 case TIOCGPPSEV:
4040 case CONSOPENPOLLEDIO:
4041 case CONSCLOSEPOLLEDIO:
4042 case CONSSETABORTENABLE:
4043 case CONSGETABORTENABLE:
4044 error = -1; /* Do Nothing */
4045 break;
4046 default:
4047
4048 /*
4049 * The only way in which "ttycommon_ioctl" can fail is if the
4050 * "ioctl" requires a response containing data to be returned
4051 * to the user, and no mblk could be allocated for the data.
4052 * No such "ioctl" alters our state. Thus, we always go ahead
4053 * and do any state-changes the "ioctl" calls for. If we
4054 * couldn't allocate the data, "ttycommon_ioctl" has stashed
4055 * the "ioctl" away safely, so we just call "bufcall" to
4056 * request that we be called back when we stand a better
4057 * chance of allocating the data.
4058 */
4059 if ((datasize = ttycommon_ioctl(tp, wq, mp, &error)) != 0) {
4060 if (async->async_wbufcid)
4061 unbufcall(async->async_wbufcid);
4062 async->async_wbufcid = bufcall(datasize, BPRI_HI,
4063 (void (*)(void *)) async_reioctl,
4064 (void *)(intptr_t)async->async_common->asy_unit);
4065 return;
4066 }
4067 }
4068
4069 mutex_enter(&asy->asy_excl);
4070
4071 if (error == 0) {
4072 /*
4073 * "ttycommon_ioctl" did most of the work; we just use the
4074 * data it set up.
4075 */
4076 switch (iocp->ioc_cmd) {
4077
4078 case TCSETS:
4079 mutex_enter(&asy->asy_excl_hi);
4080 if (asy_baudok(asy))
4081 asy_program(asy, ASY_NOINIT);
4082 else
4083 error = EINVAL;
4084 mutex_exit(&asy->asy_excl_hi);
4085 break;
4086 case TCSETSF:
4087 case TCSETSW:
4088 case TCSETA:
4089 case TCSETAW:
4090 case TCSETAF:
4091 mutex_enter(&asy->asy_excl_hi);
4092 if (!asy_baudok(asy))
4093 error = EINVAL;
4094 else {
4095 if (asy_isbusy(asy))
4096 asy_waiteot(asy);
4097 asy_program(asy, ASY_NOINIT);
4098 }
4099 mutex_exit(&asy->asy_excl_hi);
4100 break;
4101 }
4102 } else if (error < 0) {
4103 /*
4104 * "ttycommon_ioctl" didn't do anything; we process it here.
4105 */
4106 error = 0;
4107 switch (iocp->ioc_cmd) {
4108
4109 case TIOCGPPS:
4110 /*
4111 * Get PPS on/off.
4112 */
4113 if (mp->b_cont != NULL)
4114 freemsg(mp->b_cont);
4115
4116 mp->b_cont = allocb(sizeof (int), BPRI_HI);
4117 if (mp->b_cont == NULL) {
4118 error = ENOMEM;
4119 break;
4120 }
4121 if (asy->asy_flags & ASY_PPS)
4122 *(int *)mp->b_cont->b_wptr = 1;
4123 else
4124 *(int *)mp->b_cont->b_wptr = 0;
4125 mp->b_cont->b_wptr += sizeof (int);
4126 mp->b_datap->db_type = M_IOCACK;
4127 iocp->ioc_count = sizeof (int);
4128 break;
4129
4130 case TIOCSPPS:
4131 /*
4132 * Set PPS on/off.
4133 */
4134 error = miocpullup(mp, sizeof (int));
4135 if (error != 0)
4136 break;
4137
4138 mutex_enter(&asy->asy_excl_hi);
4139 if (*(int *)mp->b_cont->b_rptr)
4140 asy->asy_flags |= ASY_PPS;
4141 else
4142 asy->asy_flags &= ~ASY_PPS;
4143 /* Reset edge sense */
4144 asy->asy_flags &= ~ASY_PPS_EDGE;
4145 mutex_exit(&asy->asy_excl_hi);
4146 mp->b_datap->db_type = M_IOCACK;
4147 break;
4148
4149 case TIOCGPPSEV:
4150 {
4151 /*
4152 * Get PPS event data.
4153 */
4154 mblk_t *bp;
4155 void *buf;
4156 #ifdef _SYSCALL32_IMPL
4157 struct ppsclockev32 p32;
4158 #endif
4159 struct ppsclockev ppsclockev;
4160
4161 if (mp->b_cont != NULL) {
4162 freemsg(mp->b_cont);
4163 mp->b_cont = NULL;
4164 }
4165
4166 if ((asy->asy_flags & ASY_PPS) == 0) {
4167 error = ENXIO;
4168 break;
4169 }
4170
4171 /* Protect from incomplete asy_ppsev */
4172 mutex_enter(&asy->asy_excl_hi);
4173 ppsclockev = asy_ppsev;
4174 mutex_exit(&asy->asy_excl_hi);
4175
4176 #ifdef _SYSCALL32_IMPL
4177 if ((iocp->ioc_flag & IOC_MODELS) != IOC_NATIVE) {
4178 TIMEVAL_TO_TIMEVAL32(&p32.tv, &ppsclockev.tv);
4179 p32.serial = ppsclockev.serial;
4180 buf = &p32;
4181 iocp->ioc_count = sizeof (struct ppsclockev32);
4182 } else
4183 #endif
4184 {
4185 buf = &ppsclockev;
4186 iocp->ioc_count = sizeof (struct ppsclockev);
4187 }
4188
4189 if ((bp = allocb(iocp->ioc_count, BPRI_HI)) == NULL) {
4190 error = ENOMEM;
4191 break;
4192 }
4193 mp->b_cont = bp;
4194
4195 bcopy(buf, bp->b_wptr, iocp->ioc_count);
4196 bp->b_wptr += iocp->ioc_count;
4197 mp->b_datap->db_type = M_IOCACK;
4198 break;
4199 }
4200
4201 case TCSBRK:
4202 error = miocpullup(mp, sizeof (int));
4203 if (error != 0)
4204 break;
4205
4206 if (*(int *)mp->b_cont->b_rptr == 0) {
4207
4208 /*
4209 * XXX Arrangements to ensure that a break
4210 * isn't in progress should be sufficient.
4211 * This ugly delay() is the only thing
4212 * that seems to work on the NCR Worldmark.
4213 * It should be replaced. Note that an
4214 * asy_waiteot() also does not work.
4215 */
4216 if (asydelay)
4217 delay(drv_usectohz(asydelay));
4218
4219 while (async->async_flags & ASYNC_BREAK) {
4220 cv_wait(&async->async_flags_cv,
4221 &asy->asy_excl);
4222 }
4223 mutex_enter(&asy->asy_excl_hi);
4224 /*
4225 * Wait until TSR is empty and then set the
4226 * break. ASYNC_BREAK has been set to ensure
4227 * that no characters are transmitted while the
4228 * TSR is being flushed and SOUT is being used
4229 * for the break signal.
4230 */
4231 async->async_flags |= ASYNC_BREAK;
4232 asy_wait_baudrate(asy);
4233 /*
4234 * Arrange for "async_restart"
4235 * to be called in 1/4 second;
4236 * it will turn the break bit off, and call
4237 * "async_start" to grab the next message.
4238 */
4239 asy_set(asy, ASY_LCR, ASY_LCR_SETBRK);
4240 mutex_exit(&asy->asy_excl_hi);
4241 (void) timeout(async_restart, (caddr_t)async,
4242 drv_usectohz(1000000)/4);
4243 } else {
4244 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4245 "wait for flush");
4246 mutex_enter(&asy->asy_excl_hi);
4247 asy_waiteot(asy);
4248 mutex_exit(&asy->asy_excl_hi);
4249 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4250 "ldterm satisfied");
4251 }
4252 break;
4253
4254 case TIOCSBRK:
4255 if (!(async->async_flags & ASYNC_OUT_SUSPEND)) {
4256 mutex_enter(&asy->asy_excl_hi);
4257 async->async_flags |= ASYNC_OUT_SUSPEND;
4258 async->async_flags |= ASYNC_HOLD_UTBRK;
4259 asy_wait_baudrate(asy);
4260 mutex_exit(&asy->asy_excl_hi);
4261 /* wait for 100ms to hold BREAK */
4262 async->async_utbrktid =
4263 timeout((void (*)())async_hold_utbrk,
4264 (caddr_t)async,
4265 drv_usectohz(asy_min_utbrk));
4266 }
4267 mioc2ack(mp, NULL, 0, 0);
4268 break;
4269
4270 case TIOCCBRK:
4271 if (async->async_flags & ASYNC_OUT_SUSPEND)
4272 async_resume_utbrk(async);
4273 mioc2ack(mp, NULL, 0, 0);
4274 break;
4275
4276 case TIOCMSET:
4277 case TIOCMBIS:
4278 case TIOCMBIC:
4279 if (iocp->ioc_count != TRANSPARENT) {
4280 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4281 "non-transparent");
4282
4283 error = miocpullup(mp, sizeof (int));
4284 if (error != 0)
4285 break;
4286
4287 mutex_enter(&asy->asy_excl_hi);
4288 (void) asymctl(asy,
4289 dmtoasy(asy, *(int *)mp->b_cont->b_rptr),
4290 iocp->ioc_cmd);
4291 mutex_exit(&asy->asy_excl_hi);
4292 iocp->ioc_error = 0;
4293 mp->b_datap->db_type = M_IOCACK;
4294 } else {
4295 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4296 "transparent");
4297 mcopyin(mp, NULL, sizeof (int), NULL);
4298 }
4299 break;
4300
4301 case TIOCMGET:
4302 datamp = allocb(sizeof (int), BPRI_MED);
4303 if (datamp == NULL) {
4304 error = EAGAIN;
4305 break;
4306 }
4307
4308 mutex_enter(&asy->asy_excl_hi);
4309 *(int *)datamp->b_rptr = asymctl(asy, 0, TIOCMGET);
4310 mutex_exit(&asy->asy_excl_hi);
4311
4312 if (iocp->ioc_count == TRANSPARENT) {
4313 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4314 "transparent");
4315 mcopyout(mp, NULL, sizeof (int), NULL, datamp);
4316 } else {
4317 ASY_DPRINTF(asy, ASY_DEBUG_IOCTL,
4318 "non-transparent");
4319 mioc2ack(mp, datamp, sizeof (int), 0);
4320 }
4321 break;
4322
4323 case CONSOPENPOLLEDIO:
4324 error = miocpullup(mp, sizeof (struct cons_polledio *));
4325 if (error != 0)
4326 break;
4327
4328 *(struct cons_polledio **)mp->b_cont->b_rptr =
4329 &asy->polledio;
4330
4331 mp->b_datap->db_type = M_IOCACK;
4332 break;
4333
4334 case CONSCLOSEPOLLEDIO:
4335 mp->b_datap->db_type = M_IOCACK;
4336 iocp->ioc_error = 0;
4337 iocp->ioc_rval = 0;
4338 break;
4339
4340 case CONSSETABORTENABLE:
4341 error = secpolicy_console(iocp->ioc_cr);
4342 if (error != 0)
4343 break;
4344
4345 if (iocp->ioc_count != TRANSPARENT) {
4346 error = EINVAL;
4347 break;
4348 }
4349
4350 mutex_enter(&asy->asy_excl_hi);
4351 if (*(intptr_t *)mp->b_cont->b_rptr)
4352 asy->asy_flags |= ASY_CONSOLE;
4353 else
4354 asy->asy_flags &= ~ASY_CONSOLE;
4355 mutex_exit(&asy->asy_excl_hi);
4356
4357 mp->b_datap->db_type = M_IOCACK;
4358 iocp->ioc_error = 0;
4359 iocp->ioc_rval = 0;
4360 break;
4361
4362 case CONSGETABORTENABLE:
4363 /*CONSTANTCONDITION*/
4364 ASSERT(sizeof (boolean_t) <= sizeof (boolean_t *));
4365 /*
4366 * Store the return value right in the payload
4367 * we were passed. Crude.
4368 */
4369 mcopyout(mp, NULL, sizeof (boolean_t), NULL, NULL);
4370 *(boolean_t *)mp->b_cont->b_rptr =
4371 (asy->asy_flags & ASY_CONSOLE) != 0;
4372 break;
4373
4374 default:
4375 /*
4376 * If we don't understand it, it's an error. NAK it.
4377 */
4378 error = EINVAL;
4379 break;
4380 }
4381 }
4382 if (error != 0) {
4383 iocp->ioc_error = error;
4384 mp->b_datap->db_type = M_IOCNAK;
4385 }
4386 mutex_exit(&asy->asy_excl);
4387 qreply(wq, mp);
4388 ASY_DPRINTF(asy, ASY_DEBUG_PROCS, "done");
4389 }
4390
4391 static int
asyrsrv(queue_t * q)4392 asyrsrv(queue_t *q)
4393 {
4394 mblk_t *bp;
4395 struct asyncline *async;
4396 struct asycom *asy;
4397
4398 async = (struct asyncline *)q->q_ptr;
4399 asy = (struct asycom *)async->async_common;
4400
4401 while (canputnext(q) && (bp = getq(q)))
4402 putnext(q, bp);
4403 mutex_enter(&asy->asy_excl_hi);
4404 asysetsoft(asy);
4405 mutex_exit(&asy->asy_excl_hi);
4406 async->async_polltid = 0;
4407 return (0);
4408 }
4409
4410 /*
4411 * The ASYWPUTDO_NOT_SUSP macro indicates to asywputdo() whether it should
4412 * handle messages as though the driver is operating normally or is
4413 * suspended. In the suspended case, some or all of the processing may have
4414 * to be delayed until the driver is resumed.
4415 */
4416 #define ASYWPUTDO_NOT_SUSP(async, wput) \
4417 !((wput) && ((async)->async_flags & ASYNC_DDI_SUSPENDED))
4418
4419 /*
4420 * Processing for write queue put procedure.
4421 * Respond to M_STOP, M_START, M_IOCTL, and M_FLUSH messages here;
4422 * set the flow control character for M_STOPI and M_STARTI messages;
4423 * queue up M_BREAK, M_DELAY, and M_DATA messages for processing
4424 * by the start routine, and then call the start routine; discard
4425 * everything else. Note that this driver does not incorporate any
4426 * mechanism to negotiate to handle the canonicalization process.
4427 * It expects that these functions are handled in upper module(s),
4428 * as we do in ldterm.
4429 */
4430 static int
asywputdo(queue_t * q,mblk_t * mp,boolean_t wput)4431 asywputdo(queue_t *q, mblk_t *mp, boolean_t wput)
4432 {
4433 struct asyncline *async;
4434 struct asycom *asy;
4435 int error;
4436
4437 async = (struct asyncline *)q->q_ptr;
4438 asy = async->async_common;
4439
4440 switch (mp->b_datap->db_type) {
4441
4442 case M_STOP:
4443 /*
4444 * Since we don't do real DMA, we can just let the
4445 * chip coast to a stop after applying the brakes.
4446 */
4447 mutex_enter(&asy->asy_excl);
4448 async->async_flags |= ASYNC_STOPPED;
4449 mutex_exit(&asy->asy_excl);
4450 freemsg(mp);
4451 break;
4452
4453 case M_START:
4454 mutex_enter(&asy->asy_excl);
4455 if (async->async_flags & ASYNC_STOPPED) {
4456 async->async_flags &= ~ASYNC_STOPPED;
4457 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4458 /*
4459 * If an output operation is in progress,
4460 * resume it. Otherwise, prod the start
4461 * routine.
4462 */
4463 if (async->async_ocnt > 0) {
4464 mutex_enter(&asy->asy_excl_hi);
4465 async_resume(async);
4466 mutex_exit(&asy->asy_excl_hi);
4467 } else {
4468 async_start(async);
4469 }
4470 }
4471 }
4472 mutex_exit(&asy->asy_excl);
4473 freemsg(mp);
4474 break;
4475
4476 case M_IOCTL:
4477 switch (((struct iocblk *)mp->b_rptr)->ioc_cmd) {
4478
4479 case TCSBRK:
4480 error = miocpullup(mp, sizeof (int));
4481 if (error != 0) {
4482 miocnak(q, mp, 0, error);
4483 return (0);
4484 }
4485
4486 if (*(int *)mp->b_cont->b_rptr != 0) {
4487 ASY_DPRINTF(asy, ASY_DEBUG_OUT,
4488 "flush request");
4489 (void) putq(q, mp);
4490
4491 mutex_enter(&asy->asy_excl);
4492 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4493 /*
4494 * If an TIOCSBRK is in progress,
4495 * clean it as TIOCCBRK does,
4496 * then kick off output.
4497 * If TIOCSBRK is not in progress,
4498 * just kick off output.
4499 */
4500 async_resume_utbrk(async);
4501 }
4502 mutex_exit(&asy->asy_excl);
4503 break;
4504 }
4505 /*FALLTHROUGH*/
4506 case TCSETSW:
4507 case TCSETSF:
4508 case TCSETAW:
4509 case TCSETAF:
4510 /*
4511 * The changes do not take effect until all
4512 * output queued before them is drained.
4513 * Put this message on the queue, so that
4514 * "async_start" will see it when it's done
4515 * with the output before it. Poke the
4516 * start routine, just in case.
4517 */
4518 (void) putq(q, mp);
4519
4520 mutex_enter(&asy->asy_excl);
4521 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4522 /*
4523 * If an TIOCSBRK is in progress,
4524 * clean it as TIOCCBRK does.
4525 * then kick off output.
4526 * If TIOCSBRK is not in progress,
4527 * just kick off output.
4528 */
4529 async_resume_utbrk(async);
4530 }
4531 mutex_exit(&asy->asy_excl);
4532 break;
4533
4534 default:
4535 /*
4536 * Do it now.
4537 */
4538 mutex_enter(&asy->asy_excl);
4539 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4540 mutex_exit(&asy->asy_excl);
4541 async_ioctl(async, q, mp);
4542 break;
4543 }
4544 async_put_suspq(asy, mp);
4545 mutex_exit(&asy->asy_excl);
4546 break;
4547 }
4548 break;
4549
4550 case M_FLUSH:
4551 if (*mp->b_rptr & FLUSHW) {
4552 mutex_enter(&asy->asy_excl);
4553
4554 /*
4555 * Abort any output in progress.
4556 */
4557 mutex_enter(&asy->asy_excl_hi);
4558 if (async->async_flags & ASYNC_BUSY) {
4559 ASY_DPRINTF(asy, ASY_DEBUG_BUSY,
4560 "Clearing async_ocnt, "
4561 "leaving ASYNC_BUSY set");
4562 async->async_ocnt = 0;
4563 async->async_flags &= ~ASYNC_BUSY;
4564 } /* if */
4565
4566 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4567 /* Flush FIFO buffers */
4568 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
4569 asy_reset_fifo(asy, ASY_FCR_THR_FL);
4570 }
4571 }
4572 mutex_exit(&asy->asy_excl_hi);
4573
4574 /*
4575 * Flush our write queue.
4576 */
4577 flushq(q, FLUSHDATA); /* XXX doesn't flush M_DELAY */
4578 if (async->async_xmitblk != NULL) {
4579 freeb(async->async_xmitblk);
4580 async->async_xmitblk = NULL;
4581 }
4582 mutex_exit(&asy->asy_excl);
4583 *mp->b_rptr &= ~FLUSHW; /* it has been flushed */
4584 }
4585 if (*mp->b_rptr & FLUSHR) {
4586 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4587 mutex_enter(&asy->asy_excl);
4588 mutex_enter(&asy->asy_excl_hi);
4589 /* Flush FIFO buffers */
4590 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
4591 asy_reset_fifo(asy, ASY_FCR_RHR_FL);
4592 }
4593 mutex_exit(&asy->asy_excl_hi);
4594 mutex_exit(&asy->asy_excl);
4595 }
4596 flushq(RD(q), FLUSHDATA);
4597 qreply(q, mp); /* give the read queues a crack at it */
4598 } else {
4599 freemsg(mp);
4600 }
4601
4602 /*
4603 * We must make sure we process messages that survive the
4604 * write-side flush.
4605 */
4606 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4607 mutex_enter(&asy->asy_excl);
4608 async_start(async);
4609 mutex_exit(&asy->asy_excl);
4610 }
4611 break;
4612
4613 case M_BREAK:
4614 case M_DELAY:
4615 case M_DATA:
4616 /*
4617 * Queue the message up to be transmitted,
4618 * and poke the start routine.
4619 */
4620 (void) putq(q, mp);
4621 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4622 mutex_enter(&asy->asy_excl);
4623 async_start(async);
4624 mutex_exit(&asy->asy_excl);
4625 }
4626 break;
4627
4628 case M_STOPI:
4629 mutex_enter(&asy->asy_excl);
4630 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4631 mutex_enter(&asy->asy_excl_hi);
4632 if (!(async->async_inflow_source & IN_FLOW_USER)) {
4633 async_flowcontrol_hw_input(asy, FLOW_STOP,
4634 IN_FLOW_USER);
4635 (void) async_flowcontrol_sw_input(asy,
4636 FLOW_STOP, IN_FLOW_USER);
4637 }
4638 mutex_exit(&asy->asy_excl_hi);
4639 mutex_exit(&asy->asy_excl);
4640 freemsg(mp);
4641 break;
4642 }
4643 async_put_suspq(asy, mp);
4644 mutex_exit(&asy->asy_excl);
4645 break;
4646
4647 case M_STARTI:
4648 mutex_enter(&asy->asy_excl);
4649 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4650 mutex_enter(&asy->asy_excl_hi);
4651 if (async->async_inflow_source & IN_FLOW_USER) {
4652 async_flowcontrol_hw_input(asy, FLOW_START,
4653 IN_FLOW_USER);
4654 (void) async_flowcontrol_sw_input(asy,
4655 FLOW_START, IN_FLOW_USER);
4656 }
4657 mutex_exit(&asy->asy_excl_hi);
4658 mutex_exit(&asy->asy_excl);
4659 freemsg(mp);
4660 break;
4661 }
4662 async_put_suspq(asy, mp);
4663 mutex_exit(&asy->asy_excl);
4664 break;
4665
4666 case M_CTL:
4667 if (MBLKL(mp) >= sizeof (struct iocblk) &&
4668 ((struct iocblk *)mp->b_rptr)->ioc_cmd == MC_POSIXQUERY) {
4669 mutex_enter(&asy->asy_excl);
4670 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4671 ((struct iocblk *)mp->b_rptr)->ioc_cmd =
4672 MC_HAS_POSIX;
4673 mutex_exit(&asy->asy_excl);
4674 qreply(q, mp);
4675 break;
4676 } else {
4677 async_put_suspq(asy, mp);
4678 }
4679 } else {
4680 /*
4681 * These MC_SERVICE type messages are used by upper
4682 * modules to tell this driver to send input up
4683 * immediately, or that it can wait for normal
4684 * processing that may or may not be done. Sun
4685 * requires these for the mouse module.
4686 * (XXX - for x86?)
4687 */
4688 mutex_enter(&asy->asy_excl);
4689 switch (*mp->b_rptr) {
4690
4691 case MC_SERVICEIMM:
4692 async->async_flags |= ASYNC_SERVICEIMM;
4693 break;
4694
4695 case MC_SERVICEDEF:
4696 async->async_flags &= ~ASYNC_SERVICEIMM;
4697 break;
4698 }
4699 mutex_exit(&asy->asy_excl);
4700 freemsg(mp);
4701 }
4702 break;
4703
4704 case M_IOCDATA:
4705 mutex_enter(&asy->asy_excl);
4706 if (ASYWPUTDO_NOT_SUSP(async, wput)) {
4707 mutex_exit(&asy->asy_excl);
4708 async_iocdata(q, mp);
4709 break;
4710 }
4711 async_put_suspq(asy, mp);
4712 mutex_exit(&asy->asy_excl);
4713 break;
4714
4715 default:
4716 freemsg(mp);
4717 break;
4718 }
4719 return (0);
4720 }
4721
4722 static int
asywput(queue_t * q,mblk_t * mp)4723 asywput(queue_t *q, mblk_t *mp)
4724 {
4725 return (asywputdo(q, mp, B_TRUE));
4726 }
4727
4728 /*
4729 * Retry an "ioctl", now that "bufcall" claims we may be able to allocate
4730 * the buffer we need.
4731 */
4732 static void
async_reioctl(void * unit)4733 async_reioctl(void *unit)
4734 {
4735 int instance = (uintptr_t)unit;
4736 struct asyncline *async;
4737 struct asycom *asy;
4738 queue_t *q;
4739 mblk_t *mp;
4740
4741 asy = ddi_get_soft_state(asy_soft_state, instance);
4742 ASSERT(asy != NULL);
4743 async = asy->asy_priv;
4744
4745 /*
4746 * The bufcall is no longer pending.
4747 */
4748 mutex_enter(&asy->asy_excl);
4749 async->async_wbufcid = 0;
4750 if ((q = async->async_ttycommon.t_writeq) == NULL) {
4751 mutex_exit(&asy->asy_excl);
4752 return;
4753 }
4754 if ((mp = async->async_ttycommon.t_iocpending) != NULL) {
4755 /* not pending any more */
4756 async->async_ttycommon.t_iocpending = NULL;
4757 mutex_exit(&asy->asy_excl);
4758 async_ioctl(async, q, mp);
4759 } else
4760 mutex_exit(&asy->asy_excl);
4761 }
4762
4763 static void
async_iocdata(queue_t * q,mblk_t * mp)4764 async_iocdata(queue_t *q, mblk_t *mp)
4765 {
4766 struct asyncline *async = (struct asyncline *)q->q_ptr;
4767 struct asycom *asy;
4768 struct iocblk *ip;
4769 struct copyresp *csp;
4770
4771 asy = async->async_common;
4772 ip = (struct iocblk *)mp->b_rptr;
4773 csp = (struct copyresp *)mp->b_rptr;
4774
4775 if (csp->cp_rval != 0) {
4776 if (csp->cp_private)
4777 freemsg(csp->cp_private);
4778 freemsg(mp);
4779 return;
4780 }
4781
4782 mutex_enter(&asy->asy_excl);
4783 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "case %s",
4784 csp->cp_cmd == TIOCMGET ? "TIOCMGET" :
4785 csp->cp_cmd == TIOCMSET ? "TIOCMSET" :
4786 csp->cp_cmd == TIOCMBIS ? "TIOCMBIS" :
4787 "TIOCMBIC");
4788 switch (csp->cp_cmd) {
4789
4790 case TIOCMGET:
4791 if (mp->b_cont) {
4792 freemsg(mp->b_cont);
4793 mp->b_cont = NULL;
4794 }
4795 mp->b_datap->db_type = M_IOCACK;
4796 ip->ioc_error = 0;
4797 ip->ioc_count = 0;
4798 ip->ioc_rval = 0;
4799 mp->b_wptr = mp->b_rptr + sizeof (struct iocblk);
4800 break;
4801
4802 case TIOCMSET:
4803 case TIOCMBIS:
4804 case TIOCMBIC:
4805 mutex_enter(&asy->asy_excl_hi);
4806 (void) asymctl(asy, dmtoasy(asy, *(int *)mp->b_cont->b_rptr),
4807 csp->cp_cmd);
4808 mutex_exit(&asy->asy_excl_hi);
4809 mioc2ack(mp, NULL, 0, 0);
4810 break;
4811
4812 default:
4813 mp->b_datap->db_type = M_IOCNAK;
4814 ip->ioc_error = EINVAL;
4815 break;
4816 }
4817 qreply(q, mp);
4818 mutex_exit(&asy->asy_excl);
4819 }
4820
4821 /*
4822 * debugger/console support routines.
4823 */
4824
4825 /*
4826 * put a character out
4827 * Do not use interrupts. If char is LF, put out CR, LF.
4828 */
4829 static void
asyputchar(cons_polledio_arg_t arg,uchar_t c)4830 asyputchar(cons_polledio_arg_t arg, uchar_t c)
4831 {
4832 struct asycom *asy = (struct asycom *)arg;
4833
4834 if (c == '\n')
4835 asyputchar(arg, '\r');
4836
4837 while ((asy_get_reg(asy, ASY_LSR) & ASY_LSR_THRE) == 0) {
4838 /* wait for xmit to finish */
4839 drv_usecwait(10);
4840 }
4841
4842 /* put the character out */
4843 asy_put_reg(asy, ASY_THR, c);
4844 }
4845
4846 /*
4847 * See if there's a character available. If no character is
4848 * available, return 0. Run in polled mode, no interrupts.
4849 */
4850 static boolean_t
asyischar(cons_polledio_arg_t arg)4851 asyischar(cons_polledio_arg_t arg)
4852 {
4853 struct asycom *asy = (struct asycom *)arg;
4854
4855 return ((asy_get_reg(asy, ASY_LSR) & ASY_LSR_DR) != 0);
4856 }
4857
4858 /*
4859 * Get a character. Run in polled mode, no interrupts.
4860 */
4861 static int
asygetchar(cons_polledio_arg_t arg)4862 asygetchar(cons_polledio_arg_t arg)
4863 {
4864 struct asycom *asy = (struct asycom *)arg;
4865
4866 while (!asyischar(arg))
4867 drv_usecwait(10);
4868 return (asy_get_reg(asy, ASY_RHR));
4869 }
4870
4871 /*
4872 * Set or get the modem control status.
4873 */
4874 static int
asymctl(struct asycom * asy,int bits,int how)4875 asymctl(struct asycom *asy, int bits, int how)
4876 {
4877 int mcr_r, msr_r;
4878
4879 ASSERT(mutex_owned(&asy->asy_excl_hi));
4880 ASSERT(mutex_owned(&asy->asy_excl));
4881
4882 /* Read Modem Control Registers */
4883 mcr_r = asy_get(asy, ASY_MCR);
4884
4885 switch (how) {
4886
4887 case TIOCMSET:
4888 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMSET, bits = %x", bits);
4889 mcr_r = bits; /* Set bits */
4890 break;
4891
4892 case TIOCMBIS:
4893 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMBIS, bits = %x", bits);
4894 mcr_r |= bits; /* Mask in bits */
4895 break;
4896
4897 case TIOCMBIC:
4898 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "TIOCMBIC, bits = %x", bits);
4899 mcr_r &= ~bits; /* Mask out bits */
4900 break;
4901
4902 case TIOCMGET:
4903 /* Read Modem Status Registers */
4904 /*
4905 * If modem interrupts are enabled, we return the
4906 * saved value of msr. We read MSR only in async_msint()
4907 */
4908 if (asy_get(asy, ASY_IER) & ASY_IER_MIEN) {
4909 msr_r = asy->asy_msr;
4910 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
4911 "TIOCMGET, read msr_r = %x", msr_r);
4912 } else {
4913 msr_r = asy_get(asy, ASY_MSR);
4914 ASY_DPRINTF(asy, ASY_DEBUG_MODEM,
4915 "TIOCMGET, read MSR = %x", msr_r);
4916 }
4917 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "modem_lines = %x",
4918 asytodm(mcr_r, msr_r));
4919 return (asytodm(mcr_r, msr_r));
4920 }
4921
4922 asy_put(asy, ASY_MCR, mcr_r);
4923
4924 return (mcr_r);
4925 }
4926
4927 static int
asytodm(int mcr_r,int msr_r)4928 asytodm(int mcr_r, int msr_r)
4929 {
4930 int b = 0;
4931
4932 /* MCR registers */
4933 if (mcr_r & ASY_MCR_RTS)
4934 b |= TIOCM_RTS;
4935
4936 if (mcr_r & ASY_MCR_DTR)
4937 b |= TIOCM_DTR;
4938
4939 /* MSR registers */
4940 if (msr_r & ASY_MSR_DCD)
4941 b |= TIOCM_CAR;
4942
4943 if (msr_r & ASY_MSR_CTS)
4944 b |= TIOCM_CTS;
4945
4946 if (msr_r & ASY_MSR_DSR)
4947 b |= TIOCM_DSR;
4948
4949 if (msr_r & ASY_MSR_RI)
4950 b |= TIOCM_RNG;
4951 return (b);
4952 }
4953
4954 static int
dmtoasy(struct asycom * asy,int bits)4955 dmtoasy(struct asycom *asy, int bits)
4956 {
4957 int b = 0;
4958
4959 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "bits = %x", bits);
4960 #ifdef CAN_NOT_SET /* only DTR and RTS can be set */
4961 if (bits & TIOCM_CAR)
4962 b |= ASY_MSR_DCD;
4963 if (bits & TIOCM_CTS)
4964 b |= ASY_MSR_CTS;
4965 if (bits & TIOCM_DSR)
4966 b |= ASY_MSR_DSR;
4967 if (bits & TIOCM_RNG)
4968 b |= ASY_MSR_RI;
4969 #endif
4970
4971 if (bits & TIOCM_RTS) {
4972 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "set b & RTS");
4973 b |= ASY_MCR_RTS;
4974 }
4975 if (bits & TIOCM_DTR) {
4976 ASY_DPRINTF(asy, ASY_DEBUG_MODEM, "set b & DTR");
4977 b |= ASY_MCR_DTR;
4978 }
4979
4980 return (b);
4981 }
4982
4983 static void
asyerror(const struct asycom * asy,int level,const char * fmt,...)4984 asyerror(const struct asycom *asy, int level, const char *fmt, ...)
4985 {
4986 va_list adx;
4987 static time_t last;
4988 static const char *lastfmt;
4989 time_t now;
4990
4991 /*
4992 * Don't print the same error message too often.
4993 * Print the message only if we have not printed the
4994 * message within the last second.
4995 * Note: that fmt cannot be a pointer to a string
4996 * stored on the stack. The fmt pointer
4997 * must be in the data segment otherwise lastfmt would point
4998 * to non-sense.
4999 */
5000 now = gethrestime_sec();
5001 if (last == now && lastfmt == fmt)
5002 return;
5003
5004 last = now;
5005 lastfmt = fmt;
5006
5007 va_start(adx, fmt);
5008 vdev_err(asy->asy_dip, level, fmt, adx);
5009 va_end(adx);
5010 }
5011
5012 /*
5013 * asy_parse_mode(dev_info_t *devi, struct asycom *asy)
5014 * The value of this property is in the form of "9600,8,n,1,-"
5015 * 1) speed: 9600, 4800, ...
5016 * 2) data bits
5017 * 3) parity: n(none), e(even), o(odd)
5018 * 4) stop bits
5019 * 5) handshake: -(none), h(hardware: rts/cts), s(software: xon/off)
5020 *
5021 * This parsing came from a SPARCstation eeprom.
5022 */
5023 static void
asy_parse_mode(dev_info_t * devi,struct asycom * asy)5024 asy_parse_mode(dev_info_t *devi, struct asycom *asy)
5025 {
5026 char name[40];
5027 char val[40];
5028 int len;
5029 int ret;
5030 char *p;
5031 char *p1;
5032
5033 ASSERT(asy->asy_com_port != 0);
5034
5035 /*
5036 * Parse the ttyx-mode property
5037 */
5038 (void) sprintf(name, "tty%c-mode", asy->asy_com_port + 'a' - 1);
5039 len = sizeof (val);
5040 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
5041 if (ret != DDI_PROP_SUCCESS) {
5042 (void) sprintf(name, "com%c-mode", asy->asy_com_port + '0');
5043 len = sizeof (val);
5044 ret = GET_PROP(devi, name, DDI_PROP_CANSLEEP, val, &len);
5045 }
5046
5047 /* no property to parse */
5048 asy->asy_cflag = 0;
5049 if (ret != DDI_PROP_SUCCESS)
5050 return;
5051
5052 p = val;
5053 /* ---- baud rate ---- */
5054 asy->asy_cflag = CREAD|B9600; /* initial default */
5055 if (p && (p1 = strchr(p, ',')) != 0) {
5056 *p1++ = '\0';
5057 } else {
5058 asy->asy_cflag |= ASY_LCR_BITS8; /* add default bits */
5059 return;
5060 }
5061
5062 if (strcmp(p, "110") == 0)
5063 asy->asy_bidx = B110;
5064 else if (strcmp(p, "150") == 0)
5065 asy->asy_bidx = B150;
5066 else if (strcmp(p, "300") == 0)
5067 asy->asy_bidx = B300;
5068 else if (strcmp(p, "600") == 0)
5069 asy->asy_bidx = B600;
5070 else if (strcmp(p, "1200") == 0)
5071 asy->asy_bidx = B1200;
5072 else if (strcmp(p, "2400") == 0)
5073 asy->asy_bidx = B2400;
5074 else if (strcmp(p, "4800") == 0)
5075 asy->asy_bidx = B4800;
5076 else if (strcmp(p, "9600") == 0)
5077 asy->asy_bidx = B9600;
5078 else if (strcmp(p, "19200") == 0)
5079 asy->asy_bidx = B19200;
5080 else if (strcmp(p, "38400") == 0)
5081 asy->asy_bidx = B38400;
5082 else if (strcmp(p, "57600") == 0)
5083 asy->asy_bidx = B57600;
5084 else if (strcmp(p, "115200") == 0)
5085 asy->asy_bidx = B115200;
5086 else
5087 asy->asy_bidx = B9600;
5088
5089 asy->asy_cflag &= ~CBAUD;
5090 if (asy->asy_bidx > CBAUD) { /* > 38400 uses the CBAUDEXT bit */
5091 asy->asy_cflag |= CBAUDEXT;
5092 asy->asy_cflag |= asy->asy_bidx - CBAUD - 1;
5093 } else {
5094 asy->asy_cflag |= asy->asy_bidx;
5095 }
5096
5097 ASSERT(asy->asy_bidx == BAUDINDEX(asy->asy_cflag));
5098
5099 /* ---- Next item is data bits ---- */
5100 p = p1;
5101 if (p && (p1 = strchr(p, ',')) != 0) {
5102 *p1++ = '\0';
5103 } else {
5104 asy->asy_cflag |= ASY_LCR_BITS8; /* add default bits */
5105 return;
5106 }
5107 switch (*p) {
5108 default:
5109 case '8':
5110 asy->asy_cflag |= CS8;
5111 asy->asy_lcr = ASY_LCR_BITS8;
5112 break;
5113 case '7':
5114 asy->asy_cflag |= CS7;
5115 asy->asy_lcr = ASY_LCR_BITS7;
5116 break;
5117 case '6':
5118 asy->asy_cflag |= CS6;
5119 asy->asy_lcr = ASY_LCR_BITS6;
5120 break;
5121 case '5':
5122 /* LINTED: CS5 is currently zero (but might change) */
5123 asy->asy_cflag |= CS5;
5124 asy->asy_lcr = ASY_LCR_BITS5;
5125 break;
5126 }
5127
5128 /* ---- Parity info ---- */
5129 p = p1;
5130 if (p && (p1 = strchr(p, ',')) != 0) {
5131 *p1++ = '\0';
5132 } else {
5133 return;
5134 }
5135 switch (*p) {
5136 default:
5137 case 'n':
5138 break;
5139 case 'e':
5140 asy->asy_cflag |= PARENB;
5141 asy->asy_lcr |= ASY_LCR_PEN;
5142 break;
5143 case 'o':
5144 asy->asy_cflag |= PARENB|PARODD;
5145 asy->asy_lcr |= ASY_LCR_PEN | ASY_LCR_EPS;
5146 break;
5147 }
5148
5149 /* ---- Find stop bits ---- */
5150 p = p1;
5151 if (p && (p1 = strchr(p, ',')) != 0) {
5152 *p1++ = '\0';
5153 } else {
5154 return;
5155 }
5156 if (*p == '2') {
5157 asy->asy_cflag |= CSTOPB;
5158 asy->asy_lcr |= ASY_LCR_STB;
5159 }
5160
5161 /* ---- handshake is next ---- */
5162 p = p1;
5163 if (p) {
5164 if ((p1 = strchr(p, ',')) != 0)
5165 *p1++ = '\0';
5166
5167 if (*p == 'h')
5168 asy->asy_cflag |= CRTSCTS;
5169 else if (*p == 's')
5170 asy->asy_cflag |= CRTSXOFF;
5171 }
5172 }
5173
5174 /*
5175 * Check for abort character sequence
5176 */
5177 static boolean_t
abort_charseq_recognize(uchar_t ch)5178 abort_charseq_recognize(uchar_t ch)
5179 {
5180 static int state = 0;
5181 #define CNTRL(c) ((c)&037)
5182 static char sequence[] = { '\r', '~', CNTRL('b') };
5183
5184 if (ch == sequence[state]) {
5185 if (++state >= sizeof (sequence)) {
5186 state = 0;
5187 return (B_TRUE);
5188 }
5189 } else {
5190 state = (ch == sequence[0]) ? 1 : 0;
5191 }
5192 return (B_FALSE);
5193 }
5194
5195 /*
5196 * Flow control functions
5197 */
5198 /*
5199 * Software input flow control
5200 * This function can execute software input flow control sucessfully
5201 * at most of situations except that the line is in BREAK status
5202 * (timed and untimed break).
5203 * INPUT VALUE of onoff:
5204 * FLOW_START means to send out a XON char
5205 * and clear SW input flow control flag.
5206 * FLOW_STOP means to send out a XOFF char
5207 * and set SW input flow control flag.
5208 * FLOW_CHECK means to check whether there is pending XON/XOFF
5209 * if it is true, send it out.
5210 * INPUT VALUE of type:
5211 * IN_FLOW_RINGBUFF means flow control is due to RING BUFFER
5212 * IN_FLOW_STREAMS means flow control is due to STREAMS
5213 * IN_FLOW_USER means flow control is due to user's commands
5214 * RETURN VALUE: B_FALSE means no flow control char is sent
5215 * B_TRUE means one flow control char is sent
5216 */
5217 static boolean_t
async_flowcontrol_sw_input(struct asycom * asy,async_flowc_action onoff,int type)5218 async_flowcontrol_sw_input(struct asycom *asy, async_flowc_action onoff,
5219 int type)
5220 {
5221 struct asyncline *async = asy->asy_priv;
5222 int rval = B_FALSE;
5223
5224 ASSERT(mutex_owned(&asy->asy_excl_hi));
5225
5226 if (!(async->async_ttycommon.t_iflag & IXOFF))
5227 return (rval);
5228
5229 /*
5230 * If we get this far, then we know IXOFF is set.
5231 */
5232 switch (onoff) {
5233 case FLOW_STOP:
5234 async->async_inflow_source |= type;
5235
5236 /*
5237 * We'll send an XOFF character for each of up to
5238 * three different input flow control attempts to stop input.
5239 * If we already send out one XOFF, but FLOW_STOP comes again,
5240 * it seems that input flow control becomes more serious,
5241 * then send XOFF again.
5242 */
5243 if (async->async_inflow_source & (IN_FLOW_RINGBUFF |
5244 IN_FLOW_STREAMS | IN_FLOW_USER))
5245 async->async_flags |= ASYNC_SW_IN_FLOW |
5246 ASYNC_SW_IN_NEEDED;
5247 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "input sflow stop, type = %x",
5248 async->async_inflow_source);
5249 break;
5250 case FLOW_START:
5251 async->async_inflow_source &= ~type;
5252 if (async->async_inflow_source == 0) {
5253 async->async_flags = (async->async_flags &
5254 ~ASYNC_SW_IN_FLOW) | ASYNC_SW_IN_NEEDED;
5255 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "input sflow start");
5256 }
5257 break;
5258 default:
5259 break;
5260 }
5261
5262 if (((async->async_flags & (ASYNC_SW_IN_NEEDED | ASYNC_BREAK |
5263 ASYNC_OUT_SUSPEND)) == ASYNC_SW_IN_NEEDED) &&
5264 (asy_get(asy, ASY_LSR) & ASY_LSR_THRE)) {
5265 /*
5266 * If we get this far, then we know we need to send out
5267 * XON or XOFF char.
5268 */
5269 async->async_flags = (async->async_flags &
5270 ~ASYNC_SW_IN_NEEDED) | ASYNC_BUSY;
5271 asy_put(asy, ASY_THR,
5272 async->async_flags & ASYNC_SW_IN_FLOW ?
5273 async->async_stopc : async->async_startc);
5274 rval = B_TRUE;
5275 }
5276 return (rval);
5277 }
5278
5279 /*
5280 * Software output flow control
5281 * This function can be executed sucessfully at any situation.
5282 * It does not handle HW, and just change the SW output flow control flag.
5283 * INPUT VALUE of onoff:
5284 * FLOW_START means to clear SW output flow control flag,
5285 * also combine with HW output flow control status to
5286 * determine if we need to set ASYNC_OUT_FLW_RESUME.
5287 * FLOW_STOP means to set SW output flow control flag,
5288 * also clear ASYNC_OUT_FLW_RESUME.
5289 */
5290 static void
async_flowcontrol_sw_output(struct asycom * asy,async_flowc_action onoff)5291 async_flowcontrol_sw_output(struct asycom *asy, async_flowc_action onoff)
5292 {
5293 struct asyncline *async = asy->asy_priv;
5294
5295 ASSERT(mutex_owned(&asy->asy_excl_hi));
5296
5297 if (!(async->async_ttycommon.t_iflag & IXON))
5298 return;
5299
5300 switch (onoff) {
5301 case FLOW_STOP:
5302 async->async_flags |= ASYNC_SW_OUT_FLW;
5303 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
5304 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "output sflow stop");
5305 break;
5306 case FLOW_START:
5307 async->async_flags &= ~ASYNC_SW_OUT_FLW;
5308 if (!(async->async_flags & ASYNC_HW_OUT_FLW))
5309 async->async_flags |= ASYNC_OUT_FLW_RESUME;
5310 ASY_DPRINTF(asy, ASY_DEBUG_SFLOW, "output sflow start");
5311 break;
5312 default:
5313 break;
5314 }
5315 }
5316
5317 /*
5318 * Hardware input flow control
5319 * This function can be executed sucessfully at any situation.
5320 * It directly changes RTS depending on input parameter onoff.
5321 * INPUT VALUE of onoff:
5322 * FLOW_START means to clear HW input flow control flag,
5323 * and pull up RTS if it is low.
5324 * FLOW_STOP means to set HW input flow control flag,
5325 * and low RTS if it is high.
5326 * INPUT VALUE of type:
5327 * IN_FLOW_RINGBUFF means flow control is due to RING BUFFER
5328 * IN_FLOW_STREAMS means flow control is due to STREAMS
5329 * IN_FLOW_USER means flow control is due to user's commands
5330 */
5331 static void
async_flowcontrol_hw_input(struct asycom * asy,async_flowc_action onoff,int type)5332 async_flowcontrol_hw_input(struct asycom *asy, async_flowc_action onoff,
5333 int type)
5334 {
5335 uchar_t mcr;
5336 uchar_t flag;
5337 struct asyncline *async = asy->asy_priv;
5338
5339 ASSERT(mutex_owned(&asy->asy_excl_hi));
5340
5341 if (!(async->async_ttycommon.t_cflag & CRTSXOFF))
5342 return;
5343
5344 switch (onoff) {
5345 case FLOW_STOP:
5346 async->async_inflow_source |= type;
5347 if (async->async_inflow_source & (IN_FLOW_RINGBUFF |
5348 IN_FLOW_STREAMS | IN_FLOW_USER))
5349 async->async_flags |= ASYNC_HW_IN_FLOW;
5350 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "input hflow stop, type = %x",
5351 async->async_inflow_source);
5352 break;
5353 case FLOW_START:
5354 async->async_inflow_source &= ~type;
5355 if (async->async_inflow_source == 0) {
5356 async->async_flags &= ~ASYNC_HW_IN_FLOW;
5357 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "input hflow start");
5358 }
5359 break;
5360 default:
5361 break;
5362 }
5363 mcr = asy_get(asy, ASY_MCR);
5364 flag = (async->async_flags & ASYNC_HW_IN_FLOW) ? 0 : ASY_MCR_RTS;
5365
5366 if (((mcr ^ flag) & ASY_MCR_RTS) != 0) {
5367 asy_put(asy, ASY_MCR, (mcr ^ ASY_MCR_RTS));
5368 }
5369 }
5370
5371 /*
5372 * Hardware output flow control
5373 * This function can execute HW output flow control sucessfully
5374 * at any situation.
5375 * It doesn't really change RTS, and just change
5376 * HW output flow control flag depending on CTS status.
5377 * INPUT VALUE of onoff:
5378 * FLOW_START means to clear HW output flow control flag.
5379 * also combine with SW output flow control status to
5380 * determine if we need to set ASYNC_OUT_FLW_RESUME.
5381 * FLOW_STOP means to set HW output flow control flag.
5382 * also clear ASYNC_OUT_FLW_RESUME.
5383 */
5384 static void
async_flowcontrol_hw_output(struct asycom * asy,async_flowc_action onoff)5385 async_flowcontrol_hw_output(struct asycom *asy, async_flowc_action onoff)
5386 {
5387 struct asyncline *async = asy->asy_priv;
5388
5389 ASSERT(mutex_owned(&asy->asy_excl_hi));
5390
5391 if (!(async->async_ttycommon.t_cflag & CRTSCTS))
5392 return;
5393
5394 switch (onoff) {
5395 case FLOW_STOP:
5396 async->async_flags |= ASYNC_HW_OUT_FLW;
5397 async->async_flags &= ~ASYNC_OUT_FLW_RESUME;
5398 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "output hflow stop");
5399 break;
5400 case FLOW_START:
5401 async->async_flags &= ~ASYNC_HW_OUT_FLW;
5402 if (!(async->async_flags & ASYNC_SW_OUT_FLW))
5403 async->async_flags |= ASYNC_OUT_FLW_RESUME;
5404 ASY_DPRINTF(asy, ASY_DEBUG_HFLOW, "output hflow start");
5405 break;
5406 default:
5407 break;
5408 }
5409 }
5410
5411 /*
5412 * quiesce(9E) entry point.
5413 *
5414 * This function is called when the system is single-threaded at high
5415 * PIL with preemption disabled. Therefore, this function must not be
5416 * blocked.
5417 *
5418 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
5419 * DDI_FAILURE indicates an error condition and should almost never happen.
5420 */
5421 static int
asyquiesce(dev_info_t * devi)5422 asyquiesce(dev_info_t *devi)
5423 {
5424 int instance;
5425 struct asycom *asy;
5426
5427 instance = ddi_get_instance(devi); /* find out which unit */
5428
5429 asy = ddi_get_soft_state(asy_soft_state, instance);
5430 if (asy == NULL)
5431 return (DDI_FAILURE);
5432
5433 asy_disable_interrupts(asy, ASY_IER_ALL);
5434
5435 /* Flush the FIFOs, if required */
5436 if (asy->asy_use_fifo == ASY_FCR_FIFO_EN) {
5437 asy_reset_fifo(asy, ASY_FCR_THR_FL | ASY_FCR_RHR_FL);
5438 }
5439
5440 return (DDI_SUCCESS);
5441 }
5442