1 /******************************************************************************
2 SPDX-License-Identifier: BSD-3-Clause
3
4 Copyright (c) 2001-2020, Intel Corporation
5 All rights reserved.
6
7 Redistribution and use in source and binary forms, with or without
8 modification, are permitted provided that the following conditions are met:
9
10 1. Redistributions of source code must retain the above copyright notice,
11 this list of conditions and the following disclaimer.
12
13 2. Redistributions in binary form must reproduce the above copyright
14 notice, this list of conditions and the following disclaimer in the
15 documentation and/or other materials provided with the distribution.
16
17 3. Neither the name of the Intel Corporation nor the names of its
18 contributors may be used to endorse or promote products derived from
19 this software without specific prior written permission.
20
21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 POSSIBILITY OF SUCH DAMAGE.
32
33 ******************************************************************************/
34
35 #include "ixgbe_api.h"
36 #include "ixgbe_type.h"
37 #include "ixgbe_vf.h"
38
39 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
40 #define IXGBE_VFREAD_REG IXGBE_READ_REG
41
42 /**
43 * ixgbe_init_ops_vf - Initialize the pointers for vf
44 * @hw: pointer to hardware structure
45 *
46 * This will assign function pointers, adapter-specific functions can
47 * override the assignment of generic function pointers by assigning
48 * their own adapter-specific function pointers.
49 * Does not touch the hardware.
50 **/
ixgbe_init_ops_vf(struct ixgbe_hw * hw)51 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
52 {
53 u16 i;
54
55 /* MAC */
56 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
57 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
58 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
59 /* Cannot clear stats on VF */
60 hw->mac.ops.clear_hw_cntrs = NULL;
61 hw->mac.ops.get_media_type = NULL;
62 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
63 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
64 hw->mac.ops.get_bus_info = NULL;
65 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version;
66
67 /* Link */
68 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
69 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
70 hw->mac.ops.get_link_capabilities = NULL;
71
72 /* RAR, Multicast, VLAN */
73 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
74 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
75 hw->mac.ops.init_rx_addrs = NULL;
76 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
77 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;
78 hw->mac.ops.get_link_state = ixgbe_get_link_state_vf;
79 hw->mac.ops.enable_mc = NULL;
80 hw->mac.ops.disable_mc = NULL;
81 hw->mac.ops.clear_vfta = NULL;
82 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
83 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf;
84
85 hw->mac.max_tx_queues = 1;
86 hw->mac.max_rx_queues = 1;
87
88 for (i = 0; i < 64; i++)
89 hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_vf;
90
91 return IXGBE_SUCCESS;
92 }
93
94 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
95 * @hw: pointer to hardware structure
96 */
ixgbe_virt_clr_reg(struct ixgbe_hw * hw)97 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
98 {
99 int i;
100 u32 vfsrrctl;
101 u32 vfdca_rxctrl;
102 u32 vfdca_txctrl;
103
104 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
105 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
106 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
107
108 /* DCA_RXCTRL default value */
109 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
110 IXGBE_DCA_RXCTRL_DATA_WRO_EN |
111 IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
112
113 /* DCA_TXCTRL default value */
114 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
115 IXGBE_DCA_TXCTRL_DESC_WRO_EN |
116 IXGBE_DCA_TXCTRL_DATA_RRO_EN;
117
118 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
119
120 for (i = 0; i < 8; i++) {
121 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
122 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
123 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
124 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
125 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
126 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
127 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
128 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
129 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
130 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
131 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
132 }
133
134 IXGBE_WRITE_FLUSH(hw);
135 }
136
137 /**
138 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
139 * @hw: pointer to hardware structure
140 *
141 * Starts the hardware by filling the bus info structure and media type, clears
142 * all on chip counters, initializes receive address registers, multicast
143 * table, VLAN filter table, calls routine to set up link and flow control
144 * settings, and leaves transmit and receive units disabled and uninitialized
145 **/
ixgbe_start_hw_vf(struct ixgbe_hw * hw)146 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
147 {
148 /* Clear adapter stopped flag */
149 hw->adapter_stopped = false;
150
151 return IXGBE_SUCCESS;
152 }
153
154 /**
155 * ixgbe_init_hw_vf - virtual function hardware initialization
156 * @hw: pointer to hardware structure
157 *
158 * Initialize the hardware by resetting the hardware and then starting
159 * the hardware
160 **/
ixgbe_init_hw_vf(struct ixgbe_hw * hw)161 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
162 {
163 s32 status = hw->mac.ops.start_hw(hw);
164
165 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
166
167 return status;
168 }
169
170 /**
171 * ixgbe_reset_hw_vf - Performs hardware reset
172 * @hw: pointer to hardware structure
173 *
174 * Resets the hardware by resetting the transmit and receive units, masks and
175 * clears all interrupts.
176 **/
ixgbe_reset_hw_vf(struct ixgbe_hw * hw)177 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
178 {
179 struct ixgbe_mbx_info *mbx = &hw->mbx;
180 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
181 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
182 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
183 u8 *addr = (u8 *)(&msgbuf[1]);
184
185 DEBUGFUNC("ixgbevf_reset_hw_vf");
186
187 /* Call adapter stop to disable tx/rx and clear interrupts */
188 hw->mac.ops.stop_adapter(hw);
189
190 /* reset the api version */
191 hw->api_version = ixgbe_mbox_api_10;
192 ixgbe_init_mbx_params_vf(hw);
193
194 DEBUGOUT("Issuing a function level reset to MAC\n");
195
196 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
197 IXGBE_WRITE_FLUSH(hw);
198
199 msec_delay(50);
200
201 /* we cannot reset while the RSTI / RSTD bits are asserted */
202 while (!mbx->ops[0].check_for_rst(hw, 0) && timeout) {
203 timeout--;
204 usec_delay(5);
205 }
206
207 if (!timeout)
208 return IXGBE_ERR_RESET_FAILED;
209
210 /* Reset VF registers to initial values */
211 ixgbe_virt_clr_reg(hw);
212
213 /* mailbox timeout can now become active */
214 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
215
216 msgbuf[0] = IXGBE_VF_RESET;
217 ixgbe_write_mbx(hw, msgbuf, 1, 0);
218
219 msec_delay(10);
220
221 /*
222 * set our "perm_addr" based on info provided by PF
223 * also set up the mc_filter_type which is piggy backed
224 * on the mac address in word 3
225 */
226 ret_val = ixgbe_poll_mbx(hw, msgbuf,
227 IXGBE_VF_PERMADDR_MSG_LEN, 0);
228 if (ret_val)
229 return ret_val;
230
231 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS) &&
232 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_FAILURE))
233 return IXGBE_ERR_INVALID_MAC_ADDR;
234
235 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS))
236 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
237
238 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
239
240 return ret_val;
241 }
242
243 /**
244 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
245 * @hw: pointer to hardware structure
246 *
247 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
248 * disables transmit and receive units. The adapter_stopped flag is used by
249 * the shared code and drivers to determine if the adapter is in a stopped
250 * state and should not touch the hardware.
251 **/
ixgbe_stop_adapter_vf(struct ixgbe_hw * hw)252 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
253 {
254 u32 reg_val;
255 u16 i;
256
257 /*
258 * Set the adapter_stopped flag so other driver functions stop touching
259 * the hardware
260 */
261 hw->adapter_stopped = true;
262
263 /* Clear interrupt mask to stop from interrupts being generated */
264 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
265
266 /* Clear any pending interrupts, flush previous writes */
267 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
268
269 /* Disable the transmit unit. Each queue must be disabled. */
270 for (i = 0; i < hw->mac.max_tx_queues; i++)
271 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
272
273 /* Disable the receive unit by stopping each queue */
274 for (i = 0; i < hw->mac.max_rx_queues; i++) {
275 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
276 reg_val &= ~IXGBE_RXDCTL_ENABLE;
277 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
278 }
279 /* Clear packet split and pool config */
280 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
281
282 /* flush all queues disables */
283 IXGBE_WRITE_FLUSH(hw);
284 msec_delay(2);
285
286 return IXGBE_SUCCESS;
287 }
288
289 /**
290 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
291 * @hw: pointer to hardware structure
292 * @mc_addr: the multicast address
293 *
294 * Extracts the 12 bits, from a multicast address, to determine which
295 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
296 * incoming rx multicast addresses, to determine the bit-vector to check in
297 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
298 * by the MO field of the MCSTCTRL. The MO field is set during initialization
299 * to mc_filter_type.
300 **/
ixgbe_mta_vector(struct ixgbe_hw * hw,u8 * mc_addr)301 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
302 {
303 u32 vector = 0;
304
305 switch (hw->mac.mc_filter_type) {
306 case 0: /* use bits [47:36] of the address */
307 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
308 break;
309 case 1: /* use bits [46:35] of the address */
310 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
311 break;
312 case 2: /* use bits [45:34] of the address */
313 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
314 break;
315 case 3: /* use bits [43:32] of the address */
316 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
317 break;
318 default: /* Invalid mc_filter_type */
319 DEBUGOUT("MC filter type param set incorrectly\n");
320 ASSERT(0);
321 break;
322 }
323
324 /* vector can only be 12-bits or boundary will be exceeded */
325 vector &= 0xFFF;
326 return vector;
327 }
328
ixgbevf_write_msg_read_ack(struct ixgbe_hw * hw,u32 * msg,u32 * retmsg,u16 size)329 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,
330 u32 *retmsg, u16 size)
331 {
332 s32 retval = ixgbe_write_mbx(hw, msg, size, 0);
333
334 if (retval)
335 return retval;
336
337 return ixgbe_poll_mbx(hw, retmsg, size, 0);
338 }
339
340 /**
341 * ixgbe_set_rar_vf - set device MAC address
342 * @hw: pointer to hardware structure
343 * @index: Receive address register to write
344 * @addr: Address to put into receive address register
345 * @vmdq: VMDq "set" or "pool" index
346 * @enable_addr: set flag that address is active
347 **/
ixgbe_set_rar_vf(struct ixgbe_hw * hw,u32 index,u8 * addr,u32 vmdq,u32 enable_addr)348 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
349 u32 enable_addr)
350 {
351 u32 msgbuf[3];
352 u8 *msg_addr = (u8 *)(&msgbuf[1]);
353 s32 ret_val;
354 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
355
356 memset(msgbuf, 0, 12);
357 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
358 memcpy(msg_addr, addr, 6);
359 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
360
361 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
362
363 /* if we had failure, the address was rejected, use "perm_addr" */
364 if (!ret_val &&
365 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_FAILURE))) {
366 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
367 return IXGBE_ERR_MBX;
368 }
369
370 return ret_val;
371 }
372
373 /**
374 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
375 * @hw: pointer to the HW structure
376 * @mc_addr_list: array of multicast addresses to program
377 * @mc_addr_count: number of multicast addresses to program
378 * @next: caller supplied function to return next address in list
379 * @clear: unused
380 *
381 * Updates the Multicast Table Array.
382 **/
ixgbe_update_mc_addr_list_vf(struct ixgbe_hw * hw,u8 * mc_addr_list,u32 mc_addr_count,ixgbe_mc_addr_itr next,bool clear)383 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
384 u32 mc_addr_count, ixgbe_mc_addr_itr next,
385 bool clear)
386 {
387 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
388 u16 *vector_list = (u16 *)&msgbuf[1];
389 u32 vector;
390 u32 cnt, i;
391 u32 vmdq;
392
393 UNREFERENCED_1PARAMETER(clear);
394
395 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
396
397 /* Each entry in the list uses 1 16 bit word. We have 30
398 * 16 bit words available in our HW msg buffer (minus 1 for the
399 * msg type). That's 30 hash values if we pack 'em right. If
400 * there are more than 30 MC addresses to add then punt the
401 * extras for now and then add code to handle more than 30 later.
402 * It would be unusual for a server to request that many multi-cast
403 * addresses except for in large enterprise network environments.
404 */
405
406 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
407
408 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
409 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
410 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
411
412 for (i = 0; i < cnt; i++) {
413 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
414 DEBUGOUT1("Hash value = 0x%03X\n", vector);
415 vector_list[i] = (u16)vector;
416 }
417
418 return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, IXGBE_VFMAILBOX_SIZE);
419 }
420
421 /**
422 * ixgbevf_update_xcast_mode - Update Multicast mode
423 * @hw: pointer to the HW structure
424 * @xcast_mode: new multicast mode
425 *
426 * Updates the Multicast Mode of VF.
427 **/
ixgbevf_update_xcast_mode(struct ixgbe_hw * hw,int xcast_mode)428 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
429 {
430 u32 msgbuf[2];
431 s32 err;
432
433 switch (hw->api_version) {
434 case ixgbe_mbox_api_12:
435 /* New modes were introduced in 1.3 version */
436 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI)
437 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
438 /* Fall through */
439 case ixgbe_mbox_api_13:
440 case ixgbe_mbox_api_15:
441 break;
442 default:
443 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
444 }
445
446 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
447 msgbuf[1] = xcast_mode;
448
449 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
450 if (err)
451 return err;
452
453 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
454 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_FAILURE))
455 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
456 return IXGBE_SUCCESS;
457 }
458
459 /**
460 * ixgbe_get_link_state_vf - Get VF link state from PF
461 * @hw: pointer to the HW structure
462 * @link_state: link state storage
463 *
464 * Returns state of the operation error or success.
465 **/
ixgbe_get_link_state_vf(struct ixgbe_hw * hw,bool * link_state)466 s32 ixgbe_get_link_state_vf(struct ixgbe_hw *hw, bool *link_state)
467 {
468 u32 msgbuf[2];
469 s32 err;
470 s32 ret_val;
471
472 msgbuf[0] = IXGBE_VF_GET_LINK_STATE;
473 msgbuf[1] = 0x0;
474
475 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
476
477 if (err || (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE)) {
478 ret_val = IXGBE_ERR_MBX;
479 } else {
480 ret_val = IXGBE_SUCCESS;
481 *link_state = msgbuf[1];
482 }
483
484 return ret_val;
485 }
486
487 /**
488 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
489 * @hw: pointer to the HW structure
490 * @vlan: 12 bit VLAN ID
491 * @vind: unused by VF drivers
492 * @vlan_on: if true then set bit, else clear bit
493 * @vlvf_bypass: boolean flag indicating updating default pool is okay
494 *
495 * Turn on/off specified VLAN in the VLAN filter table.
496 **/
ixgbe_set_vfta_vf(struct ixgbe_hw * hw,u32 vlan,u32 vind,bool vlan_on,bool vlvf_bypass)497 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
498 bool vlan_on, bool vlvf_bypass)
499 {
500 u32 msgbuf[2];
501 s32 ret_val;
502 UNREFERENCED_2PARAMETER(vind, vlvf_bypass);
503
504 msgbuf[0] = IXGBE_VF_SET_VLAN;
505 msgbuf[1] = vlan;
506 /* Setting the 8 bit field MSG INFO to true indicates "add" */
507 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
508
509 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
510 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_SUCCESS))
511 return IXGBE_SUCCESS;
512
513 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE);
514 }
515
516 /**
517 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
518 * @hw: pointer to hardware structure
519 *
520 * Returns the number of transmit queues for the given adapter.
521 **/
ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw * hw)522 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
523 {
524 UNREFERENCED_1PARAMETER(hw);
525 return IXGBE_VF_MAX_TX_QUEUES;
526 }
527
528 /**
529 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
530 * @hw: pointer to hardware structure
531 *
532 * Returns the number of receive queues for the given adapter.
533 **/
ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw * hw)534 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
535 {
536 UNREFERENCED_1PARAMETER(hw);
537 return IXGBE_VF_MAX_RX_QUEUES;
538 }
539
540 /**
541 * ixgbe_get_mac_addr_vf - Read device MAC address
542 * @hw: pointer to the HW structure
543 * @mac_addr: the MAC address
544 **/
ixgbe_get_mac_addr_vf(struct ixgbe_hw * hw,u8 * mac_addr)545 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
546 {
547 int i;
548
549 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
550 mac_addr[i] = hw->mac.perm_addr[i];
551
552 return IXGBE_SUCCESS;
553 }
554
ixgbevf_set_uc_addr_vf(struct ixgbe_hw * hw,u32 index,u8 * addr)555 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
556 {
557 u32 msgbuf[3], msgbuf_chk;
558 u8 *msg_addr = (u8 *)(&msgbuf[1]);
559 s32 ret_val;
560
561 memset(msgbuf, 0, sizeof(msgbuf));
562 /*
563 * If index is one then this is the start of a new list and needs
564 * indication to the PF so it can do it's own list management.
565 * If it is zero then that tells the PF to just clear all of
566 * this VF's macvlans and there is no new list.
567 */
568 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
569 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
570 msgbuf_chk = msgbuf[0];
571 if (addr)
572 memcpy(msg_addr, addr, 6);
573
574 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
575 if (!ret_val) {
576 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
577
578 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_FAILURE))
579 return IXGBE_ERR_OUT_OF_MEM;
580 }
581
582 return ret_val;
583 }
584
585 /**
586 * ixgbe_setup_mac_link_vf - Setup MAC link settings
587 * @hw: pointer to hardware structure
588 * @speed: new link speed
589 * @autoneg_wait_to_complete: true when waiting for completion is needed
590 *
591 * Set the link speed in the AUTOC register and restarts link.
592 **/
ixgbe_setup_mac_link_vf(struct ixgbe_hw * hw,ixgbe_link_speed speed,bool autoneg_wait_to_complete)593 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
594 bool autoneg_wait_to_complete)
595 {
596 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
597 return IXGBE_SUCCESS;
598 }
599
600 /**
601 * ixgbe_check_mac_link_vf - Get link/speed status
602 * @hw: pointer to hardware structure
603 * @speed: pointer to link speed
604 * @link_up: true is link is up, false otherwise
605 * @autoneg_wait_to_complete: true when waiting for completion is needed
606 *
607 * Reads the links register to determine if link is up and the current speed
608 **/
ixgbe_check_mac_link_vf(struct ixgbe_hw * hw,ixgbe_link_speed * speed,bool * link_up,bool autoneg_wait_to_complete)609 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
610 bool *link_up, bool autoneg_wait_to_complete)
611 {
612 struct ixgbe_mbx_info *mbx = &hw->mbx;
613 struct ixgbe_mac_info *mac = &hw->mac;
614 s32 ret_val = IXGBE_SUCCESS;
615 u32 in_msg = 0;
616 u32 links_reg;
617
618 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
619
620 /* If we were hit with a reset drop the link */
621 if (!mbx->ops[0].check_for_rst(hw, 0) || !mbx->timeout)
622 mac->get_link_status = true;
623
624 if (!mac->get_link_status)
625 goto out;
626
627 /* if link status is down no point in checking to see if pf is up */
628 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
629 if (!(links_reg & IXGBE_LINKS_UP))
630 goto out;
631
632 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
633 * before the link status is correct
634 */
635 if (mac->type == ixgbe_mac_82599_vf) {
636 int i;
637
638 for (i = 0; i < 5; i++) {
639 usec_delay(100);
640 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
641
642 if (!(links_reg & IXGBE_LINKS_UP))
643 goto out;
644 }
645 }
646
647 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
648 case IXGBE_LINKS_SPEED_10G_82599:
649 *speed = IXGBE_LINK_SPEED_10GB_FULL;
650 if (hw->mac.type >= ixgbe_mac_X550_vf) {
651 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
652 *speed = IXGBE_LINK_SPEED_2_5GB_FULL;
653 }
654 break;
655 case IXGBE_LINKS_SPEED_1G_82599:
656 *speed = IXGBE_LINK_SPEED_1GB_FULL;
657 break;
658 case IXGBE_LINKS_SPEED_100_82599:
659 *speed = IXGBE_LINK_SPEED_100_FULL;
660 if (hw->mac.type == ixgbe_mac_X550_vf ||
661 hw->mac.type == ixgbe_mac_E610_vf) {
662 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
663 *speed = IXGBE_LINK_SPEED_5GB_FULL;
664 }
665 break;
666 case IXGBE_LINKS_SPEED_10_X550EM_A:
667 *speed = IXGBE_LINK_SPEED_UNKNOWN;
668 /* Since Reserved in older MAC's */
669 if (hw->mac.type >= ixgbe_mac_X550_vf)
670 *speed = IXGBE_LINK_SPEED_10_FULL;
671 break;
672 default:
673 *speed = IXGBE_LINK_SPEED_UNKNOWN;
674 }
675
676 /* if the read failed it could just be a mailbox collision, best wait
677 * until we are called again and don't report an error
678 */
679 if (ixgbe_read_mbx(hw, &in_msg, 1, 0)) {
680 if (hw->api_version >= ixgbe_mbox_api_15)
681 mac->get_link_status = false;
682 goto out;
683 }
684
685 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
686 /* msg is not CTS and is FAILURE we must have lost CTS status */
687 if (in_msg & IXGBE_VT_MSGTYPE_FAILURE)
688 ret_val = IXGBE_ERR_MBX;
689 goto out;
690 }
691
692 /* the pf is talking, if we timed out in the past we reinit */
693 if (!mbx->timeout) {
694 ret_val = IXGBE_ERR_TIMEOUT;
695 goto out;
696 }
697
698 /* if we passed all the tests above then the link is up and we no
699 * longer need to check for link
700 */
701 mac->get_link_status = false;
702
703 out:
704 *link_up = !mac->get_link_status;
705 return ret_val;
706 }
707
708 /**
709 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
710 * @hw: pointer to the HW structure
711 * @max_size: value to assign to max frame size
712 **/
ixgbevf_rlpml_set_vf(struct ixgbe_hw * hw,u16 max_size)713 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
714 {
715 u32 msgbuf[2];
716 s32 retval;
717
718 msgbuf[0] = IXGBE_VF_SET_LPE;
719 msgbuf[1] = max_size;
720
721 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
722 if (retval)
723 return retval;
724 if ((msgbuf[0] & IXGBE_VF_SET_LPE) &&
725 (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE))
726 return IXGBE_ERR_MBX;
727
728 return 0;
729 }
730
731 /**
732 * ixgbevf_negotiate_api_version - Negotiate supported API version
733 * @hw: pointer to the HW structure
734 * @api: integer containing requested API version
735 **/
ixgbevf_negotiate_api_version(struct ixgbe_hw * hw,int api)736 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
737 {
738 int err;
739 u32 msg[3];
740
741 /* Negotiate the mailbox API version */
742 msg[0] = IXGBE_VF_API_NEGOTIATE;
743 msg[1] = api;
744 msg[2] = 0;
745
746 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3);
747 if (!err) {
748 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
749
750 /* Store value and return 0 on success */
751 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_SUCCESS)) {
752 hw->api_version = api;
753 return 0;
754 }
755
756 err = IXGBE_ERR_INVALID_ARGUMENT;
757 }
758
759 return err;
760 }
761
ixgbevf_get_queues(struct ixgbe_hw * hw,unsigned int * num_tcs,unsigned int * default_tc)762 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
763 unsigned int *default_tc)
764 {
765 int err;
766 u32 msg[5];
767
768 /* do nothing if API doesn't support ixgbevf_get_queues */
769 switch (hw->api_version) {
770 case ixgbe_mbox_api_11:
771 case ixgbe_mbox_api_12:
772 case ixgbe_mbox_api_13:
773 case ixgbe_mbox_api_15:
774 break;
775 default:
776 return 0;
777 }
778
779 /* Fetch queue configuration from the PF */
780 msg[0] = IXGBE_VF_GET_QUEUES;
781 msg[1] = msg[2] = msg[3] = msg[4] = 0;
782
783 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5);
784 if (!err) {
785 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
786
787 /*
788 * if we we didn't get a SUCCESS there must have been
789 * some sort of mailbox error so we should treat it
790 * as such
791 */
792 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_SUCCESS))
793 return IXGBE_ERR_MBX;
794
795 /* record and validate values from message */
796 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
797 if (hw->mac.max_tx_queues == 0 ||
798 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
799 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
800
801 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
802 if (hw->mac.max_rx_queues == 0 ||
803 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
804 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
805
806 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
807 /* in case of unknown state assume we cannot tag frames */
808 if (*num_tcs > hw->mac.max_rx_queues)
809 *num_tcs = 1;
810
811 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
812 /* default to queue 0 on out-of-bounds queue number */
813 if (*default_tc >= hw->mac.max_tx_queues)
814 *default_tc = 0;
815 }
816
817 return err;
818 }
819