1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
2 /*
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #ifndef KFD_PRIV_H_INCLUDED
25 #define KFD_PRIV_H_INCLUDED
26
27 #include <linux/hashtable.h>
28 #include <linux/mmu_notifier.h>
29 #include <linux/memremap.h>
30 #include <linux/mutex.h>
31 #include <linux/types.h>
32 #include <linux/atomic.h>
33 #include <linux/workqueue.h>
34 #include <linux/spinlock.h>
35 #include <linux/kfd_ioctl.h>
36 #include <linux/idr.h>
37 #include <linux/kfifo.h>
38 #include <linux/seq_file.h>
39 #include <linux/kref.h>
40 #include <linux/sysfs.h>
41 #include <linux/device_cgroup.h>
42 #include <drm/drm_file.h>
43 #include <drm/drm_drv.h>
44 #include <drm/drm_device.h>
45 #include <drm/drm_ioctl.h>
46 #include <kgd_kfd_interface.h>
47 #include <linux/swap.h>
48
49 #include "amd_shared.h"
50 #include "amdgpu.h"
51
52 #define KFD_MAX_RING_ENTRY_SIZE 8
53
54 #define KFD_SYSFS_FILE_MODE 0444
55
56 /* GPU ID hash width in bits */
57 #define KFD_GPU_ID_HASH_WIDTH 16
58
59 /* Use upper bits of mmap offset to store KFD driver specific information.
60 * BITS[63:62] - Encode MMAP type
61 * BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to
62 * BITS[45:0] - MMAP offset value
63 *
64 * NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these
65 * defines are w.r.t to PAGE_SIZE
66 */
67 #define KFD_MMAP_TYPE_SHIFT 62
68 #define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT)
69 #define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT)
70 #define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT)
71 #define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT)
72 #define KFD_MMAP_TYPE_MMIO (0x0ULL << KFD_MMAP_TYPE_SHIFT)
73
74 #define KFD_MMAP_GPU_ID_SHIFT 46
75 #define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \
76 << KFD_MMAP_GPU_ID_SHIFT)
77 #define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\
78 & KFD_MMAP_GPU_ID_MASK)
79 #define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \
80 >> KFD_MMAP_GPU_ID_SHIFT)
81
82 /*
83 * When working with cp scheduler we should assign the HIQ manually or via
84 * the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot
85 * definitions for Kaveri. In Kaveri only the first ME queues participates
86 * in the cp scheduling taking that in mind we set the HIQ slot in the
87 * second ME.
88 */
89 #define KFD_CIK_HIQ_PIPE 4
90 #define KFD_CIK_HIQ_QUEUE 0
91
92 /* Macro for allocating structures */
93 #define kfd_alloc_struct(ptr_to_struct) \
94 ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL))
95
96 #define KFD_MAX_NUM_OF_PROCESSES 512
97 #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024
98
99 /*
100 * Size of the per-process TBA+TMA buffer: 2 pages
101 *
102 * The first chunk is the TBA used for the CWSR ISA code. The second
103 * chunk is used as TMA for user-mode trap handler setup in daisy-chain mode.
104 */
105 #define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2)
106 #define KFD_CWSR_TMA_OFFSET (PAGE_SIZE + 2048)
107
108 #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \
109 (KFD_MAX_NUM_OF_PROCESSES * \
110 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS)
111
112 #define KFD_KERNEL_QUEUE_SIZE 2048
113
114 #define KFD_UNMAP_LATENCY_MS (4000)
115
116 #define KFD_MAX_SDMA_QUEUES 128
117
118 /*
119 * 512 = 0x200
120 * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the
121 * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA.
122 * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC
123 * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in
124 * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE.
125 */
126 #define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512
127
128 /**
129 * enum kfd_ioctl_flags - KFD ioctl flags
130 * Various flags that can be set in &amdkfd_ioctl_desc.flags to control how
131 * userspace can use a given ioctl.
132 */
133 enum kfd_ioctl_flags {
134 /*
135 * @KFD_IOC_FLAG_CHECKPOINT_RESTORE:
136 * Certain KFD ioctls such as AMDKFD_IOC_CRIU_OP can potentially
137 * perform privileged operations and load arbitrary data into MQDs and
138 * eventually HQD registers when the queue is mapped by HWS. In order to
139 * prevent this we should perform additional security checks.
140 *
141 * This is equivalent to callers with the CHECKPOINT_RESTORE capability.
142 *
143 * Note: Since earlier versions of docker do not support CHECKPOINT_RESTORE,
144 * we also allow ioctls with SYS_ADMIN capability.
145 */
146 KFD_IOC_FLAG_CHECKPOINT_RESTORE = BIT(0),
147 };
148 /*
149 * Kernel module parameter to specify maximum number of supported queues per
150 * device
151 */
152 extern int max_num_of_queues_per_device;
153
154
155 /* Kernel module parameter to specify the scheduling policy */
156 extern int sched_policy;
157
158 /*
159 * Kernel module parameter to specify the maximum process
160 * number per HW scheduler
161 */
162 extern int hws_max_conc_proc;
163
164 extern int cwsr_enable;
165
166 /*
167 * Kernel module parameter to specify whether to send sigterm to HSA process on
168 * unhandled exception
169 */
170 extern int send_sigterm;
171
172 /*
173 * This kernel module is used to simulate large bar machine on non-large bar
174 * enabled machines.
175 */
176 extern int debug_largebar;
177
178 /* Set sh_mem_config.retry_disable on GFX v9 */
179 extern int amdgpu_noretry;
180
181 /* Halt if HWS hang is detected */
182 extern int halt_if_hws_hang;
183
184 /* Whether MEC FW support GWS barriers */
185 extern bool hws_gws_support;
186
187 /* Queue preemption timeout in ms */
188 extern int queue_preemption_timeout_ms;
189
190 /*
191 * Don't evict process queues on vm fault
192 */
193 extern int amdgpu_no_queue_eviction_on_vm_fault;
194
195 /* Enable eviction debug messages */
196 extern bool debug_evictions;
197
198 extern struct mutex kfd_processes_mutex;
199
200 enum cache_policy {
201 cache_policy_coherent,
202 cache_policy_noncoherent
203 };
204
205 #define KFD_GC_VERSION(dev) (amdgpu_ip_version((dev)->adev, GC_HWIP, 0))
206 #define KFD_IS_SOC15(dev) ((KFD_GC_VERSION(dev)) >= (IP_VERSION(9, 0, 1)))
207 #define KFD_SUPPORT_XNACK_PER_PROCESS(dev)\
208 ((KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2)) || \
209 (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3)) || \
210 (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 4)))
211
212 struct kfd_node;
213
214 struct kfd_event_interrupt_class {
215 bool (*interrupt_isr)(struct kfd_node *dev,
216 const uint32_t *ih_ring_entry, uint32_t *patched_ihre,
217 bool *patched_flag);
218 void (*interrupt_wq)(struct kfd_node *dev,
219 const uint32_t *ih_ring_entry);
220 };
221
222 struct kfd_device_info {
223 uint32_t gfx_target_version;
224 const struct kfd_event_interrupt_class *event_interrupt_class;
225 unsigned int max_pasid_bits;
226 unsigned int max_no_of_hqd;
227 unsigned int doorbell_size;
228 size_t ih_ring_entry_size;
229 uint8_t num_of_watch_points;
230 uint16_t mqd_size_aligned;
231 bool supports_cwsr;
232 bool needs_pci_atomics;
233 uint32_t no_atomic_fw_version;
234 unsigned int num_sdma_queues_per_engine;
235 unsigned int num_reserved_sdma_queues_per_engine;
236 DECLARE_BITMAP(reserved_sdma_queues_bitmap, KFD_MAX_SDMA_QUEUES);
237 };
238
239 unsigned int kfd_get_num_sdma_engines(struct kfd_node *kdev);
240 unsigned int kfd_get_num_xgmi_sdma_engines(struct kfd_node *kdev);
241
242 struct kfd_mem_obj {
243 uint32_t range_start;
244 uint32_t range_end;
245 uint64_t gpu_addr;
246 uint32_t *cpu_ptr;
247 void *gtt_mem;
248 };
249
250 struct kfd_vmid_info {
251 uint32_t first_vmid_kfd;
252 uint32_t last_vmid_kfd;
253 uint32_t vmid_num_kfd;
254 };
255
256 #define MAX_KFD_NODES 8
257
258 struct kfd_dev;
259
260 struct kfd_node {
261 unsigned int node_id;
262 struct amdgpu_device *adev; /* Duplicated here along with keeping
263 * a copy in kfd_dev to save a hop
264 */
265 const struct kfd2kgd_calls *kfd2kgd; /* Duplicated here along with
266 * keeping a copy in kfd_dev to
267 * save a hop
268 */
269 struct kfd_vmid_info vm_info;
270 unsigned int id; /* topology stub index */
271 uint32_t xcc_mask; /* Instance mask of XCCs present */
272 struct amdgpu_xcp *xcp;
273
274 /* Interrupts */
275 struct kfifo ih_fifo;
276 struct workqueue_struct *ih_wq;
277 struct work_struct interrupt_work;
278 spinlock_t interrupt_lock;
279
280 /*
281 * Interrupts of interest to KFD are copied
282 * from the HW ring into a SW ring.
283 */
284 bool interrupts_active;
285 uint32_t interrupt_bitmap; /* Only used for GFX 9.4.3 */
286
287 /* QCM Device instance */
288 struct device_queue_manager *dqm;
289
290 /* Global GWS resource shared between processes */
291 void *gws;
292 bool gws_debug_workaround;
293
294 /* Clients watching SMI events */
295 struct list_head smi_clients;
296 spinlock_t smi_lock;
297 uint32_t reset_seq_num;
298
299 /* SRAM ECC flag */
300 atomic_t sram_ecc_flag;
301
302 /*spm process id */
303 unsigned int spm_pasid;
304
305 /* Maximum process number mapped to HW scheduler */
306 unsigned int max_proc_per_quantum;
307
308 unsigned int compute_vmid_bitmap;
309
310 struct kfd_local_mem_info local_mem_info;
311
312 struct kfd_dev *kfd;
313
314 /* Track per device allocated watch points */
315 uint32_t alloc_watch_ids;
316 spinlock_t watch_points_lock;
317 };
318
319 struct kfd_dev {
320 struct amdgpu_device *adev;
321
322 struct kfd_device_info device_info;
323
324 u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells
325 * page used by kernel queue
326 */
327
328 struct kgd2kfd_shared_resources shared_resources;
329
330 const struct kfd2kgd_calls *kfd2kgd;
331 struct mutex doorbell_mutex;
332
333 void *gtt_mem;
334 uint64_t gtt_start_gpu_addr;
335 void *gtt_start_cpu_ptr;
336 void *gtt_sa_bitmap;
337 struct mutex gtt_sa_lock;
338 unsigned int gtt_sa_chunk_size;
339 unsigned int gtt_sa_num_of_chunks;
340
341 bool init_complete;
342
343 /* Firmware versions */
344 uint16_t mec_fw_version;
345 uint16_t mec2_fw_version;
346 uint16_t sdma_fw_version;
347
348 /* CWSR */
349 bool cwsr_enabled;
350 const void *cwsr_isa;
351 unsigned int cwsr_isa_size;
352
353 /* xGMI */
354 uint64_t hive_id;
355
356 bool pci_atomic_requested;
357
358 /* Compute Profile ref. count */
359 atomic_t compute_profile;
360
361 struct ida doorbell_ida;
362 unsigned int max_doorbell_slices;
363
364 int noretry;
365
366 struct kfd_node *nodes[MAX_KFD_NODES];
367 unsigned int num_nodes;
368
369 /* Kernel doorbells for KFD device */
370 struct amdgpu_bo *doorbells;
371
372 /* bitmap for dynamic doorbell allocation from doorbell object */
373 unsigned long *doorbell_bitmap;
374 };
375
376 enum kfd_mempool {
377 KFD_MEMPOOL_SYSTEM_CACHEABLE = 1,
378 KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2,
379 KFD_MEMPOOL_FRAMEBUFFER = 3,
380 };
381
382 /* Character device interface */
383 int kfd_chardev_init(void);
384 void kfd_chardev_exit(void);
385
386 /**
387 * enum kfd_unmap_queues_filter - Enum for queue filters.
388 *
389 * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the
390 * running queues list.
391 *
392 * @KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES: Preempts all non-static queues
393 * in the run list.
394 *
395 * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to
396 * specific process.
397 *
398 */
399 enum kfd_unmap_queues_filter {
400 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES = 1,
401 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES = 2,
402 KFD_UNMAP_QUEUES_FILTER_BY_PASID = 3
403 };
404
405 /**
406 * enum kfd_queue_type - Enum for various queue types.
407 *
408 * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type.
409 *
410 * @KFD_QUEUE_TYPE_SDMA: SDMA user mode queue type.
411 *
412 * @KFD_QUEUE_TYPE_HIQ: HIQ queue type.
413 *
414 * @KFD_QUEUE_TYPE_DIQ: DIQ queue type.
415 *
416 * @KFD_QUEUE_TYPE_SDMA_XGMI: Special SDMA queue for XGMI interface.
417 *
418 * @KFD_QUEUE_TYPE_SDMA_BY_ENG_ID: SDMA user mode queue with target SDMA engine ID.
419 */
420 enum kfd_queue_type {
421 KFD_QUEUE_TYPE_COMPUTE,
422 KFD_QUEUE_TYPE_SDMA,
423 KFD_QUEUE_TYPE_HIQ,
424 KFD_QUEUE_TYPE_DIQ,
425 KFD_QUEUE_TYPE_SDMA_XGMI,
426 KFD_QUEUE_TYPE_SDMA_BY_ENG_ID
427 };
428
429 enum kfd_queue_format {
430 KFD_QUEUE_FORMAT_PM4,
431 KFD_QUEUE_FORMAT_AQL
432 };
433
434 enum KFD_QUEUE_PRIORITY {
435 KFD_QUEUE_PRIORITY_MINIMUM = 0,
436 KFD_QUEUE_PRIORITY_MAXIMUM = 15
437 };
438
439 /**
440 * struct queue_properties
441 *
442 * @type: The queue type.
443 *
444 * @queue_id: Queue identifier.
445 *
446 * @queue_address: Queue ring buffer address.
447 *
448 * @queue_size: Queue ring buffer size.
449 *
450 * @priority: Defines the queue priority relative to other queues in the
451 * process.
452 * This is just an indication and HW scheduling may override the priority as
453 * necessary while keeping the relative prioritization.
454 * the priority granularity is from 0 to f which f is the highest priority.
455 * currently all queues are initialized with the highest priority.
456 *
457 * @queue_percent: This field is partially implemented and currently a zero in
458 * this field defines that the queue is non active.
459 *
460 * @read_ptr: User space address which points to the number of dwords the
461 * cp read from the ring buffer. This field updates automatically by the H/W.
462 *
463 * @write_ptr: Defines the number of dwords written to the ring buffer.
464 *
465 * @doorbell_ptr: Notifies the H/W of new packet written to the queue ring
466 * buffer. This field should be similar to write_ptr and the user should
467 * update this field after updating the write_ptr.
468 *
469 * @doorbell_off: The doorbell offset in the doorbell pci-bar.
470 *
471 * @is_interop: Defines if this is a interop queue. Interop queue means that
472 * the queue can access both graphics and compute resources.
473 *
474 * @is_evicted: Defines if the queue is evicted. Only active queues
475 * are evicted, rendering them inactive.
476 *
477 * @is_active: Defines if the queue is active or not. @is_active and
478 * @is_evicted are protected by the DQM lock.
479 *
480 * @is_gws: Defines if the queue has been updated to be GWS-capable or not.
481 * @is_gws should be protected by the DQM lock, since changing it can yield the
482 * possibility of updating DQM state on number of GWS queues.
483 *
484 * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid
485 * of the queue.
486 *
487 * This structure represents the queue properties for each queue no matter if
488 * it's user mode or kernel mode queue.
489 *
490 */
491
492 struct queue_properties {
493 enum kfd_queue_type type;
494 enum kfd_queue_format format;
495 unsigned int queue_id;
496 uint64_t queue_address;
497 uint64_t queue_size;
498 uint32_t priority;
499 uint32_t queue_percent;
500 void __user *read_ptr;
501 void __user *write_ptr;
502 void __iomem *doorbell_ptr;
503 uint32_t doorbell_off;
504 bool is_interop;
505 bool is_evicted;
506 bool is_suspended;
507 bool is_being_destroyed;
508 bool is_active;
509 bool is_gws;
510 uint32_t pm4_target_xcc;
511 bool is_dbg_wa;
512 bool is_user_cu_masked;
513 /* Not relevant for user mode queues in cp scheduling */
514 unsigned int vmid;
515 /* Relevant only for sdma queues*/
516 uint32_t sdma_engine_id;
517 uint32_t sdma_queue_id;
518 uint32_t sdma_vm_addr;
519 /* Relevant only for VI */
520 uint64_t eop_ring_buffer_address;
521 uint32_t eop_ring_buffer_size;
522 uint64_t ctx_save_restore_area_address;
523 uint32_t ctx_save_restore_area_size;
524 uint32_t ctl_stack_size;
525 uint64_t tba_addr;
526 uint64_t tma_addr;
527 uint64_t exception_status;
528
529 struct amdgpu_bo *wptr_bo;
530 struct amdgpu_bo *rptr_bo;
531 struct amdgpu_bo *ring_bo;
532 struct amdgpu_bo *eop_buf_bo;
533 struct amdgpu_bo *cwsr_bo;
534 };
535
536 #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 && \
537 (q).queue_address != 0 && \
538 (q).queue_percent > 0 && \
539 !(q).is_evicted && \
540 !(q).is_suspended)
541
542 enum mqd_update_flag {
543 UPDATE_FLAG_DBG_WA_ENABLE = 1,
544 UPDATE_FLAG_DBG_WA_DISABLE = 2,
545 UPDATE_FLAG_IS_GWS = 4, /* quirk for gfx9 IP */
546 };
547
548 struct mqd_update_info {
549 union {
550 struct {
551 uint32_t count; /* Must be a multiple of 32 */
552 uint32_t *ptr;
553 } cu_mask;
554 };
555 enum mqd_update_flag update_flag;
556 };
557
558 /**
559 * struct queue
560 *
561 * @list: Queue linked list.
562 *
563 * @mqd: The queue MQD (memory queue descriptor).
564 *
565 * @mqd_mem_obj: The MQD local gpu memory object.
566 *
567 * @gart_mqd_addr: The MQD gart mc address.
568 *
569 * @properties: The queue properties.
570 *
571 * @mec: Used only in no cp scheduling mode and identifies to micro engine id
572 * that the queue should be executed on.
573 *
574 * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe
575 * id.
576 *
577 * @queue: Used only in no cp scheduliong mode and identifies the queue's slot.
578 *
579 * @process: The kfd process that created this queue.
580 *
581 * @device: The kfd device that created this queue.
582 *
583 * @gws: Pointing to gws kgd_mem if this is a gws control queue; NULL
584 * otherwise.
585 *
586 * This structure represents user mode compute queues.
587 * It contains all the necessary data to handle such queues.
588 *
589 */
590
591 struct queue {
592 struct list_head list;
593 void *mqd;
594 struct kfd_mem_obj *mqd_mem_obj;
595 uint64_t gart_mqd_addr;
596 struct queue_properties properties;
597
598 uint32_t mec;
599 uint32_t pipe;
600 uint32_t queue;
601
602 unsigned int sdma_id;
603 unsigned int doorbell_id;
604
605 struct kfd_process *process;
606 struct kfd_node *device;
607 void *gws;
608
609 /* procfs */
610 struct kobject kobj;
611
612 void *gang_ctx_bo;
613 uint64_t gang_ctx_gpu_addr;
614 void *gang_ctx_cpu_ptr;
615
616 struct amdgpu_bo *wptr_bo_gart;
617 };
618
619 enum KFD_MQD_TYPE {
620 KFD_MQD_TYPE_HIQ = 0, /* for hiq */
621 KFD_MQD_TYPE_CP, /* for cp queues and diq */
622 KFD_MQD_TYPE_SDMA, /* for sdma queues */
623 KFD_MQD_TYPE_DIQ, /* for diq */
624 KFD_MQD_TYPE_MAX
625 };
626
627 enum KFD_PIPE_PRIORITY {
628 KFD_PIPE_PRIORITY_CS_LOW = 0,
629 KFD_PIPE_PRIORITY_CS_MEDIUM,
630 KFD_PIPE_PRIORITY_CS_HIGH
631 };
632
633 struct scheduling_resources {
634 unsigned int vmid_mask;
635 enum kfd_queue_type type;
636 uint64_t queue_mask;
637 uint64_t gws_mask;
638 uint32_t oac_mask;
639 uint32_t gds_heap_base;
640 uint32_t gds_heap_size;
641 };
642
643 struct process_queue_manager {
644 /* data */
645 struct kfd_process *process;
646 struct list_head queues;
647 unsigned long *queue_slot_bitmap;
648 };
649
650 struct qcm_process_device {
651 /* The Device Queue Manager that owns this data */
652 struct device_queue_manager *dqm;
653 struct process_queue_manager *pqm;
654 /* Queues list */
655 struct list_head queues_list;
656 struct list_head priv_queue_list;
657
658 unsigned int queue_count;
659 unsigned int vmid;
660 bool is_debug;
661 unsigned int evicted; /* eviction counter, 0=active */
662
663 /* This flag tells if we should reset all wavefronts on
664 * process termination
665 */
666 bool reset_wavefronts;
667
668 /* This flag tells us if this process has a GWS-capable
669 * queue that will be mapped into the runlist. It's
670 * possible to request a GWS BO, but not have the queue
671 * currently mapped, and this changes how the MAP_PROCESS
672 * PM4 packet is configured.
673 */
674 bool mapped_gws_queue;
675
676 /* All the memory management data should be here too */
677 uint64_t gds_context_area;
678 /* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */
679 uint64_t page_table_base;
680 uint32_t sh_mem_config;
681 uint32_t sh_mem_bases;
682 uint32_t sh_mem_ape1_base;
683 uint32_t sh_mem_ape1_limit;
684 uint32_t gds_size;
685 uint32_t num_gws;
686 uint32_t num_oac;
687 uint32_t sh_hidden_private_base;
688
689 /* CWSR memory */
690 struct kgd_mem *cwsr_mem;
691 void *cwsr_kaddr;
692 uint64_t cwsr_base;
693 uint64_t tba_addr;
694 uint64_t tma_addr;
695
696 /* IB memory */
697 struct kgd_mem *ib_mem;
698 uint64_t ib_base;
699 void *ib_kaddr;
700
701 /* doorbells for kfd process */
702 struct amdgpu_bo *proc_doorbells;
703
704 /* bitmap for dynamic doorbell allocation from the bo */
705 unsigned long *doorbell_bitmap;
706 };
707
708 /* KFD Memory Eviction */
709
710 /* Approx. wait time before attempting to restore evicted BOs */
711 #define PROCESS_RESTORE_TIME_MS 100
712 /* Approx. back off time if restore fails due to lack of memory */
713 #define PROCESS_BACK_OFF_TIME_MS 100
714 /* Approx. time before evicting the process again */
715 #define PROCESS_ACTIVE_TIME_MS 10
716
717 /* 8 byte handle containing GPU ID in the most significant 4 bytes and
718 * idr_handle in the least significant 4 bytes
719 */
720 #define MAKE_HANDLE(gpu_id, idr_handle) \
721 (((uint64_t)(gpu_id) << 32) + idr_handle)
722 #define GET_GPU_ID(handle) (handle >> 32)
723 #define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF)
724
725 enum kfd_pdd_bound {
726 PDD_UNBOUND = 0,
727 PDD_BOUND,
728 PDD_BOUND_SUSPENDED,
729 };
730
731 #define MAX_SYSFS_FILENAME_LEN 15
732
733 /*
734 * SDMA counter runs at 100MHz frequency.
735 * We display SDMA activity in microsecond granularity in sysfs.
736 * As a result, the divisor is 100.
737 */
738 #define SDMA_ACTIVITY_DIVISOR 100
739
740 /* Data that is per-process-per device. */
741 struct kfd_process_device {
742 /* The device that owns this data. */
743 struct kfd_node *dev;
744
745 /* The process that owns this kfd_process_device. */
746 struct kfd_process *process;
747
748 /* per-process-per device QCM data structure */
749 struct qcm_process_device qpd;
750
751 /*Apertures*/
752 uint64_t lds_base;
753 uint64_t lds_limit;
754 uint64_t gpuvm_base;
755 uint64_t gpuvm_limit;
756 uint64_t scratch_base;
757 uint64_t scratch_limit;
758
759 /* VM context for GPUVM allocations */
760 struct file *drm_file;
761 void *drm_priv;
762
763 /* GPUVM allocations storage */
764 struct idr alloc_idr;
765
766 /* Flag used to tell the pdd has dequeued from the dqm.
767 * This is used to prevent dev->dqm->ops.process_termination() from
768 * being called twice when it is already called in IOMMU callback
769 * function.
770 */
771 bool already_dequeued;
772 bool runtime_inuse;
773
774 /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */
775 enum kfd_pdd_bound bound;
776
777 /* VRAM usage */
778 atomic64_t vram_usage;
779 struct attribute attr_vram;
780 char vram_filename[MAX_SYSFS_FILENAME_LEN];
781
782 /* SDMA activity tracking */
783 uint64_t sdma_past_activity_counter;
784 struct attribute attr_sdma;
785 char sdma_filename[MAX_SYSFS_FILENAME_LEN];
786
787 /* Eviction activity tracking */
788 uint64_t last_evict_timestamp;
789 atomic64_t evict_duration_counter;
790 struct attribute attr_evict;
791
792 struct kobject *kobj_stats;
793
794 /*
795 * @cu_occupancy: Reports occupancy of Compute Units (CU) of a process
796 * that is associated with device encoded by "this" struct instance. The
797 * value reflects CU usage by all of the waves launched by this process
798 * on this device. A very important property of occupancy parameter is
799 * that its value is a snapshot of current use.
800 *
801 * Following is to be noted regarding how this parameter is reported:
802 *
803 * The number of waves that a CU can launch is limited by couple of
804 * parameters. These are encoded by struct amdgpu_cu_info instance
805 * that is part of every device definition. For GFX9 devices this
806 * translates to 40 waves (simd_per_cu * max_waves_per_simd) when waves
807 * do not use scratch memory and 32 waves (max_scratch_slots_per_cu)
808 * when they do use scratch memory. This could change for future
809 * devices and therefore this example should be considered as a guide.
810 *
811 * All CU's of a device are available for the process. This may not be true
812 * under certain conditions - e.g. CU masking.
813 *
814 * Finally number of CU's that are occupied by a process is affected by both
815 * number of CU's a device has along with number of other competing processes
816 */
817 struct attribute attr_cu_occupancy;
818
819 /* sysfs counters for GPU retry fault and page migration tracking */
820 struct kobject *kobj_counters;
821 struct attribute attr_faults;
822 struct attribute attr_page_in;
823 struct attribute attr_page_out;
824 uint64_t faults;
825 uint64_t page_in;
826 uint64_t page_out;
827
828 /* Exception code status*/
829 uint64_t exception_status;
830 void *vm_fault_exc_data;
831 size_t vm_fault_exc_data_size;
832
833 /* Tracks debug per-vmid request settings */
834 uint32_t spi_dbg_override;
835 uint32_t spi_dbg_launch_mode;
836 uint32_t watch_points[4];
837 uint32_t alloc_watch_ids;
838
839 /*
840 * If this process has been checkpointed before, then the user
841 * application will use the original gpu_id on the
842 * checkpointed node to refer to this device.
843 */
844 uint32_t user_gpu_id;
845
846 void *proc_ctx_bo;
847 uint64_t proc_ctx_gpu_addr;
848 void *proc_ctx_cpu_ptr;
849
850 /* Tracks queue reset status */
851 bool has_reset_queue;
852 };
853
854 #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd)
855
856 struct svm_range_list {
857 struct mutex lock;
858 struct rb_root_cached objects;
859 struct list_head list;
860 struct work_struct deferred_list_work;
861 struct list_head deferred_range_list;
862 struct list_head criu_svm_metadata_list;
863 spinlock_t deferred_list_lock;
864 atomic_t evicted_ranges;
865 atomic_t drain_pagefaults;
866 struct delayed_work restore_work;
867 DECLARE_BITMAP(bitmap_supported, MAX_GPU_INSTANCE);
868 struct task_struct *faulting_task;
869 /* check point ts decides if page fault recovery need be dropped */
870 uint64_t checkpoint_ts[MAX_GPU_INSTANCE];
871
872 /* Default granularity to use in buffer migration
873 * and restoration of backing memory while handling
874 * recoverable page faults
875 */
876 uint8_t default_granularity;
877 };
878
879 /* Process data */
880 struct kfd_process {
881 /*
882 * kfd_process are stored in an mm_struct*->kfd_process*
883 * hash table (kfd_processes in kfd_process.c)
884 */
885 struct hlist_node kfd_processes;
886
887 /*
888 * Opaque pointer to mm_struct. We don't hold a reference to
889 * it so it should never be dereferenced from here. This is
890 * only used for looking up processes by their mm.
891 */
892 void *mm;
893
894 struct kref ref;
895 struct work_struct release_work;
896
897 struct mutex mutex;
898
899 /*
900 * In any process, the thread that started main() is the lead
901 * thread and outlives the rest.
902 * It is here because amd_iommu_bind_pasid wants a task_struct.
903 * It can also be used for safely getting a reference to the
904 * mm_struct of the process.
905 */
906 struct task_struct *lead_thread;
907
908 /* We want to receive a notification when the mm_struct is destroyed */
909 struct mmu_notifier mmu_notifier;
910
911 u32 pasid;
912
913 /*
914 * Array of kfd_process_device pointers,
915 * one for each device the process is using.
916 */
917 struct kfd_process_device *pdds[MAX_GPU_INSTANCE];
918 uint32_t n_pdds;
919
920 struct process_queue_manager pqm;
921
922 /*Is the user space process 32 bit?*/
923 bool is_32bit_user_mode;
924
925 /* Event-related data */
926 struct mutex event_mutex;
927 /* Event ID allocator and lookup */
928 struct idr event_idr;
929 /* Event page */
930 u64 signal_handle;
931 struct kfd_signal_page *signal_page;
932 size_t signal_mapped_size;
933 size_t signal_event_count;
934 bool signal_event_limit_reached;
935
936 /* Information used for memory eviction */
937 void *kgd_process_info;
938 /* Eviction fence that is attached to all the BOs of this process. The
939 * fence will be triggered during eviction and new one will be created
940 * during restore
941 */
942 struct dma_fence __rcu *ef;
943
944 /* Work items for evicting and restoring BOs */
945 struct delayed_work eviction_work;
946 struct delayed_work restore_work;
947 /* seqno of the last scheduled eviction */
948 unsigned int last_eviction_seqno;
949 /* Approx. the last timestamp (in jiffies) when the process was
950 * restored after an eviction
951 */
952 unsigned long last_restore_timestamp;
953
954 /* Indicates device process is debug attached with reserved vmid. */
955 bool debug_trap_enabled;
956
957 /* per-process-per device debug event fd file */
958 struct file *dbg_ev_file;
959
960 /* If the process is a kfd debugger, we need to know so we can clean
961 * up at exit time. If a process enables debugging on itself, it does
962 * its own clean-up, so we don't set the flag here. We track this by
963 * counting the number of processes this process is debugging.
964 */
965 atomic_t debugged_process_count;
966
967 /* If the process is a debugged, this is the debugger process */
968 struct kfd_process *debugger_process;
969
970 /* Kobj for our procfs */
971 struct kobject *kobj;
972 struct kobject *kobj_queues;
973 struct attribute attr_pasid;
974
975 /* Keep track cwsr init */
976 bool has_cwsr;
977
978 /* Exception code enable mask and status */
979 uint64_t exception_enable_mask;
980 uint64_t exception_status;
981
982 /* Used to drain stale interrupts */
983 wait_queue_head_t wait_irq_drain;
984 bool irq_drain_is_open;
985
986 /* shared virtual memory registered by this process */
987 struct svm_range_list svms;
988
989 bool xnack_enabled;
990
991 /* Work area for debugger event writer worker. */
992 struct work_struct debug_event_workarea;
993
994 /* Tracks debug per-vmid request for debug flags */
995 u32 dbg_flags;
996
997 atomic_t poison;
998 /* Queues are in paused stated because we are in the process of doing a CRIU checkpoint */
999 bool queues_paused;
1000
1001 /* Tracks runtime enable status */
1002 struct semaphore runtime_enable_sema;
1003 bool is_runtime_retry;
1004 struct kfd_runtime_info runtime_info;
1005 };
1006
1007 #define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */
1008 extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE);
1009 extern struct srcu_struct kfd_processes_srcu;
1010
1011 /**
1012 * typedef amdkfd_ioctl_t - typedef for ioctl function pointer.
1013 *
1014 * @filep: pointer to file structure.
1015 * @p: amdkfd process pointer.
1016 * @data: pointer to arg that was copied from user.
1017 *
1018 * Return: returns ioctl completion code.
1019 */
1020 typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p,
1021 void *data);
1022
1023 struct amdkfd_ioctl_desc {
1024 unsigned int cmd;
1025 int flags;
1026 amdkfd_ioctl_t *func;
1027 unsigned int cmd_drv;
1028 const char *name;
1029 };
1030 bool kfd_dev_is_large_bar(struct kfd_node *dev);
1031
1032 int kfd_process_create_wq(void);
1033 void kfd_process_destroy_wq(void);
1034 void kfd_cleanup_processes(void);
1035 struct kfd_process *kfd_create_process(struct task_struct *thread);
1036 struct kfd_process *kfd_get_process(const struct task_struct *task);
1037 struct kfd_process *kfd_lookup_process_by_pasid(u32 pasid);
1038 struct kfd_process *kfd_lookup_process_by_mm(const struct mm_struct *mm);
1039
1040 int kfd_process_gpuidx_from_gpuid(struct kfd_process *p, uint32_t gpu_id);
1041 int kfd_process_gpuid_from_node(struct kfd_process *p, struct kfd_node *node,
1042 uint32_t *gpuid, uint32_t *gpuidx);
kfd_process_gpuid_from_gpuidx(struct kfd_process * p,uint32_t gpuidx,uint32_t * gpuid)1043 static inline int kfd_process_gpuid_from_gpuidx(struct kfd_process *p,
1044 uint32_t gpuidx, uint32_t *gpuid) {
1045 return gpuidx < p->n_pdds ? p->pdds[gpuidx]->dev->id : -EINVAL;
1046 }
kfd_process_device_from_gpuidx(struct kfd_process * p,uint32_t gpuidx)1047 static inline struct kfd_process_device *kfd_process_device_from_gpuidx(
1048 struct kfd_process *p, uint32_t gpuidx) {
1049 return gpuidx < p->n_pdds ? p->pdds[gpuidx] : NULL;
1050 }
1051
1052 void kfd_unref_process(struct kfd_process *p);
1053 int kfd_process_evict_queues(struct kfd_process *p, uint32_t trigger);
1054 int kfd_process_restore_queues(struct kfd_process *p);
1055 void kfd_suspend_all_processes(void);
1056 int kfd_resume_all_processes(void);
1057
1058 struct kfd_process_device *kfd_process_device_data_by_id(struct kfd_process *process,
1059 uint32_t gpu_id);
1060
1061 int kfd_process_get_user_gpu_id(struct kfd_process *p, uint32_t actual_gpu_id);
1062
1063 int kfd_process_device_init_vm(struct kfd_process_device *pdd,
1064 struct file *drm_file);
1065 struct kfd_process_device *kfd_bind_process_to_device(struct kfd_node *dev,
1066 struct kfd_process *p);
1067 struct kfd_process_device *kfd_get_process_device_data(struct kfd_node *dev,
1068 struct kfd_process *p);
1069 struct kfd_process_device *kfd_create_process_device_data(struct kfd_node *dev,
1070 struct kfd_process *p);
1071
1072 bool kfd_process_xnack_mode(struct kfd_process *p, bool supported);
1073
1074 int kfd_reserved_mem_mmap(struct kfd_node *dev, struct kfd_process *process,
1075 struct vm_area_struct *vma);
1076
1077 /* KFD process API for creating and translating handles */
1078 int kfd_process_device_create_obj_handle(struct kfd_process_device *pdd,
1079 void *mem);
1080 void *kfd_process_device_translate_handle(struct kfd_process_device *p,
1081 int handle);
1082 void kfd_process_device_remove_obj_handle(struct kfd_process_device *pdd,
1083 int handle);
1084 struct kfd_process *kfd_lookup_process_by_pid(struct pid *pid);
1085
1086 /* PASIDs */
1087 int kfd_pasid_init(void);
1088 void kfd_pasid_exit(void);
1089 bool kfd_set_pasid_limit(unsigned int new_limit);
1090 unsigned int kfd_get_pasid_limit(void);
1091 u32 kfd_pasid_alloc(void);
1092 void kfd_pasid_free(u32 pasid);
1093
1094 /* Doorbells */
1095 size_t kfd_doorbell_process_slice(struct kfd_dev *kfd);
1096 int kfd_doorbell_init(struct kfd_dev *kfd);
1097 void kfd_doorbell_fini(struct kfd_dev *kfd);
1098 int kfd_doorbell_mmap(struct kfd_node *dev, struct kfd_process *process,
1099 struct vm_area_struct *vma);
1100 void __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd,
1101 unsigned int *doorbell_off);
1102 void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr);
1103 u32 read_kernel_doorbell(u32 __iomem *db);
1104 void write_kernel_doorbell(void __iomem *db, u32 value);
1105 void write_kernel_doorbell64(void __iomem *db, u64 value);
1106 unsigned int kfd_get_doorbell_dw_offset_in_bar(struct kfd_dev *kfd,
1107 struct kfd_process_device *pdd,
1108 unsigned int doorbell_id);
1109 phys_addr_t kfd_get_process_doorbells(struct kfd_process_device *pdd);
1110 int kfd_alloc_process_doorbells(struct kfd_dev *kfd,
1111 struct kfd_process_device *pdd);
1112 void kfd_free_process_doorbells(struct kfd_dev *kfd,
1113 struct kfd_process_device *pdd);
1114 /* GTT Sub-Allocator */
1115
1116 int kfd_gtt_sa_allocate(struct kfd_node *node, unsigned int size,
1117 struct kfd_mem_obj **mem_obj);
1118
1119 int kfd_gtt_sa_free(struct kfd_node *node, struct kfd_mem_obj *mem_obj);
1120
1121 extern struct device *kfd_device;
1122
1123 /* KFD's procfs */
1124 void kfd_procfs_init(void);
1125 void kfd_procfs_shutdown(void);
1126 int kfd_procfs_add_queue(struct queue *q);
1127 void kfd_procfs_del_queue(struct queue *q);
1128
1129 /* Topology */
1130 int kfd_topology_init(void);
1131 void kfd_topology_shutdown(void);
1132 int kfd_topology_add_device(struct kfd_node *gpu);
1133 int kfd_topology_remove_device(struct kfd_node *gpu);
1134 struct kfd_topology_device *kfd_topology_device_by_proximity_domain(
1135 uint32_t proximity_domain);
1136 struct kfd_topology_device *kfd_topology_device_by_proximity_domain_no_lock(
1137 uint32_t proximity_domain);
1138 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id);
1139 struct kfd_node *kfd_device_by_id(uint32_t gpu_id);
1140 struct kfd_node *kfd_device_by_pci_dev(const struct pci_dev *pdev);
kfd_irq_is_from_node(struct kfd_node * node,uint32_t node_id,uint32_t vmid)1141 static inline bool kfd_irq_is_from_node(struct kfd_node *node, uint32_t node_id,
1142 uint32_t vmid)
1143 {
1144 return (node->interrupt_bitmap & (1 << node_id)) != 0 &&
1145 (node->compute_vmid_bitmap & (1 << vmid)) != 0;
1146 }
kfd_node_by_irq_ids(struct amdgpu_device * adev,uint32_t node_id,uint32_t vmid)1147 static inline struct kfd_node *kfd_node_by_irq_ids(struct amdgpu_device *adev,
1148 uint32_t node_id, uint32_t vmid) {
1149 struct kfd_dev *dev = adev->kfd.dev;
1150 uint32_t i;
1151
1152 if (KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 3) &&
1153 KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 4))
1154 return dev->nodes[0];
1155
1156 for (i = 0; i < dev->num_nodes; i++)
1157 if (kfd_irq_is_from_node(dev->nodes[i], node_id, vmid))
1158 return dev->nodes[i];
1159
1160 return NULL;
1161 }
1162 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_node **kdev);
1163 int kfd_numa_node_to_apic_id(int numa_node_id);
1164
1165 /* Interrupts */
1166 #define KFD_IRQ_FENCE_CLIENTID 0xff
1167 #define KFD_IRQ_FENCE_SOURCEID 0xff
1168 #define KFD_IRQ_IS_FENCE(client, source) \
1169 ((client) == KFD_IRQ_FENCE_CLIENTID && \
1170 (source) == KFD_IRQ_FENCE_SOURCEID)
1171 int kfd_interrupt_init(struct kfd_node *dev);
1172 void kfd_interrupt_exit(struct kfd_node *dev);
1173 bool enqueue_ih_ring_entry(struct kfd_node *kfd, const void *ih_ring_entry);
1174 bool interrupt_is_wanted(struct kfd_node *dev,
1175 const uint32_t *ih_ring_entry,
1176 uint32_t *patched_ihre, bool *flag);
1177 int kfd_process_drain_interrupts(struct kfd_process_device *pdd);
1178 void kfd_process_close_interrupt_drain(unsigned int pasid);
1179
1180 /* amdkfd Apertures */
1181 int kfd_init_apertures(struct kfd_process *process);
1182
1183 void kfd_process_set_trap_handler(struct qcm_process_device *qpd,
1184 uint64_t tba_addr,
1185 uint64_t tma_addr);
1186 void kfd_process_set_trap_debug_flag(struct qcm_process_device *qpd,
1187 bool enabled);
1188
1189 /* CWSR initialization */
1190 int kfd_process_init_cwsr_apu(struct kfd_process *process, struct file *filep);
1191
1192 /* CRIU */
1193 /*
1194 * Need to increment KFD_CRIU_PRIV_VERSION each time a change is made to any of the CRIU private
1195 * structures:
1196 * kfd_criu_process_priv_data
1197 * kfd_criu_device_priv_data
1198 * kfd_criu_bo_priv_data
1199 * kfd_criu_queue_priv_data
1200 * kfd_criu_event_priv_data
1201 * kfd_criu_svm_range_priv_data
1202 */
1203
1204 #define KFD_CRIU_PRIV_VERSION 1
1205
1206 struct kfd_criu_process_priv_data {
1207 uint32_t version;
1208 uint32_t xnack_mode;
1209 };
1210
1211 struct kfd_criu_device_priv_data {
1212 /* For future use */
1213 uint64_t reserved;
1214 };
1215
1216 struct kfd_criu_bo_priv_data {
1217 uint64_t user_addr;
1218 uint32_t idr_handle;
1219 uint32_t mapped_gpuids[MAX_GPU_INSTANCE];
1220 };
1221
1222 /*
1223 * The first 4 bytes of kfd_criu_queue_priv_data, kfd_criu_event_priv_data,
1224 * kfd_criu_svm_range_priv_data is the object type
1225 */
1226 enum kfd_criu_object_type {
1227 KFD_CRIU_OBJECT_TYPE_QUEUE,
1228 KFD_CRIU_OBJECT_TYPE_EVENT,
1229 KFD_CRIU_OBJECT_TYPE_SVM_RANGE,
1230 };
1231
1232 struct kfd_criu_svm_range_priv_data {
1233 uint32_t object_type;
1234 uint64_t start_addr;
1235 uint64_t size;
1236 /* Variable length array of attributes */
1237 struct kfd_ioctl_svm_attribute attrs[];
1238 };
1239
1240 struct kfd_criu_queue_priv_data {
1241 uint32_t object_type;
1242 uint64_t q_address;
1243 uint64_t q_size;
1244 uint64_t read_ptr_addr;
1245 uint64_t write_ptr_addr;
1246 uint64_t doorbell_off;
1247 uint64_t eop_ring_buffer_address;
1248 uint64_t ctx_save_restore_area_address;
1249 uint32_t gpu_id;
1250 uint32_t type;
1251 uint32_t format;
1252 uint32_t q_id;
1253 uint32_t priority;
1254 uint32_t q_percent;
1255 uint32_t doorbell_id;
1256 uint32_t gws;
1257 uint32_t sdma_id;
1258 uint32_t eop_ring_buffer_size;
1259 uint32_t ctx_save_restore_area_size;
1260 uint32_t ctl_stack_size;
1261 uint32_t mqd_size;
1262 };
1263
1264 struct kfd_criu_event_priv_data {
1265 uint32_t object_type;
1266 uint64_t user_handle;
1267 uint32_t event_id;
1268 uint32_t auto_reset;
1269 uint32_t type;
1270 uint32_t signaled;
1271
1272 union {
1273 struct kfd_hsa_memory_exception_data memory_exception_data;
1274 struct kfd_hsa_hw_exception_data hw_exception_data;
1275 };
1276 };
1277
1278 int kfd_process_get_queue_info(struct kfd_process *p,
1279 uint32_t *num_queues,
1280 uint64_t *priv_data_sizes);
1281
1282 int kfd_criu_checkpoint_queues(struct kfd_process *p,
1283 uint8_t __user *user_priv_data,
1284 uint64_t *priv_data_offset);
1285
1286 int kfd_criu_restore_queue(struct kfd_process *p,
1287 uint8_t __user *user_priv_data,
1288 uint64_t *priv_data_offset,
1289 uint64_t max_priv_data_size);
1290
1291 int kfd_criu_checkpoint_events(struct kfd_process *p,
1292 uint8_t __user *user_priv_data,
1293 uint64_t *priv_data_offset);
1294
1295 int kfd_criu_restore_event(struct file *devkfd,
1296 struct kfd_process *p,
1297 uint8_t __user *user_priv_data,
1298 uint64_t *priv_data_offset,
1299 uint64_t max_priv_data_size);
1300 /* CRIU - End */
1301
1302 /* Queue Context Management */
1303 int init_queue(struct queue **q, const struct queue_properties *properties);
1304 void uninit_queue(struct queue *q);
1305 void print_queue_properties(struct queue_properties *q);
1306 void print_queue(struct queue *q);
1307 int kfd_queue_buffer_get(struct amdgpu_vm *vm, void __user *addr, struct amdgpu_bo **pbo,
1308 u64 expected_size);
1309 void kfd_queue_buffer_put(struct amdgpu_bo **bo);
1310 int kfd_queue_acquire_buffers(struct kfd_process_device *pdd, struct queue_properties *properties);
1311 int kfd_queue_release_buffers(struct kfd_process_device *pdd, struct queue_properties *properties);
1312 void kfd_queue_unref_bo_va(struct amdgpu_vm *vm, struct amdgpu_bo **bo);
1313 int kfd_queue_unref_bo_vas(struct kfd_process_device *pdd,
1314 struct queue_properties *properties);
1315 void kfd_queue_ctx_save_restore_size(struct kfd_topology_device *dev);
1316
1317 struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type,
1318 struct kfd_node *dev);
1319 struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type,
1320 struct kfd_node *dev);
1321 struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type,
1322 struct kfd_node *dev);
1323 struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type,
1324 struct kfd_node *dev);
1325 struct mqd_manager *mqd_manager_init_v11(enum KFD_MQD_TYPE type,
1326 struct kfd_node *dev);
1327 struct mqd_manager *mqd_manager_init_v12(enum KFD_MQD_TYPE type,
1328 struct kfd_node *dev);
1329 struct device_queue_manager *device_queue_manager_init(struct kfd_node *dev);
1330 void device_queue_manager_uninit(struct device_queue_manager *dqm);
1331 struct kernel_queue *kernel_queue_init(struct kfd_node *dev,
1332 enum kfd_queue_type type);
1333 void kernel_queue_uninit(struct kernel_queue *kq);
1334 int kfd_dqm_evict_pasid(struct device_queue_manager *dqm, u32 pasid);
1335 int kfd_dqm_suspend_bad_queue_mes(struct kfd_node *knode, u32 pasid, u32 doorbell_id);
1336
1337 /* Process Queue Manager */
1338 struct process_queue_node {
1339 struct queue *q;
1340 struct kernel_queue *kq;
1341 struct list_head process_queue_list;
1342 };
1343
1344 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd);
1345 void kfd_process_dequeue_from_all_devices(struct kfd_process *p);
1346 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p);
1347 void pqm_uninit(struct process_queue_manager *pqm);
1348 int pqm_create_queue(struct process_queue_manager *pqm,
1349 struct kfd_node *dev,
1350 struct queue_properties *properties,
1351 unsigned int *qid,
1352 const struct kfd_criu_queue_priv_data *q_data,
1353 const void *restore_mqd,
1354 const void *restore_ctl_stack,
1355 uint32_t *p_doorbell_offset_in_process);
1356 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid);
1357 int pqm_update_queue_properties(struct process_queue_manager *pqm, unsigned int qid,
1358 struct queue_properties *p);
1359 int pqm_update_mqd(struct process_queue_manager *pqm, unsigned int qid,
1360 struct mqd_update_info *minfo);
1361 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid,
1362 void *gws);
1363 struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm,
1364 unsigned int qid);
1365 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm,
1366 unsigned int qid);
1367 int pqm_get_wave_state(struct process_queue_manager *pqm,
1368 unsigned int qid,
1369 void __user *ctl_stack,
1370 u32 *ctl_stack_used_size,
1371 u32 *save_area_used_size);
1372 int pqm_get_queue_snapshot(struct process_queue_manager *pqm,
1373 uint64_t exception_clear_mask,
1374 void __user *buf,
1375 int *num_qss_entries,
1376 uint32_t *entry_size);
1377
1378 int amdkfd_fence_wait_timeout(struct device_queue_manager *dqm,
1379 uint64_t fence_value,
1380 unsigned int timeout_ms);
1381
1382 int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm,
1383 unsigned int qid,
1384 u32 *mqd_size,
1385 u32 *ctl_stack_size);
1386 /* Packet Manager */
1387
1388 #define KFD_FENCE_COMPLETED (100)
1389 #define KFD_FENCE_INIT (10)
1390
1391 struct packet_manager {
1392 struct device_queue_manager *dqm;
1393 struct kernel_queue *priv_queue;
1394 struct mutex lock;
1395 bool allocated;
1396 struct kfd_mem_obj *ib_buffer_obj;
1397 unsigned int ib_size_bytes;
1398 bool is_over_subscription;
1399
1400 const struct packet_manager_funcs *pmf;
1401 };
1402
1403 struct packet_manager_funcs {
1404 /* Support ASIC-specific packet formats for PM4 packets */
1405 int (*map_process)(struct packet_manager *pm, uint32_t *buffer,
1406 struct qcm_process_device *qpd);
1407 int (*runlist)(struct packet_manager *pm, uint32_t *buffer,
1408 uint64_t ib, size_t ib_size_in_dwords, bool chain);
1409 int (*set_resources)(struct packet_manager *pm, uint32_t *buffer,
1410 struct scheduling_resources *res);
1411 int (*map_queues)(struct packet_manager *pm, uint32_t *buffer,
1412 struct queue *q, bool is_static);
1413 int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer,
1414 enum kfd_unmap_queues_filter mode,
1415 uint32_t filter_param, bool reset);
1416 int (*set_grace_period)(struct packet_manager *pm, uint32_t *buffer,
1417 uint32_t grace_period);
1418 int (*query_status)(struct packet_manager *pm, uint32_t *buffer,
1419 uint64_t fence_address, uint64_t fence_value);
1420 int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer);
1421
1422 /* Packet sizes */
1423 int map_process_size;
1424 int runlist_size;
1425 int set_resources_size;
1426 int map_queues_size;
1427 int unmap_queues_size;
1428 int set_grace_period_size;
1429 int query_status_size;
1430 int release_mem_size;
1431 };
1432
1433 extern const struct packet_manager_funcs kfd_vi_pm_funcs;
1434 extern const struct packet_manager_funcs kfd_v9_pm_funcs;
1435 extern const struct packet_manager_funcs kfd_aldebaran_pm_funcs;
1436
1437 int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm);
1438 void pm_uninit(struct packet_manager *pm);
1439 int pm_send_set_resources(struct packet_manager *pm,
1440 struct scheduling_resources *res);
1441 int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues);
1442 int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address,
1443 uint64_t fence_value);
1444
1445 int pm_send_unmap_queue(struct packet_manager *pm,
1446 enum kfd_unmap_queues_filter mode,
1447 uint32_t filter_param, bool reset);
1448
1449 void pm_release_ib(struct packet_manager *pm);
1450
1451 int pm_update_grace_period(struct packet_manager *pm, uint32_t grace_period);
1452
1453 /* Following PM funcs can be shared among VI and AI */
1454 unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size);
1455
1456 uint64_t kfd_get_number_elems(struct kfd_dev *kfd);
1457
1458 /* Events */
1459 extern const struct kfd_event_interrupt_class event_interrupt_class_cik;
1460 extern const struct kfd_event_interrupt_class event_interrupt_class_v9;
1461 extern const struct kfd_event_interrupt_class event_interrupt_class_v9_4_3;
1462 extern const struct kfd_event_interrupt_class event_interrupt_class_v10;
1463 extern const struct kfd_event_interrupt_class event_interrupt_class_v11;
1464
1465 extern const struct kfd_device_global_init_class device_global_init_class_cik;
1466
1467 int kfd_event_init_process(struct kfd_process *p);
1468 void kfd_event_free_process(struct kfd_process *p);
1469 int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma);
1470 int kfd_wait_on_events(struct kfd_process *p,
1471 uint32_t num_events, void __user *data,
1472 bool all, uint32_t *user_timeout_ms,
1473 uint32_t *wait_result);
1474 void kfd_signal_event_interrupt(u32 pasid, uint32_t partial_id,
1475 uint32_t valid_id_bits);
1476 void kfd_signal_hw_exception_event(u32 pasid);
1477 int kfd_set_event(struct kfd_process *p, uint32_t event_id);
1478 int kfd_reset_event(struct kfd_process *p, uint32_t event_id);
1479 int kfd_kmap_event_page(struct kfd_process *p, uint64_t event_page_offset);
1480
1481 int kfd_event_create(struct file *devkfd, struct kfd_process *p,
1482 uint32_t event_type, bool auto_reset, uint32_t node_id,
1483 uint32_t *event_id, uint32_t *event_trigger_data,
1484 uint64_t *event_page_offset, uint32_t *event_slot_index);
1485
1486 int kfd_get_num_events(struct kfd_process *p);
1487 int kfd_event_destroy(struct kfd_process *p, uint32_t event_id);
1488
1489 void kfd_signal_vm_fault_event(struct kfd_node *dev, u32 pasid,
1490 struct kfd_vm_fault_info *info,
1491 struct kfd_hsa_memory_exception_data *data);
1492
1493 void kfd_signal_reset_event(struct kfd_node *dev);
1494
1495 void kfd_signal_poison_consumed_event(struct kfd_node *dev, u32 pasid);
1496
kfd_flush_tlb(struct kfd_process_device * pdd,enum TLB_FLUSH_TYPE type)1497 static inline void kfd_flush_tlb(struct kfd_process_device *pdd,
1498 enum TLB_FLUSH_TYPE type)
1499 {
1500 struct amdgpu_device *adev = pdd->dev->adev;
1501 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv);
1502
1503 amdgpu_vm_flush_compute_tlb(adev, vm, type, pdd->dev->xcc_mask);
1504 }
1505
kfd_flush_tlb_after_unmap(struct kfd_dev * dev)1506 static inline bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev)
1507 {
1508 return KFD_GC_VERSION(dev) >= IP_VERSION(9, 4, 2) ||
1509 (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) && dev->sdma_fw_version >= 18) ||
1510 KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 0);
1511 }
1512
1513 int kfd_send_exception_to_runtime(struct kfd_process *p,
1514 unsigned int queue_id,
1515 uint64_t error_reason);
1516 bool kfd_is_locked(void);
1517
1518 /* Compute profile */
1519 void kfd_inc_compute_active(struct kfd_node *dev);
1520 void kfd_dec_compute_active(struct kfd_node *dev);
1521
1522 /* Cgroup Support */
1523 /* Check with device cgroup if @kfd device is accessible */
kfd_devcgroup_check_permission(struct kfd_node * node)1524 static inline int kfd_devcgroup_check_permission(struct kfd_node *node)
1525 {
1526 #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF)
1527 struct drm_device *ddev;
1528
1529 if (node->xcp)
1530 ddev = node->xcp->ddev;
1531 else
1532 ddev = adev_to_drm(node->adev);
1533
1534 return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR,
1535 ddev->render->index,
1536 DEVCG_ACC_WRITE | DEVCG_ACC_READ);
1537 #else
1538 return 0;
1539 #endif
1540 }
1541
kfd_is_first_node(struct kfd_node * node)1542 static inline bool kfd_is_first_node(struct kfd_node *node)
1543 {
1544 return (node == node->kfd->nodes[0]);
1545 }
1546
1547 /* Debugfs */
1548 #if defined(CONFIG_DEBUG_FS)
1549
1550 void kfd_debugfs_init(void);
1551 void kfd_debugfs_fini(void);
1552 int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data);
1553 int pqm_debugfs_mqds(struct seq_file *m, void *data);
1554 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data);
1555 int dqm_debugfs_hqds(struct seq_file *m, void *data);
1556 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data);
1557 int pm_debugfs_runlist(struct seq_file *m, void *data);
1558
1559 int kfd_debugfs_hang_hws(struct kfd_node *dev);
1560 int pm_debugfs_hang_hws(struct packet_manager *pm);
1561 int dqm_debugfs_hang_hws(struct device_queue_manager *dqm);
1562
1563 #else
1564
kfd_debugfs_init(void)1565 static inline void kfd_debugfs_init(void) {}
kfd_debugfs_fini(void)1566 static inline void kfd_debugfs_fini(void) {}
1567
1568 #endif
1569
1570 #endif
1571