1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2000 Doug Rabson
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/malloc.h>
32 #include <sys/kernel.h>
33 #include <sys/module.h>
34 #include <sys/bus.h>
35 #include <sys/lock.h>
36 #include <sys/mutex.h>
37 #include <sys/proc.h>
38
39 #include <dev/agp/agppriv.h>
40 #include <dev/agp/agpreg.h>
41 #include <dev/pci/pcivar.h>
42 #include <dev/pci/pcireg.h>
43
44 #include <vm/vm.h>
45 #include <vm/vm_extern.h>
46 #include <vm/vm_kern.h>
47 #include <vm/vm_object.h>
48 #include <vm/pmap.h>
49 #include <machine/bus.h>
50 #include <machine/resource.h>
51 #include <sys/rman.h>
52
53 MALLOC_DECLARE(M_AGP);
54
55 #define READ2(off) bus_space_read_2(sc->bst, sc->bsh, off)
56 #define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off)
57 #define WRITE2(off,v) bus_space_write_2(sc->bst, sc->bsh, off, v)
58 #define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v)
59
60 struct agp_amd_gatt {
61 u_int32_t ag_entries;
62 u_int32_t *ag_virtual; /* virtual address of gatt */
63 vm_offset_t ag_physical;
64 u_int32_t *ag_vdir; /* virtual address of page dir */
65 vm_offset_t ag_pdir; /* physical address of page dir */
66 };
67
68 struct agp_amd_softc {
69 struct agp_softc agp;
70 struct resource *regs; /* memory mapped control registers */
71 bus_space_tag_t bst; /* bus_space tag */
72 bus_space_handle_t bsh; /* bus_space handle */
73 u_int32_t initial_aperture; /* aperture size at startup */
74 struct agp_amd_gatt *gatt;
75 };
76
77 static struct agp_amd_gatt *
agp_amd_alloc_gatt(device_t dev)78 agp_amd_alloc_gatt(device_t dev)
79 {
80 u_int32_t apsize = AGP_GET_APERTURE(dev);
81 u_int32_t entries = apsize >> AGP_PAGE_SHIFT;
82 struct agp_amd_gatt *gatt;
83 int i, npages, pdir_offset;
84
85 if (bootverbose)
86 device_printf(dev,
87 "allocating GATT for aperture of size %dM\n",
88 apsize / (1024*1024));
89
90 gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT);
91 if (!gatt)
92 return 0;
93
94 /*
95 * The AMD751 uses a page directory to map a non-contiguous
96 * gatt so we don't need to use kmem_alloc_contig.
97 * Allocate individual GATT pages and map them into the page
98 * directory.
99 */
100 gatt->ag_entries = entries;
101 gatt->ag_virtual = kmem_alloc_attr(entries * sizeof(uint32_t),
102 M_NOWAIT | M_ZERO, 0, ~0, VM_MEMATTR_WRITE_COMBINING);
103 if (!gatt->ag_virtual) {
104 if (bootverbose)
105 device_printf(dev, "allocation failed\n");
106 free(gatt, M_AGP);
107 return 0;
108 }
109
110 /*
111 * Allocate the page directory.
112 */
113 gatt->ag_vdir = kmem_alloc_attr(AGP_PAGE_SIZE, M_NOWAIT |
114 M_ZERO, 0, ~0, VM_MEMATTR_WRITE_COMBINING);
115 if (!gatt->ag_vdir) {
116 if (bootverbose)
117 device_printf(dev,
118 "failed to allocate page directory\n");
119 kmem_free(gatt->ag_virtual, entries * sizeof(uint32_t));
120 free(gatt, M_AGP);
121 return 0;
122 }
123
124 gatt->ag_pdir = vtophys((vm_offset_t) gatt->ag_vdir);
125 if(bootverbose)
126 device_printf(dev, "gatt -> ag_pdir %#lx\n",
127 (u_long)gatt->ag_pdir);
128 /*
129 * Allocate the gatt pages
130 */
131 gatt->ag_entries = entries;
132 if(bootverbose)
133 device_printf(dev, "allocating GATT for %d AGP page entries\n",
134 gatt->ag_entries);
135
136 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
137
138 /*
139 * Map the pages of the GATT into the page directory.
140 *
141 * The GATT page addresses are mapped into the directory offset by
142 * an amount dependent on the base address of the aperture. This
143 * is and offset into the page directory, not an offset added to
144 * the addresses of the gatt pages.
145 */
146
147 pdir_offset = pci_read_config(dev, AGP_AMD751_APBASE, 4) >> 22;
148
149 npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1)
150 >> AGP_PAGE_SHIFT);
151
152 for (i = 0; i < npages; i++) {
153 vm_offset_t va;
154 vm_offset_t pa;
155
156 va = ((vm_offset_t) gatt->ag_virtual) + i * AGP_PAGE_SIZE;
157 pa = vtophys(va);
158 gatt->ag_vdir[i + pdir_offset] = pa | 1;
159 }
160
161 return gatt;
162 }
163
164 static void
agp_amd_free_gatt(struct agp_amd_gatt * gatt)165 agp_amd_free_gatt(struct agp_amd_gatt *gatt)
166 {
167 kmem_free(gatt->ag_vdir, AGP_PAGE_SIZE);
168 kmem_free(gatt->ag_virtual, gatt->ag_entries * sizeof(uint32_t));
169 free(gatt, M_AGP);
170 }
171
172 static const char*
agp_amd_match(device_t dev)173 agp_amd_match(device_t dev)
174 {
175 if (pci_get_class(dev) != PCIC_BRIDGE
176 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
177 return NULL;
178
179 if (agp_find_caps(dev) == 0)
180 return NULL;
181
182 switch (pci_get_devid(dev)) {
183 case 0x70061022:
184 return ("AMD 751 host to AGP bridge");
185 case 0x700e1022:
186 return ("AMD 761 host to AGP bridge");
187 case 0x700c1022:
188 return ("AMD 762 host to AGP bridge");
189 }
190
191 return NULL;
192 }
193
194 static int
agp_amd_probe(device_t dev)195 agp_amd_probe(device_t dev)
196 {
197 const char *desc;
198
199 if (resource_disabled("agp", device_get_unit(dev)))
200 return (ENXIO);
201 desc = agp_amd_match(dev);
202 if (desc) {
203 device_set_desc(dev, desc);
204 return BUS_PROBE_DEFAULT;
205 }
206
207 return ENXIO;
208 }
209
210 static int
agp_amd_attach(device_t dev)211 agp_amd_attach(device_t dev)
212 {
213 struct agp_amd_softc *sc = device_get_softc(dev);
214 struct agp_amd_gatt *gatt;
215 int error, rid;
216
217 error = agp_generic_attach(dev);
218 if (error)
219 return error;
220
221 rid = AGP_AMD751_REGISTERS;
222 sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
223 RF_ACTIVE);
224 if (!sc->regs) {
225 agp_generic_detach(dev);
226 return ENOMEM;
227 }
228
229 sc->bst = rman_get_bustag(sc->regs);
230 sc->bsh = rman_get_bushandle(sc->regs);
231
232 sc->initial_aperture = AGP_GET_APERTURE(dev);
233
234 for (;;) {
235 gatt = agp_amd_alloc_gatt(dev);
236 if (gatt)
237 break;
238
239 /*
240 * Probably contigmalloc failure. Try reducing the
241 * aperture so that the gatt size reduces.
242 */
243 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2))
244 return ENOMEM;
245 }
246 sc->gatt = gatt;
247
248 /* Install the gatt. */
249 WRITE4(AGP_AMD751_ATTBASE, gatt->ag_pdir);
250
251 /* Enable synchronisation between host and agp. */
252 pci_write_config(dev,
253 AGP_AMD751_MODECTRL,
254 AGP_AMD751_MODECTRL_SYNEN, 1);
255
256 /* Set indexing mode for two-level and enable page dir cache */
257 pci_write_config(dev,
258 AGP_AMD751_MODECTRL2,
259 AGP_AMD751_MODECTRL2_GPDCE, 1);
260
261 /* Enable the TLB and flush */
262 WRITE2(AGP_AMD751_STATUS,
263 READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
264 AGP_FLUSH_TLB(dev);
265
266 return 0;
267 }
268
269 static int
agp_amd_detach(device_t dev)270 agp_amd_detach(device_t dev)
271 {
272 struct agp_amd_softc *sc = device_get_softc(dev);
273
274 agp_free_cdev(dev);
275
276 /* Disable the TLB.. */
277 WRITE2(AGP_AMD751_STATUS,
278 READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE);
279
280 /* Disable host-agp sync */
281 pci_write_config(dev, AGP_AMD751_MODECTRL, 0x00, 1);
282
283 /* Clear the GATT base */
284 WRITE4(AGP_AMD751_ATTBASE, 0);
285
286 /* Put the aperture back the way it started. */
287 AGP_SET_APERTURE(dev, sc->initial_aperture);
288
289 agp_amd_free_gatt(sc->gatt);
290 agp_free_res(dev);
291
292 bus_release_resource(dev, SYS_RES_MEMORY,
293 AGP_AMD751_REGISTERS, sc->regs);
294
295 return 0;
296 }
297
298 static u_int32_t
agp_amd_get_aperture(device_t dev)299 agp_amd_get_aperture(device_t dev)
300 {
301 int vas;
302
303 /*
304 * The aperture size is equal to 32M<<vas.
305 */
306 vas = (pci_read_config(dev, AGP_AMD751_APCTRL, 1) & 0x06) >> 1;
307 return (32*1024*1024) << vas;
308 }
309
310 static int
agp_amd_set_aperture(device_t dev,u_int32_t aperture)311 agp_amd_set_aperture(device_t dev, u_int32_t aperture)
312 {
313 int vas;
314
315 /*
316 * Check for a power of two and make sure its within the
317 * programmable range.
318 */
319 if (aperture & (aperture - 1)
320 || aperture < 32*1024*1024
321 || aperture > 2U*1024*1024*1024)
322 return EINVAL;
323
324 vas = ffs(aperture / 32*1024*1024) - 1;
325
326 /*
327 * While the size register is bits 1-3 of APCTRL, bit 0 must be
328 * set for the size value to be 'valid'
329 */
330 pci_write_config(dev, AGP_AMD751_APCTRL,
331 (((pci_read_config(dev, AGP_AMD751_APCTRL, 1) & ~0x06)
332 | ((vas << 1) | 1))), 1);
333
334 return 0;
335 }
336
337 static int
agp_amd_bind_page(device_t dev,vm_offset_t offset,vm_offset_t physical)338 agp_amd_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
339 {
340 struct agp_amd_softc *sc = device_get_softc(dev);
341
342 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
343 return EINVAL;
344
345 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1;
346 return 0;
347 }
348
349 static int
agp_amd_unbind_page(device_t dev,vm_offset_t offset)350 agp_amd_unbind_page(device_t dev, vm_offset_t offset)
351 {
352 struct agp_amd_softc *sc = device_get_softc(dev);
353
354 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
355 return EINVAL;
356
357 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
358 return 0;
359 }
360
361 static void
agp_amd_flush_tlb(device_t dev)362 agp_amd_flush_tlb(device_t dev)
363 {
364 struct agp_amd_softc *sc = device_get_softc(dev);
365
366 /* Set the cache invalidate bit and wait for the chipset to clear */
367 WRITE4(AGP_AMD751_TLBCTRL, 1);
368 do {
369 DELAY(1);
370 } while (READ4(AGP_AMD751_TLBCTRL));
371 }
372
373 static device_method_t agp_amd_methods[] = {
374 /* Device interface */
375 DEVMETHOD(device_probe, agp_amd_probe),
376 DEVMETHOD(device_attach, agp_amd_attach),
377 DEVMETHOD(device_detach, agp_amd_detach),
378 DEVMETHOD(device_shutdown, bus_generic_shutdown),
379 DEVMETHOD(device_suspend, bus_generic_suspend),
380 DEVMETHOD(device_resume, bus_generic_resume),
381
382 /* AGP interface */
383 DEVMETHOD(agp_get_aperture, agp_amd_get_aperture),
384 DEVMETHOD(agp_set_aperture, agp_amd_set_aperture),
385 DEVMETHOD(agp_bind_page, agp_amd_bind_page),
386 DEVMETHOD(agp_unbind_page, agp_amd_unbind_page),
387 DEVMETHOD(agp_flush_tlb, agp_amd_flush_tlb),
388 DEVMETHOD(agp_enable, agp_generic_enable),
389 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory),
390 DEVMETHOD(agp_free_memory, agp_generic_free_memory),
391 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory),
392 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory),
393 { 0, 0 }
394 };
395
396 static driver_t agp_amd_driver = {
397 "agp",
398 agp_amd_methods,
399 sizeof(struct agp_amd_softc),
400 };
401
402 DRIVER_MODULE(agp_amd, hostb, agp_amd_driver, 0, 0);
403 MODULE_DEPEND(agp_amd, agp, 1, 1, 1);
404 MODULE_DEPEND(agp_amd, pci, 1, 1, 1);
405