1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2012 Hudson River Trading LLC
5 * Written by: John H. Baldwin <jhb@FreeBSD.org>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/param.h>
31 #include <sys/pciio.h>
32
33 #include <err.h>
34 #include <stdio.h>
35
36 #include <dev/pci/pcireg.h>
37
38 #include "pciconf.h"
39
40 struct bit_table {
41 uint32_t mask;
42 const char *desc;
43 };
44
45 /* Error indicators in the PCI status register (PCIR_STATUS). */
46 static struct bit_table pci_status[] = {
47 { PCIM_STATUS_MDPERR, "Master Data Parity Error" },
48 { PCIM_STATUS_STABORT, "Sent Target-Abort" },
49 { PCIM_STATUS_RTABORT, "Received Target-Abort" },
50 { PCIM_STATUS_RMABORT, "Received Master-Abort" },
51 { PCIM_STATUS_SERR, "Signalled System Error" },
52 { PCIM_STATUS_PERR, "Detected Parity Error" },
53 { 0, NULL },
54 };
55
56 /* Valid error indicator bits in PCIR_STATUS. */
57 #define PCI_ERRORS (PCIM_STATUS_MDPERR | PCIM_STATUS_STABORT | \
58 PCIM_STATUS_RTABORT | PCIM_STATUS_RMABORT | \
59 PCIM_STATUS_SERR | PCIM_STATUS_PERR)
60
61 /* Error indicators in the PCI-Express device status register. */
62 static struct bit_table pcie_device_status[] = {
63 { PCIEM_STA_CORRECTABLE_ERROR, "Correctable Error Detected" },
64 { PCIEM_STA_NON_FATAL_ERROR, "Non-Fatal Error Detected" },
65 { PCIEM_STA_FATAL_ERROR, "Fatal Error Detected" },
66 { PCIEM_STA_UNSUPPORTED_REQ, "Unsupported Request Detected" },
67 { 0, NULL },
68 };
69
70 /* Valid error indicator bits in the PCI-Express device status register. */
71 #define PCIE_ERRORS (PCIEM_STA_CORRECTABLE_ERROR | \
72 PCIEM_STA_NON_FATAL_ERROR | \
73 PCIEM_STA_FATAL_ERROR | \
74 PCIEM_STA_UNSUPPORTED_REQ)
75
76 /* AER Uncorrected errors. */
77 static struct bit_table aer_uc[] = {
78 { PCIM_AER_UC_TRAINING_ERROR, "Link Training Error" },
79 { PCIM_AER_UC_DL_PROTOCOL_ERROR, "Data Link Protocol Error" },
80 { PCIM_AER_UC_SURPRISE_LINK_DOWN, "Surprise Link Down Error" },
81 { PCIM_AER_UC_POISONED_TLP, "Poisoned TLP" },
82 { PCIM_AER_UC_FC_PROTOCOL_ERROR, "Flow Control Protocol Error" },
83 { PCIM_AER_UC_COMPLETION_TIMEOUT, "Completion Timeout" },
84 { PCIM_AER_UC_COMPLETER_ABORT, "Completer Abort" },
85 { PCIM_AER_UC_UNEXPECTED_COMPLETION, "Unexpected Completion" },
86 { PCIM_AER_UC_RECEIVER_OVERFLOW, "Receiver Overflow Error" },
87 { PCIM_AER_UC_MALFORMED_TLP, "Malformed TLP" },
88 { PCIM_AER_UC_ECRC_ERROR, "ECRC Error" },
89 { PCIM_AER_UC_UNSUPPORTED_REQUEST, "Unsupported Request" },
90 { PCIM_AER_UC_ACS_VIOLATION, "ACS Violation" },
91 { PCIM_AER_UC_INTERNAL_ERROR, "Uncorrectable Internal Error" },
92 { PCIM_AER_UC_MC_BLOCKED_TLP, "MC Blocked TLP" },
93 { PCIM_AER_UC_ATOMIC_EGRESS_BLK, "AtomicOp Egress Blocked" },
94 { PCIM_AER_UC_TLP_PREFIX_BLOCKED, "TLP Prefix Blocked Error" },
95 { 0, NULL },
96 };
97
98 /* AER Corrected errors. */
99 static struct bit_table aer_cor[] = {
100 { PCIM_AER_COR_RECEIVER_ERROR, "Receiver Error" },
101 { PCIM_AER_COR_BAD_TLP, "Bad TLP" },
102 { PCIM_AER_COR_BAD_DLLP, "Bad DLLP" },
103 { PCIM_AER_COR_REPLAY_ROLLOVER, "REPLAY_NUM Rollover" },
104 { PCIM_AER_COR_REPLAY_TIMEOUT, "Replay Timer Timeout" },
105 { PCIM_AER_COR_ADVISORY_NF_ERROR, "Advisory Non-Fatal Error" },
106 { PCIM_AER_COR_INTERNAL_ERROR, "Corrected Internal Error" },
107 { PCIM_AER_COR_HEADER_LOG_OVFLOW, "Header Log Overflow" },
108 { 0, NULL },
109 };
110
111 static void
print_bits(const char * header,struct bit_table * table,uint32_t mask)112 print_bits(const char *header, struct bit_table *table, uint32_t mask)
113 {
114 int first;
115
116 first = 1;
117 for (; table->desc != NULL; table++)
118 if (mask & table->mask) {
119 if (first) {
120 printf("%14s = ", header);
121 first = 0;
122 } else
123 printf(" ");
124 printf("%s\n", table->desc);
125 mask &= ~table->mask;
126 }
127 if (mask != 0) {
128 if (first)
129 printf("%14s = ", header);
130 else
131 printf(" ");
132 printf("Unknown: 0x%08x\n", mask);
133 }
134 }
135
136 void
list_errors(int fd,struct pci_conf * p)137 list_errors(int fd, struct pci_conf *p)
138 {
139 uint32_t mask, severity;
140 uint16_t sta, aer;
141 uint8_t pcie;
142
143 /* First check for standard PCI errors. */
144 sta = read_config(fd, &p->pc_sel, PCIR_STATUS, 2);
145 print_bits("PCI errors", pci_status, sta & PCI_ERRORS);
146
147 /* See if this is a PCI-express device. */
148 pcie = pci_find_cap(fd, p, PCIY_EXPRESS);
149 if (pcie == 0)
150 return;
151
152 /* Check for PCI-e errors. */
153 sta = read_config(fd, &p->pc_sel, pcie + PCIER_DEVICE_STA, 2);
154 print_bits("PCI-e errors", pcie_device_status, sta & PCIE_ERRORS);
155
156 /* See if this device supports AER. */
157 aer = pcie_find_cap(fd, p, PCIZ_AER);
158 if (aer == 0)
159 return;
160
161 /* Check for uncorrected errors. */
162 mask = read_config(fd, &p->pc_sel, aer + PCIR_AER_UC_STATUS, 4);
163 severity = read_config(fd, &p->pc_sel, aer + PCIR_AER_UC_SEVERITY, 4);
164 print_bits("Fatal", aer_uc, mask & severity);
165 print_bits("Non-fatal", aer_uc, mask & ~severity);
166
167 /* Check for corrected errors. */
168 mask = read_config(fd, &p->pc_sel, aer + PCIR_AER_COR_STATUS, 4);
169 print_bits("Corrected", aer_cor, mask);
170 }
171