1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Texas Instruments ADS1119 ADC driver.
4 *
5 * Copyright 2024 Toradex
6 */
7
8 #include <linux/bits.h>
9 #include <linux/bitfield.h>
10 #include <linux/completion.h>
11 #include <linux/delay.h>
12 #include <linux/dev_printk.h>
13 #include <linux/err.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/interrupt.h>
16 #include <linux/iopoll.h>
17 #include <linux/i2c.h>
18 #include <linux/kernel.h>
19 #include <linux/math.h>
20 #include <linux/module.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/units.h>
24
25 #include <linux/iio/iio.h>
26 #include <linux/iio/buffer.h>
27 #include <linux/iio/trigger.h>
28 #include <linux/iio/triggered_buffer.h>
29 #include <linux/iio/trigger_consumer.h>
30
31 #define ADS1119_CMD_RESET 0x06
32 #define ADS1119_CMD_POWERDOWN 0x02
33 #define ADS1119_CMD_START_SYNC 0x08
34 #define ADS1119_CMD_RDATA 0x10
35 #define ADS1119_CMD_RREG_CONFIG 0x20
36 #define ADS1119_CMD_RREG_STATUS 0x24
37 #define ADS1119_CMD_WREG 0x40
38
39 #define ADS1119_CMD_RREG(reg) (0x20 | (reg) << 2)
40
41 /* Config register */
42 #define ADS1119_REG_CONFIG 0x00
43 #define ADS1119_CONFIG_VREF_FIELD BIT(0)
44 #define ADS1119_CONFIG_CM_FIELD BIT(1)
45 #define ADS1119_CONFIG_DR_FIELD GENMASK(3, 2)
46 #define ADS1119_CONFIG_GAIN_FIELD BIT(4)
47 #define ADS1119_CONFIG_MUX_FIELD GENMASK(7, 5)
48
49 #define ADS1119_VREF_INTERNAL 0
50 #define ADS1119_VREF_EXTERNAL 1
51 #define ADS1119_VREF_INTERNAL_VAL 2048000
52
53 #define ADS1119_CM_SINGLE 0
54 #define ADS1119_CM_CONTINUOUS 1
55
56 #define ADS1119_DR_20_SPS 0
57 #define ADS1119_DR_90_SPS 1
58 #define ADS1119_DR_330_SPS 2
59 #define ADS1119_DR_1000_SPS 3
60
61 #define ADS1119_GAIN_1 0
62 #define ADS1119_GAIN_4 1
63
64 #define ADS1119_MUX_AIN0_AIN1 0
65 #define ADS1119_MUX_AIN2_AIN3 1
66 #define ADS1119_MUX_AIN1_AIN2 2
67 #define ADS1119_MUX_AIN0 3
68 #define ADS1119_MUX_AIN1 4
69 #define ADS1119_MUX_AIN2 5
70 #define ADS1119_MUX_AIN3 6
71 #define ADS1119_MUX_SHORTED 7
72
73 /* Status register */
74 #define ADS1119_REG_STATUS 0x01
75 #define ADS1119_STATUS_DRDY_FIELD BIT(7)
76
77 #define ADS1119_DEFAULT_GAIN 1
78 #define ADS1119_DEFAULT_DATARATE 20
79
80 #define ADS1119_SUSPEND_DELAY 2000
81
82 /* Timeout based on the minimum sample rate of 20 SPS (50000us) */
83 #define ADS1119_MAX_DRDY_TIMEOUT 85000
84
85 #define ADS1119_MAX_CHANNELS 7
86 #define ADS1119_MAX_SINGLE_CHANNELS 4
87
88 struct ads1119_channel_config {
89 int gain;
90 int datarate;
91 int mux;
92 };
93
94 struct ads1119_state {
95 struct completion completion;
96 struct i2c_client *client;
97 struct gpio_desc *reset_gpio;
98 struct iio_trigger *trig;
99 struct ads1119_channel_config *channels_cfg;
100 unsigned int num_channels_cfg;
101 unsigned int cached_config;
102 int vref_uV;
103 };
104
105 static const char * const ads1119_power_supplies[] = {
106 "avdd", "dvdd"
107 };
108
109 static const int ads1119_available_datarates[] = {
110 20, 90, 330, 1000,
111 };
112
113 static const int ads1119_available_gains[] = {
114 1, 1,
115 1, 4,
116 };
117
ads1119_upd_cfg_reg(struct ads1119_state * st,unsigned int fields,unsigned int val)118 static int ads1119_upd_cfg_reg(struct ads1119_state *st, unsigned int fields,
119 unsigned int val)
120 {
121 unsigned int config = st->cached_config;
122 int ret;
123
124 config &= ~fields;
125 config |= val;
126
127 ret = i2c_smbus_write_byte_data(st->client, ADS1119_CMD_WREG, config);
128 if (ret)
129 return ret;
130
131 st->cached_config = config;
132
133 return 0;
134 }
135
ads1119_data_ready(struct ads1119_state * st)136 static bool ads1119_data_ready(struct ads1119_state *st)
137 {
138 int status;
139
140 status = i2c_smbus_read_byte_data(st->client, ADS1119_CMD_RREG_STATUS);
141 if (status < 0)
142 return false;
143
144 return FIELD_GET(ADS1119_STATUS_DRDY_FIELD, status);
145 }
146
ads1119_reset(struct ads1119_state * st)147 static int ads1119_reset(struct ads1119_state *st)
148 {
149 st->cached_config = 0;
150
151 if (!st->reset_gpio)
152 return i2c_smbus_write_byte(st->client, ADS1119_CMD_RESET);
153
154 gpiod_set_value_cansleep(st->reset_gpio, 1);
155 udelay(1);
156 gpiod_set_value_cansleep(st->reset_gpio, 0);
157 udelay(1);
158
159 return 0;
160 }
161
ads1119_set_conv_mode(struct ads1119_state * st,bool continuous)162 static int ads1119_set_conv_mode(struct ads1119_state *st, bool continuous)
163 {
164 unsigned int mode;
165
166 if (continuous)
167 mode = ADS1119_CM_CONTINUOUS;
168 else
169 mode = ADS1119_CM_SINGLE;
170
171 return ads1119_upd_cfg_reg(st, ADS1119_CONFIG_CM_FIELD,
172 FIELD_PREP(ADS1119_CONFIG_CM_FIELD, mode));
173 }
174
ads1119_get_hw_gain(int gain)175 static int ads1119_get_hw_gain(int gain)
176 {
177 if (gain == 4)
178 return ADS1119_GAIN_4;
179 else
180 return ADS1119_GAIN_1;
181 }
182
ads1119_get_hw_datarate(int datarate)183 static int ads1119_get_hw_datarate(int datarate)
184 {
185 switch (datarate) {
186 case 90:
187 return ADS1119_DR_90_SPS;
188 case 330:
189 return ADS1119_DR_330_SPS;
190 case 1000:
191 return ADS1119_DR_1000_SPS;
192 case 20:
193 default:
194 return ADS1119_DR_20_SPS;
195 }
196 }
197
ads1119_configure_channel(struct ads1119_state * st,int mux,int gain,int datarate)198 static int ads1119_configure_channel(struct ads1119_state *st, int mux,
199 int gain, int datarate)
200 {
201 int ret;
202
203 ret = ads1119_upd_cfg_reg(st, ADS1119_CONFIG_MUX_FIELD,
204 FIELD_PREP(ADS1119_CONFIG_MUX_FIELD, mux));
205 if (ret)
206 return ret;
207
208 ret = ads1119_upd_cfg_reg(st, ADS1119_CONFIG_GAIN_FIELD,
209 FIELD_PREP(ADS1119_CONFIG_GAIN_FIELD,
210 ads1119_get_hw_gain(gain)));
211 if (ret)
212 return ret;
213
214 return ads1119_upd_cfg_reg(st, ADS1119_CONFIG_DR_FIELD,
215 FIELD_PREP(ADS1119_CONFIG_DR_FIELD,
216 ads1119_get_hw_datarate(datarate)));
217 }
218
ads1119_poll_data_ready(struct ads1119_state * st,struct iio_chan_spec const * chan)219 static int ads1119_poll_data_ready(struct ads1119_state *st,
220 struct iio_chan_spec const *chan)
221 {
222 unsigned int datarate = st->channels_cfg[chan->address].datarate;
223 unsigned long wait_time;
224 bool data_ready;
225
226 /* Poll 5 times more than the data rate */
227 wait_time = DIV_ROUND_CLOSEST(MICRO, 5 * datarate);
228
229 return read_poll_timeout(ads1119_data_ready, data_ready,
230 data_ready, wait_time,
231 ADS1119_MAX_DRDY_TIMEOUT, false, st);
232 }
233
ads1119_read_data(struct ads1119_state * st,struct iio_chan_spec const * chan,unsigned int * val)234 static int ads1119_read_data(struct ads1119_state *st,
235 struct iio_chan_spec const *chan,
236 unsigned int *val)
237 {
238 unsigned int timeout;
239 int ret = 0;
240
241 timeout = msecs_to_jiffies(ADS1119_MAX_DRDY_TIMEOUT);
242
243 if (!st->client->irq) {
244 ret = ads1119_poll_data_ready(st, chan);
245 if (ret)
246 return ret;
247 } else if (!wait_for_completion_timeout(&st->completion, timeout)) {
248 return -ETIMEDOUT;
249 }
250
251 ret = i2c_smbus_read_word_swapped(st->client, ADS1119_CMD_RDATA);
252 if (ret < 0)
253 return ret;
254
255 *val = ret;
256
257 return 0;
258 }
259
ads1119_single_conversion(struct ads1119_state * st,struct iio_chan_spec const * chan,int * val,bool calib_offset)260 static int ads1119_single_conversion(struct ads1119_state *st,
261 struct iio_chan_spec const *chan,
262 int *val,
263 bool calib_offset)
264 {
265 struct device *dev = &st->client->dev;
266 int mux = st->channels_cfg[chan->address].mux;
267 int gain = st->channels_cfg[chan->address].gain;
268 int datarate = st->channels_cfg[chan->address].datarate;
269 unsigned int sample;
270 int ret;
271
272 if (calib_offset)
273 mux = ADS1119_MUX_SHORTED;
274
275 ret = pm_runtime_resume_and_get(dev);
276 if (ret)
277 goto pdown;
278
279 ret = ads1119_configure_channel(st, mux, gain, datarate);
280 if (ret)
281 goto pdown;
282
283 ret = i2c_smbus_write_byte(st->client, ADS1119_CMD_START_SYNC);
284 if (ret)
285 goto pdown;
286
287 ret = ads1119_read_data(st, chan, &sample);
288 if (ret)
289 goto pdown;
290
291 *val = sign_extend32(sample, chan->scan_type.realbits - 1);
292 ret = IIO_VAL_INT;
293 pdown:
294 pm_runtime_mark_last_busy(dev);
295 pm_runtime_put_autosuspend(dev);
296 return ret;
297 }
298
ads1119_validate_datarate(struct ads1119_state * st,int datarate)299 static int ads1119_validate_datarate(struct ads1119_state *st, int datarate)
300 {
301 switch (datarate) {
302 case 20:
303 case 90:
304 case 330:
305 case 1000:
306 return datarate;
307 default:
308 return -EINVAL;
309 }
310 }
311
ads1119_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)312 static int ads1119_read_avail(struct iio_dev *indio_dev,
313 struct iio_chan_spec const *chan,
314 const int **vals, int *type, int *length,
315 long mask)
316 {
317 switch (mask) {
318 case IIO_CHAN_INFO_SCALE:
319 *type = IIO_VAL_FRACTIONAL;
320 *vals = ads1119_available_gains;
321 *length = ARRAY_SIZE(ads1119_available_gains);
322 return IIO_AVAIL_LIST;
323 case IIO_CHAN_INFO_SAMP_FREQ:
324 *type = IIO_VAL_INT;
325 *vals = ads1119_available_datarates;
326 *length = ARRAY_SIZE(ads1119_available_datarates);
327 return IIO_AVAIL_LIST;
328 default:
329 return -EINVAL;
330 }
331 }
332
ads1119_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)333 static int ads1119_read_raw(struct iio_dev *indio_dev,
334 struct iio_chan_spec const *chan, int *val,
335 int *val2, long mask)
336 {
337 struct ads1119_state *st = iio_priv(indio_dev);
338 unsigned int index = chan->address;
339 int ret;
340
341 if (index >= st->num_channels_cfg)
342 return -EINVAL;
343
344 switch (mask) {
345 case IIO_CHAN_INFO_RAW:
346 if (!iio_device_claim_direct(indio_dev))
347 return -EBUSY;
348 ret = ads1119_single_conversion(st, chan, val, false);
349 iio_device_release_direct(indio_dev);
350 return ret;
351 case IIO_CHAN_INFO_OFFSET:
352 if (!iio_device_claim_direct(indio_dev))
353 return -EBUSY;
354 ret = ads1119_single_conversion(st, chan, val, true);
355 iio_device_release_direct(indio_dev);
356 return ret;
357 case IIO_CHAN_INFO_SCALE:
358 *val = st->vref_uV / 1000;
359 *val /= st->channels_cfg[index].gain;
360 *val2 = chan->scan_type.realbits - 1;
361 return IIO_VAL_FRACTIONAL_LOG2;
362 case IIO_CHAN_INFO_SAMP_FREQ:
363 *val = st->channels_cfg[index].datarate;
364 return IIO_VAL_INT;
365 default:
366 return -EINVAL;
367 }
368 }
369
ads1119_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)370 static int ads1119_write_raw(struct iio_dev *indio_dev,
371 struct iio_chan_spec const *chan, int val,
372 int val2, long mask)
373 {
374 struct ads1119_state *st = iio_priv(indio_dev);
375 unsigned int index = chan->address;
376 int ret;
377
378 if (index >= st->num_channels_cfg)
379 return -EINVAL;
380
381 switch (mask) {
382 case IIO_CHAN_INFO_SCALE:
383 ret = MICRO / ((val * MICRO) + val2);
384 if (ret != 1 && ret != 4)
385 return -EINVAL;
386
387 st->channels_cfg[index].gain = ret;
388 return 0;
389 case IIO_CHAN_INFO_SAMP_FREQ:
390 ret = ads1119_validate_datarate(st, val);
391 if (ret < 0)
392 return ret;
393
394 st->channels_cfg[index].datarate = ret;
395 return 0;
396 default:
397 return -EINVAL;
398 }
399 }
400
ads1119_debugfs_reg_access(struct iio_dev * indio_dev,unsigned int reg,unsigned int writeval,unsigned int * readval)401 static int ads1119_debugfs_reg_access(struct iio_dev *indio_dev,
402 unsigned int reg, unsigned int writeval,
403 unsigned int *readval)
404 {
405 struct ads1119_state *st = iio_priv(indio_dev);
406 int ret;
407
408 if (reg > ADS1119_REG_STATUS)
409 return -EINVAL;
410
411 if (readval) {
412 ret = i2c_smbus_read_byte_data(st->client,
413 ADS1119_CMD_RREG(reg));
414 if (ret < 0)
415 return ret;
416
417 *readval = ret;
418 return 0;
419 }
420
421 if (reg > ADS1119_REG_CONFIG)
422 return -EINVAL;
423
424 return i2c_smbus_write_byte_data(st->client, ADS1119_CMD_WREG,
425 writeval);
426 }
427
428 static const struct iio_info ads1119_info = {
429 .read_avail = ads1119_read_avail,
430 .read_raw = ads1119_read_raw,
431 .write_raw = ads1119_write_raw,
432 .debugfs_reg_access = ads1119_debugfs_reg_access,
433 };
434
ads1119_triggered_buffer_preenable(struct iio_dev * indio_dev)435 static int ads1119_triggered_buffer_preenable(struct iio_dev *indio_dev)
436 {
437 struct ads1119_state *st = iio_priv(indio_dev);
438 struct device *dev = &st->client->dev;
439 unsigned int index;
440 int ret;
441
442 index = find_first_bit(indio_dev->active_scan_mask,
443 iio_get_masklength(indio_dev));
444
445 ret = ads1119_set_conv_mode(st, true);
446 if (ret)
447 return ret;
448
449 ret = ads1119_configure_channel(st,
450 st->channels_cfg[index].mux,
451 st->channels_cfg[index].gain,
452 st->channels_cfg[index].datarate);
453 if (ret)
454 return ret;
455
456 ret = pm_runtime_resume_and_get(dev);
457 if (ret)
458 return ret;
459
460 return i2c_smbus_write_byte(st->client, ADS1119_CMD_START_SYNC);
461 }
462
ads1119_triggered_buffer_postdisable(struct iio_dev * indio_dev)463 static int ads1119_triggered_buffer_postdisable(struct iio_dev *indio_dev)
464 {
465 struct ads1119_state *st = iio_priv(indio_dev);
466 struct device *dev = &st->client->dev;
467 int ret;
468
469 ret = ads1119_set_conv_mode(st, false);
470 if (ret)
471 return ret;
472
473 pm_runtime_mark_last_busy(dev);
474 pm_runtime_put_autosuspend(dev);
475
476 return 0;
477 }
478
479 static const struct iio_buffer_setup_ops ads1119_buffer_setup_ops = {
480 .preenable = ads1119_triggered_buffer_preenable,
481 .postdisable = ads1119_triggered_buffer_postdisable,
482 .validate_scan_mask = &iio_validate_scan_mask_onehot,
483 };
484
485 static const struct iio_trigger_ops ads1119_trigger_ops = {
486 .validate_device = &iio_trigger_validate_own_device,
487 };
488
ads1119_irq_handler(int irq,void * dev_id)489 static irqreturn_t ads1119_irq_handler(int irq, void *dev_id)
490 {
491 struct iio_dev *indio_dev = dev_id;
492 struct ads1119_state *st = iio_priv(indio_dev);
493
494 if (iio_buffer_enabled(indio_dev) && iio_trigger_using_own(indio_dev))
495 iio_trigger_poll(indio_dev->trig);
496 else
497 complete(&st->completion);
498
499 return IRQ_HANDLED;
500 }
501
ads1119_trigger_handler(int irq,void * private)502 static irqreturn_t ads1119_trigger_handler(int irq, void *private)
503 {
504 struct iio_poll_func *pf = private;
505 struct iio_dev *indio_dev = pf->indio_dev;
506 struct ads1119_state *st = iio_priv(indio_dev);
507 struct {
508 s16 sample;
509 aligned_s64 timestamp;
510 } scan;
511 unsigned int index;
512 int ret;
513
514 memset(&scan, 0, sizeof(scan));
515
516 if (!iio_trigger_using_own(indio_dev)) {
517 index = find_first_bit(indio_dev->active_scan_mask,
518 iio_get_masklength(indio_dev));
519
520 ret = ads1119_poll_data_ready(st, &indio_dev->channels[index]);
521 if (ret) {
522 dev_err(&st->client->dev,
523 "Failed to poll data on trigger (%d)\n", ret);
524 goto done;
525 }
526 }
527
528 ret = i2c_smbus_read_word_swapped(st->client, ADS1119_CMD_RDATA);
529 if (ret < 0) {
530 dev_err(&st->client->dev,
531 "Failed to read data on trigger (%d)\n", ret);
532 goto done;
533 }
534
535 scan.sample = ret;
536
537 iio_push_to_buffers_with_ts(indio_dev, &scan, sizeof(scan),
538 iio_get_time_ns(indio_dev));
539 done:
540 iio_trigger_notify_done(indio_dev->trig);
541 return IRQ_HANDLED;
542 }
543
ads1119_init(struct ads1119_state * st,bool vref_external)544 static int ads1119_init(struct ads1119_state *st, bool vref_external)
545 {
546 int ret;
547
548 ret = ads1119_reset(st);
549 if (ret)
550 return ret;
551
552 if (vref_external)
553 return ads1119_upd_cfg_reg(st,
554 ADS1119_CONFIG_VREF_FIELD,
555 FIELD_PREP(ADS1119_CONFIG_VREF_FIELD,
556 ADS1119_VREF_EXTERNAL));
557 return 0;
558 }
559
ads1119_map_analog_inputs_mux(int ain_pos,int ain_neg,bool differential)560 static int ads1119_map_analog_inputs_mux(int ain_pos, int ain_neg,
561 bool differential)
562 {
563 if (ain_pos >= ADS1119_MAX_SINGLE_CHANNELS)
564 return -EINVAL;
565
566 if (!differential)
567 return ADS1119_MUX_AIN0 + ain_pos;
568
569 if (ain_pos == 0 && ain_neg == 1)
570 return ADS1119_MUX_AIN0_AIN1;
571 else if (ain_pos == 1 && ain_neg == 2)
572 return ADS1119_MUX_AIN1_AIN2;
573 else if (ain_pos == 2 && ain_neg == 3)
574 return ADS1119_MUX_AIN2_AIN3;
575
576 return -EINVAL;
577 }
578
ads1119_alloc_and_config_channels(struct iio_dev * indio_dev)579 static int ads1119_alloc_and_config_channels(struct iio_dev *indio_dev)
580 {
581 const struct iio_chan_spec ads1119_channel =
582 (const struct iio_chan_spec) {
583 .type = IIO_VOLTAGE,
584 .indexed = 1,
585 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
586 BIT(IIO_CHAN_INFO_SCALE) |
587 BIT(IIO_CHAN_INFO_OFFSET) |
588 BIT(IIO_CHAN_INFO_SAMP_FREQ),
589 .info_mask_shared_by_all_available =
590 BIT(IIO_CHAN_INFO_SCALE) |
591 BIT(IIO_CHAN_INFO_SAMP_FREQ),
592 .scan_type = {
593 .sign = 's',
594 .realbits = 16,
595 .storagebits = 16,
596 .endianness = IIO_CPU,
597 },
598 };
599 const struct iio_chan_spec ads1119_ts = IIO_CHAN_SOFT_TIMESTAMP(0);
600 struct ads1119_state *st = iio_priv(indio_dev);
601 struct iio_chan_spec *iio_channels, *chan;
602 struct device *dev = &st->client->dev;
603 unsigned int num_channels, i;
604 bool differential;
605 u32 ain[2];
606 int ret;
607
608 st->num_channels_cfg = device_get_child_node_count(dev);
609 if (st->num_channels_cfg > ADS1119_MAX_CHANNELS)
610 return dev_err_probe(dev, -EINVAL,
611 "Too many channels %d, max is %d\n",
612 st->num_channels_cfg,
613 ADS1119_MAX_CHANNELS);
614
615 st->channels_cfg = devm_kcalloc(dev, st->num_channels_cfg,
616 sizeof(*st->channels_cfg), GFP_KERNEL);
617 if (!st->channels_cfg)
618 return -ENOMEM;
619
620 /* Allocate one more iio channel for the timestamp */
621 num_channels = st->num_channels_cfg + 1;
622 iio_channels = devm_kcalloc(dev, num_channels, sizeof(*iio_channels),
623 GFP_KERNEL);
624 if (!iio_channels)
625 return -ENOMEM;
626
627 i = 0;
628
629 device_for_each_child_node_scoped(dev, child) {
630 chan = &iio_channels[i];
631
632 differential = fwnode_property_present(child, "diff-channels");
633 if (differential)
634 ret = fwnode_property_read_u32_array(child,
635 "diff-channels",
636 ain, 2);
637 else
638 ret = fwnode_property_read_u32(child, "single-channel",
639 &ain[0]);
640
641 if (ret)
642 return dev_err_probe(dev, ret,
643 "Failed to get channel property\n");
644
645 ret = ads1119_map_analog_inputs_mux(ain[0], ain[1],
646 differential);
647 if (ret < 0)
648 return dev_err_probe(dev, ret,
649 "Invalid channel value\n");
650
651 st->channels_cfg[i].mux = ret;
652 st->channels_cfg[i].gain = ADS1119_DEFAULT_GAIN;
653 st->channels_cfg[i].datarate = ADS1119_DEFAULT_DATARATE;
654
655 *chan = ads1119_channel;
656 chan->channel = ain[0];
657 chan->address = i;
658 chan->scan_index = i;
659
660 if (differential) {
661 chan->channel2 = ain[1];
662 chan->differential = 1;
663 }
664
665 dev_dbg(dev, "channel: index %d, mux %d\n", i,
666 st->channels_cfg[i].mux);
667
668 i++;
669 }
670
671 iio_channels[i] = ads1119_ts;
672 iio_channels[i].address = i;
673 iio_channels[i].scan_index = i;
674
675 indio_dev->channels = iio_channels;
676 indio_dev->num_channels = num_channels;
677
678 return 0;
679 }
680
ads1119_powerdown(void * data)681 static void ads1119_powerdown(void *data)
682 {
683 struct ads1119_state *st = data;
684
685 i2c_smbus_write_byte(st->client, ADS1119_CMD_POWERDOWN);
686 }
687
ads1119_probe(struct i2c_client * client)688 static int ads1119_probe(struct i2c_client *client)
689 {
690 struct iio_dev *indio_dev;
691 struct ads1119_state *st;
692 struct device *dev = &client->dev;
693 bool vref_external = true;
694 int ret;
695
696 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
697 if (!indio_dev)
698 return dev_err_probe(dev, -ENOMEM,
699 "Failed to allocate IIO device\n");
700
701 st = iio_priv(indio_dev);
702 st->client = client;
703
704 indio_dev->name = "ads1119";
705 indio_dev->info = &ads1119_info;
706 indio_dev->modes = INDIO_DIRECT_MODE;
707
708 i2c_set_clientdata(client, indio_dev);
709
710 ret = devm_regulator_bulk_get_enable(dev,
711 ARRAY_SIZE(ads1119_power_supplies),
712 ads1119_power_supplies);
713 if (ret)
714 return dev_err_probe(dev, ret,
715 "Failed to get and enable supplies\n");
716
717 st->vref_uV = devm_regulator_get_enable_read_voltage(dev, "vref");
718 if (st->vref_uV == -ENODEV) {
719 vref_external = false;
720 st->vref_uV = ADS1119_VREF_INTERNAL_VAL;
721 } else if (st->vref_uV < 0) {
722 return dev_err_probe(dev, st->vref_uV, "Failed to get vref\n");
723 }
724
725 st->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
726 if (IS_ERR(st->reset_gpio))
727 return dev_err_probe(dev, PTR_ERR(st->reset_gpio),
728 "Failed to get reset gpio\n");
729
730 ret = ads1119_alloc_and_config_channels(indio_dev);
731 if (ret)
732 return ret;
733
734 init_completion(&st->completion);
735
736 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
737 ads1119_trigger_handler,
738 &ads1119_buffer_setup_ops);
739 if (ret)
740 return dev_err_probe(dev, ret, "Failed to setup IIO buffer\n");
741
742 if (client->irq > 0) {
743 ret = devm_request_threaded_irq(dev, client->irq,
744 ads1119_irq_handler,
745 NULL, IRQF_ONESHOT,
746 "ads1119", indio_dev);
747 if (ret)
748 return dev_err_probe(dev, ret,
749 "Failed to allocate irq\n");
750
751 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
752 indio_dev->name,
753 iio_device_id(indio_dev));
754 if (!st->trig)
755 return dev_err_probe(dev, -ENOMEM,
756 "Failed to allocate IIO trigger\n");
757
758 st->trig->ops = &ads1119_trigger_ops;
759 iio_trigger_set_drvdata(st->trig, indio_dev);
760
761 ret = devm_iio_trigger_register(dev, st->trig);
762 if (ret)
763 return dev_err_probe(dev, ret,
764 "Failed to register IIO trigger\n");
765 }
766
767 ret = ads1119_init(st, vref_external);
768 if (ret)
769 return dev_err_probe(dev, ret,
770 "Failed to initialize device\n");
771
772 pm_runtime_set_autosuspend_delay(dev, ADS1119_SUSPEND_DELAY);
773 pm_runtime_use_autosuspend(dev);
774 pm_runtime_mark_last_busy(dev);
775 pm_runtime_set_active(dev);
776
777 ret = devm_pm_runtime_enable(dev);
778 if (ret)
779 return dev_err_probe(dev, ret, "Failed to enable pm runtime\n");
780
781 ret = devm_add_action_or_reset(dev, ads1119_powerdown, st);
782 if (ret)
783 return dev_err_probe(dev, ret,
784 "Failed to add powerdown action\n");
785
786 return devm_iio_device_register(dev, indio_dev);
787 }
788
ads1119_runtime_suspend(struct device * dev)789 static int ads1119_runtime_suspend(struct device *dev)
790 {
791 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
792 struct ads1119_state *st = iio_priv(indio_dev);
793
794 return i2c_smbus_write_byte(st->client, ADS1119_CMD_POWERDOWN);
795 }
796
797 /*
798 * The ADS1119 does not require a resume function because it automatically
799 * powers on after a reset.
800 * After a power down command, the ADS1119 can still communicate but turns off
801 * its analog parts. To resume from power down, the device will power up again
802 * upon receiving a start/sync command.
803 */
804 static DEFINE_RUNTIME_DEV_PM_OPS(ads1119_pm_ops, ads1119_runtime_suspend,
805 NULL, NULL);
806
807 static const struct of_device_id __maybe_unused ads1119_of_match[] = {
808 { .compatible = "ti,ads1119" },
809 { }
810 };
811 MODULE_DEVICE_TABLE(of, ads1119_of_match);
812
813 static const struct i2c_device_id ads1119_id[] = {
814 { "ads1119" },
815 { }
816 };
817 MODULE_DEVICE_TABLE(i2c, ads1119_id);
818
819 static struct i2c_driver ads1119_driver = {
820 .driver = {
821 .name = "ads1119",
822 .of_match_table = ads1119_of_match,
823 .pm = pm_ptr(&ads1119_pm_ops),
824 },
825 .probe = ads1119_probe,
826 .id_table = ads1119_id,
827 };
828 module_i2c_driver(ads1119_driver);
829
830 MODULE_AUTHOR("João Paulo Gonçalves <joao.goncalves@toradex.com>");
831 MODULE_DESCRIPTION("Texas Instruments ADS1119 ADC Driver");
832 MODULE_LICENSE("GPL");
833