1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _ADM1026_IMPL_H 28 #define _ADM1026_IMPL_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 37 #include <sys/i2c/clients/i2c_client.h> 38 39 typedef struct adm1026_unit { 40 kmutex_t adm1026_mutex; 41 int adm1026_oflag; 42 i2c_client_hdl_t adm1026_hdl; 43 } adm1026_unit_t; 44 45 /* 46 * ADM1026 has 4 GPIO Config registers used to set Polarity and Direction. 47 * To config a particular GPIO, the low 16 bits of the reg_mask member 48 * of the i2c_gpio_t struct is used as a logical mask to indicate which 49 * GPIO pin(s) to access and the reg_val member is used to set/clear those 50 * GPIO pins' P or D bit(s). 51 * 52 * GPIO# 3 2 1 0 53 * +--+--+--+--+ 54 * |PD|PD|PD|PD| <-- ADM1026_GPIO_CFG1 55 * +--+--+--+--+ Logical Mask: 0x000f 56 * 57 * GPIO# 7 6 5 4 58 * +--+--+--+--+ 59 * |PD|PD|PD|PD| <-- ADM1026_GPIO_CFG2 60 * +--+--+--+--+ Logical Mask: 0x00f0 61 * 62 * GPIO# 11 10 9 8 63 * +--+--+--+--+ 64 * |PD|PD|PD|PD| <-- ADM1026_GPIO_CFG3 65 * +--+--+--+--+ Logical Mask: 0x0f00 66 * 67 * GPIO# 15 14 13 12 68 * +--+--+--+--+ 69 * |PD|PD|PD|PD| <-- ADM1026_GPIO_CFG4 70 * +--+--+--+--+ Logical Mask: 0xf000 71 */ 72 73 #define ADM1026_GPIO_CFG1 0x08 /* Config GPIO 03-00 in/out + hi/lo */ 74 #define ADM1026_GPIO_CFG2 0x09 /* Config GPIO 07-04 in/out + hi/lo */ 75 #define ADM1026_GPIO_CFG3 0x0a /* Config GPIO 11-08 in/out + hi/lo */ 76 #define ADM1026_GPIO_CFG4 0x0b /* Config GPIO 15-12 in/out + hi/lo */ 77 78 /* 79 * ADM1026 has 2 GPIO Output registers to set GPIO pins. 80 * To set a particular GPIO pin, the low 16 bits of the reg_mask member 81 * of the i2c_gpio_t struct is used as a 1:1 mask of the 16 GPIO pin(s) 82 * to access and the reg_val member is used to set/clear the GPIO pin(s). 83 * 84 * GPIO# 76 54 32 10 85 * 86 * +--+--+--+--+ 87 * |xx|xx|xx|xx| <-- ADM1026_STS_REG5 88 * +--+--+--+--+ Logical Mask: 0x00ff 89 * 90 * GPIO# 11 11 11 98 91 * 54 32 10 92 * +--+--+--+--+ 93 * |xx|xx|xx|xx| <-- ADM1026_STS_REG6 94 * +--+--+--+--+ Logical Mask: 0xff00 95 */ 96 97 #define ADM1026_STS_REG5 0x24 /* GPIO 07-00 */ 98 #define ADM1026_STS_REG6 0x25 /* GPIO 15-08 */ 99 100 #define OUTPUT_SHIFT 8 101 #define BITSPERCFG 2 /* Polarity + Dir bits per GPIO cfg */ 102 103 #define DIR_BIT 1 /* Dir bit = lo bit of GPIO cfg */ 104 #define POLARITY_BIT 2 /* Polarity bit = hi bit GPIO cfg */ 105 106 #define BYTES_PER_OUTPUT 2 107 108 #define BYTES_PER_CONFIG 4 109 110 #define NUMBER_OF_GPIOS 16 111 112 #define GPIOS_PER_CFG_BYTE 4 113 114 #define GPIO_CFG_MASK 0xf 115 116 117 #ifdef DEBUG 118 119 static int adm1026_dbg = 0; 120 #define D1CMN_ERR(ARGS) { if (adm1026_dbg & 0x1) cmn_err ARGS; } 121 #define D2CMN_ERR(ARGS) { if (adm1026_dbg & 0x2) cmn_err ARGS; } 122 123 #else 124 125 #define D1CMN_ERR(ARGS) 126 #define D2CMN_ERR(ARGS) 127 128 #endif 129 130 #ifdef __cplusplus 131 } 132 #endif 133 134 #endif /* _ADM1026_IMPL_H */ 135