1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * AD7606 SPI ADC driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 */
7
8 #include <linux/delay.h>
9 #include <linux/device.h>
10 #include <linux/err.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/property.h>
16 #include <linux/regulator/consumer.h>
17 #include <linux/sched.h>
18 #include <linux/slab.h>
19 #include <linux/sysfs.h>
20 #include <linux/util_macros.h>
21
22 #include <linux/iio/iio.h>
23 #include <linux/iio/buffer.h>
24 #include <linux/iio/sysfs.h>
25 #include <linux/iio/trigger.h>
26 #include <linux/iio/triggered_buffer.h>
27 #include <linux/iio/trigger_consumer.h>
28
29 #include "ad7606.h"
30
31 /*
32 * Scales are computed as 5000/32768 and 10000/32768 respectively,
33 * so that when applied to the raw values they provide mV values
34 */
35 static const unsigned int ad7606_scale_avail[2] = {
36 152588, 305176
37 };
38
39
40 static const unsigned int ad7616_sw_scale_avail[3] = {
41 76293, 152588, 305176
42 };
43
44 static const unsigned int ad7606_oversampling_avail[7] = {
45 1, 2, 4, 8, 16, 32, 64,
46 };
47
48 static const unsigned int ad7616_oversampling_avail[8] = {
49 1, 2, 4, 8, 16, 32, 64, 128,
50 };
51
ad7606_reset(struct ad7606_state * st)52 int ad7606_reset(struct ad7606_state *st)
53 {
54 if (st->gpio_reset) {
55 gpiod_set_value(st->gpio_reset, 1);
56 ndelay(100); /* t_reset >= 100ns */
57 gpiod_set_value(st->gpio_reset, 0);
58 return 0;
59 }
60
61 return -ENODEV;
62 }
63 EXPORT_SYMBOL_NS_GPL(ad7606_reset, IIO_AD7606);
64
ad7606_reg_access(struct iio_dev * indio_dev,unsigned int reg,unsigned int writeval,unsigned int * readval)65 static int ad7606_reg_access(struct iio_dev *indio_dev,
66 unsigned int reg,
67 unsigned int writeval,
68 unsigned int *readval)
69 {
70 struct ad7606_state *st = iio_priv(indio_dev);
71 int ret;
72
73 guard(mutex)(&st->lock);
74
75 if (readval) {
76 ret = st->bops->reg_read(st, reg);
77 if (ret < 0)
78 return ret;
79 *readval = ret;
80 return 0;
81 } else {
82 return st->bops->reg_write(st, reg, writeval);
83 }
84 }
85
ad7606_read_samples(struct ad7606_state * st)86 static int ad7606_read_samples(struct ad7606_state *st)
87 {
88 unsigned int num = st->chip_info->num_channels - 1;
89 u16 *data = st->data;
90
91 return st->bops->read_block(st->dev, num, data);
92 }
93
ad7606_trigger_handler(int irq,void * p)94 static irqreturn_t ad7606_trigger_handler(int irq, void *p)
95 {
96 struct iio_poll_func *pf = p;
97 struct iio_dev *indio_dev = pf->indio_dev;
98 struct ad7606_state *st = iio_priv(indio_dev);
99 int ret;
100
101 guard(mutex)(&st->lock);
102
103 ret = ad7606_read_samples(st);
104 if (ret)
105 goto error_ret;
106
107 iio_push_to_buffers_with_timestamp(indio_dev, st->data,
108 iio_get_time_ns(indio_dev));
109 error_ret:
110 iio_trigger_notify_done(indio_dev->trig);
111 /* The rising edge of the CONVST signal starts a new conversion. */
112 gpiod_set_value(st->gpio_convst, 1);
113
114 return IRQ_HANDLED;
115 }
116
ad7606_scan_direct(struct iio_dev * indio_dev,unsigned int ch)117 static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch)
118 {
119 struct ad7606_state *st = iio_priv(indio_dev);
120 int ret;
121
122 gpiod_set_value(st->gpio_convst, 1);
123 ret = wait_for_completion_timeout(&st->completion,
124 msecs_to_jiffies(1000));
125 if (!ret) {
126 ret = -ETIMEDOUT;
127 goto error_ret;
128 }
129
130 ret = ad7606_read_samples(st);
131 if (ret == 0)
132 ret = st->data[ch];
133
134 error_ret:
135 gpiod_set_value(st->gpio_convst, 0);
136
137 return ret;
138 }
139
ad7606_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)140 static int ad7606_read_raw(struct iio_dev *indio_dev,
141 struct iio_chan_spec const *chan,
142 int *val,
143 int *val2,
144 long m)
145 {
146 int ret, ch = 0;
147 struct ad7606_state *st = iio_priv(indio_dev);
148
149 switch (m) {
150 case IIO_CHAN_INFO_RAW:
151 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
152 ret = ad7606_scan_direct(indio_dev, chan->address);
153 if (ret < 0)
154 return ret;
155 *val = (short) ret;
156 return IIO_VAL_INT;
157 }
158 unreachable();
159 case IIO_CHAN_INFO_SCALE:
160 if (st->sw_mode_en)
161 ch = chan->address;
162 *val = 0;
163 *val2 = st->scale_avail[st->range[ch]];
164 return IIO_VAL_INT_PLUS_MICRO;
165 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
166 *val = st->oversampling;
167 return IIO_VAL_INT;
168 }
169 return -EINVAL;
170 }
171
ad7606_show_avail(char * buf,const unsigned int * vals,unsigned int n,bool micros)172 static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals,
173 unsigned int n, bool micros)
174 {
175 size_t len = 0;
176 int i;
177
178 for (i = 0; i < n; i++) {
179 len += scnprintf(buf + len, PAGE_SIZE - len,
180 micros ? "0.%06u " : "%u ", vals[i]);
181 }
182 buf[len - 1] = '\n';
183
184 return len;
185 }
186
in_voltage_scale_available_show(struct device * dev,struct device_attribute * attr,char * buf)187 static ssize_t in_voltage_scale_available_show(struct device *dev,
188 struct device_attribute *attr,
189 char *buf)
190 {
191 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
192 struct ad7606_state *st = iio_priv(indio_dev);
193
194 return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true);
195 }
196
197 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0);
198
ad7606_write_scale_hw(struct iio_dev * indio_dev,int ch,int val)199 static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val)
200 {
201 struct ad7606_state *st = iio_priv(indio_dev);
202
203 gpiod_set_value(st->gpio_range, val);
204
205 return 0;
206 }
207
ad7606_write_os_hw(struct iio_dev * indio_dev,int val)208 static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val)
209 {
210 struct ad7606_state *st = iio_priv(indio_dev);
211 DECLARE_BITMAP(values, 3);
212
213 values[0] = val & GENMASK(2, 0);
214
215 gpiod_set_array_value(st->gpio_os->ndescs, st->gpio_os->desc,
216 st->gpio_os->info, values);
217
218 /* AD7616 requires a reset to update value */
219 if (st->chip_info->os_req_reset)
220 ad7606_reset(st);
221
222 return 0;
223 }
224
ad7606_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)225 static int ad7606_write_raw(struct iio_dev *indio_dev,
226 struct iio_chan_spec const *chan,
227 int val,
228 int val2,
229 long mask)
230 {
231 struct ad7606_state *st = iio_priv(indio_dev);
232 int i, ret, ch = 0;
233
234 guard(mutex)(&st->lock);
235
236 switch (mask) {
237 case IIO_CHAN_INFO_SCALE:
238 i = find_closest(val2, st->scale_avail, st->num_scales);
239 if (st->sw_mode_en)
240 ch = chan->address;
241 ret = st->write_scale(indio_dev, ch, i);
242 if (ret < 0)
243 return ret;
244 st->range[ch] = i;
245
246 return 0;
247 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
248 if (val2)
249 return -EINVAL;
250 i = find_closest(val, st->oversampling_avail,
251 st->num_os_ratios);
252 ret = st->write_os(indio_dev, i);
253 if (ret < 0)
254 return ret;
255
256 return 0;
257 default:
258 return -EINVAL;
259 }
260 }
261
ad7606_oversampling_ratio_avail(struct device * dev,struct device_attribute * attr,char * buf)262 static ssize_t ad7606_oversampling_ratio_avail(struct device *dev,
263 struct device_attribute *attr,
264 char *buf)
265 {
266 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
267 struct ad7606_state *st = iio_priv(indio_dev);
268
269 return ad7606_show_avail(buf, st->oversampling_avail,
270 st->num_os_ratios, false);
271 }
272
273 static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444,
274 ad7606_oversampling_ratio_avail, NULL, 0);
275
276 static struct attribute *ad7606_attributes_os_and_range[] = {
277 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
278 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
279 NULL,
280 };
281
282 static const struct attribute_group ad7606_attribute_group_os_and_range = {
283 .attrs = ad7606_attributes_os_and_range,
284 };
285
286 static struct attribute *ad7606_attributes_os[] = {
287 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
288 NULL,
289 };
290
291 static const struct attribute_group ad7606_attribute_group_os = {
292 .attrs = ad7606_attributes_os,
293 };
294
295 static struct attribute *ad7606_attributes_range[] = {
296 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
297 NULL,
298 };
299
300 static const struct attribute_group ad7606_attribute_group_range = {
301 .attrs = ad7606_attributes_range,
302 };
303
304 static const struct iio_chan_spec ad7605_channels[] = {
305 IIO_CHAN_SOFT_TIMESTAMP(4),
306 AD7605_CHANNEL(0),
307 AD7605_CHANNEL(1),
308 AD7605_CHANNEL(2),
309 AD7605_CHANNEL(3),
310 };
311
312 static const struct iio_chan_spec ad7606_channels[] = {
313 IIO_CHAN_SOFT_TIMESTAMP(8),
314 AD7606_CHANNEL(0),
315 AD7606_CHANNEL(1),
316 AD7606_CHANNEL(2),
317 AD7606_CHANNEL(3),
318 AD7606_CHANNEL(4),
319 AD7606_CHANNEL(5),
320 AD7606_CHANNEL(6),
321 AD7606_CHANNEL(7),
322 };
323
324 /*
325 * The current assumption that this driver makes for AD7616, is that it's
326 * working in Hardware Mode with Serial, Burst and Sequencer modes activated.
327 * To activate them, following pins must be pulled high:
328 * -SER/PAR
329 * -SEQEN
330 * And following pins must be pulled low:
331 * -WR/BURST
332 * -DB4/SER1W
333 */
334 static const struct iio_chan_spec ad7616_channels[] = {
335 IIO_CHAN_SOFT_TIMESTAMP(16),
336 AD7606_CHANNEL(0),
337 AD7606_CHANNEL(1),
338 AD7606_CHANNEL(2),
339 AD7606_CHANNEL(3),
340 AD7606_CHANNEL(4),
341 AD7606_CHANNEL(5),
342 AD7606_CHANNEL(6),
343 AD7606_CHANNEL(7),
344 AD7606_CHANNEL(8),
345 AD7606_CHANNEL(9),
346 AD7606_CHANNEL(10),
347 AD7606_CHANNEL(11),
348 AD7606_CHANNEL(12),
349 AD7606_CHANNEL(13),
350 AD7606_CHANNEL(14),
351 AD7606_CHANNEL(15),
352 };
353
354 static const struct ad7606_chip_info ad7606_chip_info_tbl[] = {
355 /* More devices added in future */
356 [ID_AD7605_4] = {
357 .channels = ad7605_channels,
358 .num_channels = 5,
359 },
360 [ID_AD7606_8] = {
361 .channels = ad7606_channels,
362 .num_channels = 9,
363 .oversampling_avail = ad7606_oversampling_avail,
364 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
365 },
366 [ID_AD7606_6] = {
367 .channels = ad7606_channels,
368 .num_channels = 7,
369 .oversampling_avail = ad7606_oversampling_avail,
370 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
371 },
372 [ID_AD7606_4] = {
373 .channels = ad7606_channels,
374 .num_channels = 5,
375 .oversampling_avail = ad7606_oversampling_avail,
376 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
377 },
378 [ID_AD7606B] = {
379 .channels = ad7606_channels,
380 .num_channels = 9,
381 .oversampling_avail = ad7606_oversampling_avail,
382 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
383 },
384 [ID_AD7616] = {
385 .channels = ad7616_channels,
386 .num_channels = 17,
387 .oversampling_avail = ad7616_oversampling_avail,
388 .oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail),
389 .os_req_reset = true,
390 .init_delay_ms = 15,
391 },
392 };
393
ad7606_request_gpios(struct ad7606_state * st)394 static int ad7606_request_gpios(struct ad7606_state *st)
395 {
396 struct device *dev = st->dev;
397
398 st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start",
399 GPIOD_OUT_LOW);
400 if (IS_ERR(st->gpio_convst))
401 return PTR_ERR(st->gpio_convst);
402
403 st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
404 if (IS_ERR(st->gpio_reset))
405 return PTR_ERR(st->gpio_reset);
406
407 st->gpio_range = devm_gpiod_get_optional(dev, "adi,range",
408 GPIOD_OUT_LOW);
409 if (IS_ERR(st->gpio_range))
410 return PTR_ERR(st->gpio_range);
411
412 st->gpio_standby = devm_gpiod_get_optional(dev, "standby",
413 GPIOD_OUT_LOW);
414 if (IS_ERR(st->gpio_standby))
415 return PTR_ERR(st->gpio_standby);
416
417 st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data",
418 GPIOD_IN);
419 if (IS_ERR(st->gpio_frstdata))
420 return PTR_ERR(st->gpio_frstdata);
421
422 if (!st->chip_info->oversampling_num)
423 return 0;
424
425 st->gpio_os = devm_gpiod_get_array_optional(dev,
426 "adi,oversampling-ratio",
427 GPIOD_OUT_LOW);
428 return PTR_ERR_OR_ZERO(st->gpio_os);
429 }
430
431 /*
432 * The BUSY signal indicates when conversions are in progress, so when a rising
433 * edge of CONVST is applied, BUSY goes logic high and transitions low at the
434 * end of the entire conversion process. The falling edge of the BUSY signal
435 * triggers this interrupt.
436 */
ad7606_interrupt(int irq,void * dev_id)437 static irqreturn_t ad7606_interrupt(int irq, void *dev_id)
438 {
439 struct iio_dev *indio_dev = dev_id;
440 struct ad7606_state *st = iio_priv(indio_dev);
441
442 if (iio_buffer_enabled(indio_dev)) {
443 gpiod_set_value(st->gpio_convst, 0);
444 iio_trigger_poll_nested(st->trig);
445 } else {
446 complete(&st->completion);
447 }
448
449 return IRQ_HANDLED;
450 };
451
ad7606_validate_trigger(struct iio_dev * indio_dev,struct iio_trigger * trig)452 static int ad7606_validate_trigger(struct iio_dev *indio_dev,
453 struct iio_trigger *trig)
454 {
455 struct ad7606_state *st = iio_priv(indio_dev);
456
457 if (st->trig != trig)
458 return -EINVAL;
459
460 return 0;
461 }
462
ad7606_buffer_postenable(struct iio_dev * indio_dev)463 static int ad7606_buffer_postenable(struct iio_dev *indio_dev)
464 {
465 struct ad7606_state *st = iio_priv(indio_dev);
466
467 gpiod_set_value(st->gpio_convst, 1);
468
469 return 0;
470 }
471
ad7606_buffer_predisable(struct iio_dev * indio_dev)472 static int ad7606_buffer_predisable(struct iio_dev *indio_dev)
473 {
474 struct ad7606_state *st = iio_priv(indio_dev);
475
476 gpiod_set_value(st->gpio_convst, 0);
477
478 return 0;
479 }
480
481 static const struct iio_buffer_setup_ops ad7606_buffer_ops = {
482 .postenable = &ad7606_buffer_postenable,
483 .predisable = &ad7606_buffer_predisable,
484 };
485
486 static const struct iio_info ad7606_info_no_os_or_range = {
487 .read_raw = &ad7606_read_raw,
488 .validate_trigger = &ad7606_validate_trigger,
489 };
490
491 static const struct iio_info ad7606_info_os_and_range = {
492 .read_raw = &ad7606_read_raw,
493 .write_raw = &ad7606_write_raw,
494 .attrs = &ad7606_attribute_group_os_and_range,
495 .validate_trigger = &ad7606_validate_trigger,
496 };
497
498 static const struct iio_info ad7606_info_os_range_and_debug = {
499 .read_raw = &ad7606_read_raw,
500 .write_raw = &ad7606_write_raw,
501 .debugfs_reg_access = &ad7606_reg_access,
502 .attrs = &ad7606_attribute_group_os_and_range,
503 .validate_trigger = &ad7606_validate_trigger,
504 };
505
506 static const struct iio_info ad7606_info_os = {
507 .read_raw = &ad7606_read_raw,
508 .write_raw = &ad7606_write_raw,
509 .attrs = &ad7606_attribute_group_os,
510 .validate_trigger = &ad7606_validate_trigger,
511 };
512
513 static const struct iio_info ad7606_info_range = {
514 .read_raw = &ad7606_read_raw,
515 .write_raw = &ad7606_write_raw,
516 .attrs = &ad7606_attribute_group_range,
517 .validate_trigger = &ad7606_validate_trigger,
518 };
519
520 static const struct iio_trigger_ops ad7606_trigger_ops = {
521 .validate_device = iio_trigger_validate_own_device,
522 };
523
ad7606_probe(struct device * dev,int irq,void __iomem * base_address,const char * name,unsigned int id,const struct ad7606_bus_ops * bops)524 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
525 const char *name, unsigned int id,
526 const struct ad7606_bus_ops *bops)
527 {
528 struct ad7606_state *st;
529 int ret;
530 struct iio_dev *indio_dev;
531
532 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
533 if (!indio_dev)
534 return -ENOMEM;
535
536 st = iio_priv(indio_dev);
537 dev_set_drvdata(dev, indio_dev);
538
539 st->dev = dev;
540 mutex_init(&st->lock);
541 st->bops = bops;
542 st->base_address = base_address;
543 /* tied to logic low, analog input range is +/- 5V */
544 st->range[0] = 0;
545 st->oversampling = 1;
546 st->scale_avail = ad7606_scale_avail;
547 st->num_scales = ARRAY_SIZE(ad7606_scale_avail);
548
549 ret = devm_regulator_get_enable(dev, "avcc");
550 if (ret)
551 return dev_err_probe(dev, ret,
552 "Failed to enable specified AVcc supply\n");
553
554 st->chip_info = &ad7606_chip_info_tbl[id];
555
556 if (st->chip_info->oversampling_num) {
557 st->oversampling_avail = st->chip_info->oversampling_avail;
558 st->num_os_ratios = st->chip_info->oversampling_num;
559 }
560
561 ret = ad7606_request_gpios(st);
562 if (ret)
563 return ret;
564
565 if (st->gpio_os) {
566 if (st->gpio_range)
567 indio_dev->info = &ad7606_info_os_and_range;
568 else
569 indio_dev->info = &ad7606_info_os;
570 } else {
571 if (st->gpio_range)
572 indio_dev->info = &ad7606_info_range;
573 else
574 indio_dev->info = &ad7606_info_no_os_or_range;
575 }
576 indio_dev->modes = INDIO_DIRECT_MODE;
577 indio_dev->name = name;
578 indio_dev->channels = st->chip_info->channels;
579 indio_dev->num_channels = st->chip_info->num_channels;
580
581 init_completion(&st->completion);
582
583 ret = ad7606_reset(st);
584 if (ret)
585 dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n");
586
587 /* AD7616 requires al least 15ms to reconfigure after a reset */
588 if (st->chip_info->init_delay_ms) {
589 if (msleep_interruptible(st->chip_info->init_delay_ms))
590 return -ERESTARTSYS;
591 }
592
593 st->write_scale = ad7606_write_scale_hw;
594 st->write_os = ad7606_write_os_hw;
595
596 if (st->bops->sw_mode_config)
597 st->sw_mode_en = device_property_present(st->dev,
598 "adi,sw-mode");
599
600 if (st->sw_mode_en) {
601 /* Scale of 0.076293 is only available in sw mode */
602 st->scale_avail = ad7616_sw_scale_avail;
603 st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail);
604
605 /* After reset, in software mode, ±10 V is set by default */
606 memset32(st->range, 2, ARRAY_SIZE(st->range));
607 indio_dev->info = &ad7606_info_os_range_and_debug;
608
609 ret = st->bops->sw_mode_config(indio_dev);
610 if (ret < 0)
611 return ret;
612 }
613
614 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
615 indio_dev->name,
616 iio_device_id(indio_dev));
617 if (!st->trig)
618 return -ENOMEM;
619
620 st->trig->ops = &ad7606_trigger_ops;
621 iio_trigger_set_drvdata(st->trig, indio_dev);
622 ret = devm_iio_trigger_register(dev, st->trig);
623 if (ret)
624 return ret;
625
626 indio_dev->trig = iio_trigger_get(st->trig);
627
628 ret = devm_request_threaded_irq(dev, irq,
629 NULL,
630 &ad7606_interrupt,
631 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
632 name, indio_dev);
633 if (ret)
634 return ret;
635
636 ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
637 &iio_pollfunc_store_time,
638 &ad7606_trigger_handler,
639 &ad7606_buffer_ops);
640 if (ret)
641 return ret;
642
643 return devm_iio_device_register(dev, indio_dev);
644 }
645 EXPORT_SYMBOL_NS_GPL(ad7606_probe, IIO_AD7606);
646
647 #ifdef CONFIG_PM_SLEEP
648
ad7606_suspend(struct device * dev)649 static int ad7606_suspend(struct device *dev)
650 {
651 struct iio_dev *indio_dev = dev_get_drvdata(dev);
652 struct ad7606_state *st = iio_priv(indio_dev);
653
654 if (st->gpio_standby) {
655 gpiod_set_value(st->gpio_range, 1);
656 gpiod_set_value(st->gpio_standby, 1);
657 }
658
659 return 0;
660 }
661
ad7606_resume(struct device * dev)662 static int ad7606_resume(struct device *dev)
663 {
664 struct iio_dev *indio_dev = dev_get_drvdata(dev);
665 struct ad7606_state *st = iio_priv(indio_dev);
666
667 if (st->gpio_standby) {
668 gpiod_set_value(st->gpio_range, st->range[0]);
669 gpiod_set_value(st->gpio_standby, 1);
670 ad7606_reset(st);
671 }
672
673 return 0;
674 }
675
676 SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume);
677 EXPORT_SYMBOL_NS_GPL(ad7606_pm_ops, IIO_AD7606);
678
679 #endif
680
681 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
682 MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
683 MODULE_LICENSE("GPL v2");
684