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Searched defs:_val (Results 1 – 14 of 14) sorted by relevance

/titanic_52/usr/src/uts/common/io/bnxe/577xx/drivers/common/include/
H A Dutils.h62 #define SET_BIT( _bits, _val ) SET_FLAGS ( _bits, (0x1ULL << _val) ) argument
63 #define RESET_BIT( _bits, _val ) RESET_FLAGS( _bits, (0x1ULL << _val) ) argument
64 #define GET_BIT( _bits, _val ) GET_FLAGS ( _bits, (0x1ULL << _val) ) argument
/titanic_52/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_hw_attn.c202 #define MASK_VALUE_GENERATE(_val) ((u32_t)((((u64_t)0x1)<<_val)-1)) in disable_blocks_attention() argument
574 #define GRC_TIMEOUT_MASK_ADDRESS(_val) ( (_val) & ((1<<19)-1)) // 0x000fffff in lm_latch_attn_everest_processing() argument
575 #define GRC_TIMEOUT_MASK_FUNCTION(_val) ( (_val>>20) & ((1<<3)-1)) // 0x00700000 in lm_latch_attn_everest_processing() argument
576 #define GRC_TIMEOUT_MASK_MASTER(_val) ( (_val>>24) & ((1<<4)-1)) // 0x0f000000 in lm_latch_attn_everest_processing() argument
H A Dlm_dcbx_mp.c57 #define ETH_CID_COSX_END_OFFSET(_pdev, _val) (_val + MAX_NUM_OF_ACTIVE_ETH_CONS_PER_COS(pdev)) argument
H A Dlm_niv.c290 #define NIV_STATS_ASSIGN_HI_LO(_field, _val) _field##_hi = U64_HI((_val));\ argument
H A Dlm_stats.c68 #define STATS_DATA(_bits,_val) ( (_val) & DATA_MASK(_bits) ) argument
71 #define INC_WRAPAROUND_COUNT(_bits,_val) (_val + ( 1ull << _bits ) ) argument
H A Dlm_devinfo.c2902 #define SET_PARAM_VAL(_pdev, _entry, _val) \ in lm_init_params() argument
/titanic_52/usr/src/contrib/ast/src/lib/libast/include/
H A Dsfio_s.h45 ssize_t _val; /* values or string lengths */ member
/titanic_52/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dcdu_def.h16 #define CDU_RSRVD_INVALIDATE_CONTEXT_VALUE(_val) ((_val) & ~0x80) argument
/titanic_52/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/
H A Dlm5710.h3932 #define REG_WR_IND(_pdev, _reg_offset, _val) lm_reg_wr_ind(_pdev, (_reg_offset), _val) argument
3936 #define LM_BAR_WR32_ADDRESS(_pdev, _address, _val) \ argument
3941 #define LM_BAR_WR32_ADDRESS(_pdev, _address, _val) \ argument
3988 #define LM_BAR_WR8_OFFSET(_pdev, _bar, _offset, _val) \ argument
3996 #define LM_BAR_WR16_OFFSET(_pdev, _bar, _offset, _val) \ argument
4004 LM_BAR_WR32_OFFSET(_pdev,_bar,_offset,_val) global() argument
4012 LM_BAR_WR64_OFFSET(_pdev,_bar,_offset,_val) global() argument
4038 LM_BAR_WR8_OFFSET(_pdev,_bar,_offset,_val) global() argument
4040 LM_BAR_WR16_OFFSET(_pdev,_bar,_offset,_val) global() argument
4042 LM_BAR_WR32_OFFSET(_pdev,_bar,_offset,_val) global() argument
4044 LM_BAR_WR64_OFFSET(_pdev,_bar,_offset,_val) global() argument
4054 LOG_REG_RD(_pdev,_offset,_val) global() argument
4060 LOG_REG_WR(_pdev,_offset,_val) global() argument
4068 LOG_REG_RD(_pdev,_offset,_val) global() argument
4069 LOG_REG_WR(_pdev,_offset,_val) global() argument
4091 REG_WR(_pdev,_reg_offset,_val) global() argument
4097 VF_REG_WR(_pdev,_reg_offset,_val) global() argument
4106 REG_WR(_pdev,_reg_offset,_val) global() argument
4117 VF_REG_WR(_pdev,_reg_offset,_val) global() argument
4153 REG_WR(_pdev,_reg_offset,_val) global() argument
4161 VF_REG_WR(_pdev,_reg_offset,_val) global() argument
4194 REG_WR(_pdev,_reg_offset,_val) global() argument
4201 VF_REG_WR(_pdev,_reg_offset,_val) global() argument
4221 LM_SHMEM_WRITE_IMP(_pdev,_offset,_val,_shmem_base_name) global() argument
4224 LM_SHMEM_WRITE(_pdev,_offset,_val) global() argument
4225 LM_SHMEM2_WRITE(_pdev,_offset,_val) global() argument
4226 LM_MFCFG_WRITE(_pdev,_offset,_val) global() argument
4238 LM_INTMEM_WRITE8(_pdev,_offset,_val,_type) global() argument
4246 LM_INTMEM_WRITE16(_pdev,_offset,_val,_type) global() argument
4254 LM_INTMEM_WRITE32(_pdev,_offset,_val,_type) global() argument
4262 LM_INTMEM_WRITE64(_pdev,_offset,_val,_type) global() argument
[all...]
/titanic_52/usr/src/uts/intel/sys/
H A Dmca_x86.h141 uint32_t _val:1; /* <63> */ member
155 uint32_t _val:1; /* <63> */ member
/titanic_52/usr/src/contrib/ast/src/lib/libast/sfio/
H A Dsfhdr.h41 #define _val val macro
/titanic_52/usr/src/uts/common/io/arn/
H A Darn_ath9k.h612 #define REG_WRITE(_ah, _reg, _val) arn_iowrite32((_ah), (_reg), (_val)) argument
/titanic_52/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c326 #define CL22_WR_OVER_CL45(_cb, _phy, _bank, _addr, _val) \ argument
332 #define CL22_RD_OVER_CL45(_cb, _phy, _bank, _addr, _val) \ argument
/titanic_52/usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/
H A Decore_sp_verbs.c75 #define ECORE_TODO_FW_COMMAND(_pdev, _drv_msg_code, _val) (-1) argument