xref: /linux/drivers/net/ethernet/meta/fbnic/fbnic_fw.h (revision 2c1ed907520c50326b8f604907a8478b27881a2e)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */
3 
4 #ifndef _FBNIC_FW_H_
5 #define _FBNIC_FW_H_
6 
7 #include <linux/if_ether.h>
8 #include <linux/types.h>
9 
10 struct fbnic_dev;
11 struct fbnic_tlv_msg;
12 
13 struct fbnic_fw_mbx {
14 	u8 ready, head, tail;
15 	struct {
16 		struct fbnic_tlv_msg	*msg;
17 		dma_addr_t		addr;
18 	} buf_info[FBNIC_IPC_MBX_DESC_LEN];
19 };
20 
21 // FW_VER_MAX_SIZE must match ETHTOOL_FWVERS_LEN
22 #define FBNIC_FW_VER_MAX_SIZE	                32
23 // Formatted version is in the format XX.YY.ZZ_RRR_COMMIT
24 #define FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE	(FBNIC_FW_VER_MAX_SIZE - 13)
25 #define FBNIC_FW_LOG_MAX_SIZE	                256
26 
27 struct fbnic_fw_ver {
28 	u32 version;
29 	char commit[FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE];
30 };
31 
32 struct fbnic_fw_cap {
33 	struct {
34 		struct fbnic_fw_ver mgmt, bootloader;
35 	} running;
36 	struct {
37 		struct fbnic_fw_ver mgmt, bootloader, undi;
38 	} stored;
39 	u8	active_slot;
40 	u8	bmc_mac_addr[4][ETH_ALEN];
41 	u8	bmc_present	: 1;
42 	u8	all_multi	: 1;
43 	u8	link_speed;
44 	u8	link_fec;
45 };
46 
47 struct fbnic_fw_completion {
48 	u32 msg_type;
49 	struct completion done;
50 	struct kref ref_count;
51 	int result;
52 	union {
53 		struct {
54 			s32 millivolts;
55 			s32 millidegrees;
56 		} tsene;
57 	} u;
58 };
59 
60 void fbnic_mbx_init(struct fbnic_dev *fbd);
61 void fbnic_mbx_clean(struct fbnic_dev *fbd);
62 void fbnic_mbx_poll(struct fbnic_dev *fbd);
63 int fbnic_mbx_poll_tx_ready(struct fbnic_dev *fbd);
64 void fbnic_mbx_flush_tx(struct fbnic_dev *fbd);
65 int fbnic_fw_xmit_ownership_msg(struct fbnic_dev *fbd, bool take_ownership);
66 int fbnic_fw_init_heartbeat(struct fbnic_dev *fbd, bool poll);
67 void fbnic_fw_check_heartbeat(struct fbnic_dev *fbd);
68 int fbnic_fw_xmit_tsene_read_msg(struct fbnic_dev *fbd,
69 				 struct fbnic_fw_completion *cmpl_data);
70 void fbnic_fw_init_cmpl(struct fbnic_fw_completion *cmpl_data,
71 			u32 msg_type);
72 void fbnic_fw_clear_compl(struct fbnic_dev *fbd);
73 void fbnic_fw_put_cmpl(struct fbnic_fw_completion *cmpl_data);
74 
75 #define fbnic_mk_full_fw_ver_str(_rev_id, _delim, _commit, _str, _str_sz) \
76 do {									\
77 	const u32 __rev_id = _rev_id;					\
78 	snprintf(_str, _str_sz, "%02lu.%02lu.%02lu-%03lu%s%s",	\
79 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MAJOR, __rev_id),	\
80 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_MINOR, __rev_id),	\
81 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_PATCH, __rev_id),	\
82 		 FIELD_GET(FBNIC_FW_CAP_RESP_VERSION_BUILD, __rev_id),	\
83 		 _delim, _commit);					\
84 } while (0)
85 
86 #define fbnic_mk_fw_ver_str(_rev_id, _str) \
87 	fbnic_mk_full_fw_ver_str(_rev_id, "", "", _str, sizeof(_str))
88 
89 #define FW_HEARTBEAT_PERIOD		(10 * HZ)
90 
91 enum {
92 	FBNIC_TLV_MSG_ID_HOST_CAP_REQ			= 0x10,
93 	FBNIC_TLV_MSG_ID_FW_CAP_RESP			= 0x11,
94 	FBNIC_TLV_MSG_ID_OWNERSHIP_REQ			= 0x12,
95 	FBNIC_TLV_MSG_ID_OWNERSHIP_RESP			= 0x13,
96 	FBNIC_TLV_MSG_ID_HEARTBEAT_REQ			= 0x14,
97 	FBNIC_TLV_MSG_ID_HEARTBEAT_RESP			= 0x15,
98 	FBNIC_TLV_MSG_ID_TSENE_READ_REQ			= 0x3C,
99 	FBNIC_TLV_MSG_ID_TSENE_READ_RESP		= 0x3D,
100 };
101 
102 #define FBNIC_FW_CAP_RESP_VERSION_MAJOR		CSR_GENMASK(31, 24)
103 #define FBNIC_FW_CAP_RESP_VERSION_MINOR		CSR_GENMASK(23, 16)
104 #define FBNIC_FW_CAP_RESP_VERSION_PATCH		CSR_GENMASK(15, 8)
105 #define FBNIC_FW_CAP_RESP_VERSION_BUILD		CSR_GENMASK(7, 0)
106 enum {
107 	FBNIC_FW_CAP_RESP_VERSION			= 0x0,
108 	FBNIC_FW_CAP_RESP_BMC_PRESENT			= 0x1,
109 	FBNIC_FW_CAP_RESP_BMC_MAC_ADDR			= 0x2,
110 	FBNIC_FW_CAP_RESP_BMC_MAC_ARRAY			= 0x3,
111 	FBNIC_FW_CAP_RESP_STORED_VERSION		= 0x4,
112 	FBNIC_FW_CAP_RESP_ACTIVE_FW_SLOT		= 0x5,
113 	FBNIC_FW_CAP_RESP_VERSION_COMMIT_STR		= 0x6,
114 	FBNIC_FW_CAP_RESP_BMC_ALL_MULTI			= 0x8,
115 	FBNIC_FW_CAP_RESP_FW_STATE			= 0x9,
116 	FBNIC_FW_CAP_RESP_FW_LINK_SPEED			= 0xa,
117 	FBNIC_FW_CAP_RESP_FW_LINK_FEC			= 0xb,
118 	FBNIC_FW_CAP_RESP_STORED_COMMIT_STR		= 0xc,
119 	FBNIC_FW_CAP_RESP_CMRT_VERSION			= 0xd,
120 	FBNIC_FW_CAP_RESP_STORED_CMRT_VERSION		= 0xe,
121 	FBNIC_FW_CAP_RESP_CMRT_COMMIT_STR		= 0xf,
122 	FBNIC_FW_CAP_RESP_STORED_CMRT_COMMIT_STR	= 0x10,
123 	FBNIC_FW_CAP_RESP_UEFI_VERSION			= 0x11,
124 	FBNIC_FW_CAP_RESP_UEFI_COMMIT_STR		= 0x12,
125 	FBNIC_FW_CAP_RESP_MSG_MAX
126 };
127 
128 enum {
129 	FBNIC_FW_LINK_SPEED_25R1		= 1,
130 	FBNIC_FW_LINK_SPEED_50R2		= 2,
131 	FBNIC_FW_LINK_SPEED_50R1		= 3,
132 	FBNIC_FW_LINK_SPEED_100R2		= 4,
133 };
134 
135 enum {
136 	FBNIC_FW_LINK_FEC_NONE			= 1,
137 	FBNIC_FW_LINK_FEC_RS			= 2,
138 	FBNIC_FW_LINK_FEC_BASER			= 3,
139 };
140 
141 enum {
142 	FBNIC_TSENE_THERM			= 0x0,
143 	FBNIC_TSENE_VOLT			= 0x1,
144 	FBNIC_TSENE_ERROR			= 0x2,
145 	FBNIC_TSENE_MSG_MAX
146 };
147 
148 enum {
149 	FBNIC_FW_OWNERSHIP_FLAG			= 0x0,
150 	FBNIC_FW_OWNERSHIP_MSG_MAX
151 };
152 #endif /* _FBNIC_FW_H_ */
153