1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Copyright © 2023 Intel Corporation
4 */
5
6 #ifndef __INTEL_PCODE_H__
7 #define __INTEL_PCODE_H__
8
9 #include "intel_uncore.h"
10 #include "xe_pcode.h"
11
12 static inline int
snb_pcode_write_timeout(struct intel_uncore * uncore,u32 mbox,u32 val,int fast_timeout_us,int slow_timeout_ms)13 snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val,
14 int fast_timeout_us, int slow_timeout_ms)
15 {
16 return xe_pcode_write_timeout(__compat_uncore_to_tile(uncore), mbox, val,
17 slow_timeout_ms ?: 1);
18 }
19
20 static inline int
snb_pcode_write(struct intel_uncore * uncore,u32 mbox,u32 val)21 snb_pcode_write(struct intel_uncore *uncore, u32 mbox, u32 val)
22 {
23
24 return xe_pcode_write(__compat_uncore_to_tile(uncore), mbox, val);
25 }
26
27 static inline int
snb_pcode_read(struct intel_uncore * uncore,u32 mbox,u32 * val,u32 * val1)28 snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1)
29 {
30 return xe_pcode_read(__compat_uncore_to_tile(uncore), mbox, val, val1);
31 }
32
33 static inline int
skl_pcode_request(struct intel_uncore * uncore,u32 mbox,u32 request,u32 reply_mask,u32 reply,int timeout_base_ms)34 skl_pcode_request(struct intel_uncore *uncore, u32 mbox,
35 u32 request, u32 reply_mask, u32 reply,
36 int timeout_base_ms)
37 {
38 return xe_pcode_request(__compat_uncore_to_tile(uncore), mbox, request, reply_mask, reply,
39 timeout_base_ms);
40 }
41
42 #endif /* __INTEL_PCODE_H__ */
43