xref: /illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_init_ops.h (revision 14b24e2b79293068c8e016a69ef1d872fb5e2fd5)
1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, v.1,  (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://opensource.org/licenses/CDDL-1.0.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 
22 /*
23 * Copyright 2014-2017 Cavium, Inc.
24 * The contents of this file are subject to the terms of the Common Development
25 * and Distribution License, v.1,  (the "License").
26 
27 * You may not use this file except in compliance with the License.
28 
29 * You can obtain a copy of the License at available
30 * at http://opensource.org/licenses/CDDL-1.0
31 
32 * See the License for the specific language governing permissions and
33 * limitations under the License.
34 */
35 
36 #ifndef __ECORE_INIT_OPS__
37 #define __ECORE_INIT_OPS__
38 
39 #include "ecore.h"
40 
41 /**
42  * @brief ecore_init_iro_array - init iro_arr.
43  *
44  *
45  * @param p_dev
46  */
47 void ecore_init_iro_array(struct ecore_dev *p_dev);
48 
49 /**
50  * @brief ecore_init_run - Run the init-sequence.
51  *
52  *
53  * @param p_hwfn
54  * @param p_ptt
55  * @param phase
56  * @param phase_id
57  * @param modes
58  * @return _ecore_status_t
59  */
60 enum _ecore_status_t ecore_init_run(struct ecore_hwfn *p_hwfn,
61 				    struct ecore_ptt  *p_ptt,
62 				    int               phase,
63 				    int               phase_id,
64 				    int               modes);
65 
66 /**
67  * @brief ecore_init_hwfn_allocate - Allocate RT array, Store 'values' ptrs.
68  *
69  *
70  * @param p_hwfn
71  *
72  * @return _ecore_status_t
73  */
74 enum _ecore_status_t ecore_init_alloc(struct ecore_hwfn *p_hwfn);
75 
76 /**
77  * @brief ecore_init_hwfn_deallocate
78  *
79  *
80  * @param p_hwfn
81  */
82 void ecore_init_free(struct ecore_hwfn *p_hwfn);
83 
84 
85 /**
86  * @brief ecore_init_clear_rt_data - Clears the runtime init array.
87  *
88  *
89  * @param p_hwfn
90  */
91 void ecore_init_clear_rt_data(struct ecore_hwfn *p_hwfn);
92 
93 /**
94  * @brief ecore_init_store_rt_reg - Store a configuration value in the RT array.
95  *
96  *
97  * @param p_hwfn
98  * @param rt_offset
99  * @param val
100  */
101 void ecore_init_store_rt_reg(struct ecore_hwfn *p_hwfn,
102 			     u32               	rt_offset,
103 			     u32               	val);
104 
105 #define STORE_RT_REG(hwfn, offset, val)				\
106 	ecore_init_store_rt_reg(hwfn, offset, val)
107 
108 #define OVERWRITE_RT_REG(hwfn, offset, val)			\
109 	ecore_init_store_rt_reg(hwfn, offset, val)
110 
111 /**
112 * @brief
113 *
114 *
115 * @param p_hwfn
116 * @param rt_offset
117 * @param val
118 * @param size
119 */
120 
121 void ecore_init_store_rt_agg(struct ecore_hwfn *p_hwfn,
122 			     u32               rt_offset,
123 			     u32               *val,
124 			     osal_size_t       size);
125 
126 #define STORE_RT_REG_AGG(hwfn, offset, val)			\
127 	ecore_init_store_rt_agg(hwfn, offset, (u32*)&val, sizeof(val))
128 
129 
130 /**
131  * @brief
132  *      Initialize GTT global windows and set admin window
133  *      related params of GTT/PTT to default values.
134  *
135  * @param p_hwfn
136  */
137 void ecore_gtt_init(struct ecore_hwfn *p_hwfn);
138 #endif /* __ECORE_INIT_OPS__ */
139