1 /** @file 2 This files describes the CPU I/O 2 Protocol. 3 4 This protocol provides an I/O abstraction for a system processor. This protocol 5 is used by a PCI root bridge I/O driver to perform memory-mapped I/O and I/O transactions. 6 The I/O or memory primitives can be used by the consumer of the protocol to materialize 7 bus-specific configuration cycles, such as the transitional configuration address and data 8 ports for PCI. Only drivers that require direct access to the entire system should use this 9 protocol. 10 11 Note: This is a boot-services only protocol and it may not be used by runtime drivers after 12 ExitBootServices(). It is different from the Framework CPU I/O Protocol, which is a runtime 13 protocol and can be used by runtime drivers after ExitBootServices(). 14 15 Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR> 16 SPDX-License-Identifier: BSD-2-Clause-Patent 17 18 @par Revision Reference: 19 This Protocol is defined in UEFI Platform Initialization Specification 1.2 20 Volume 5: Standards 21 22 **/ 23 24 #ifndef __CPU_IO2_H__ 25 #define __CPU_IO2_H__ 26 27 #define EFI_CPU_IO2_PROTOCOL_GUID \ 28 { \ 29 0xad61f191, 0xae5f, 0x4c0e, {0xb9, 0xfa, 0xe8, 0x69, 0xd2, 0x88, 0xc6, 0x4f} \ 30 } 31 32 typedef struct _EFI_CPU_IO2_PROTOCOL EFI_CPU_IO2_PROTOCOL; 33 34 /// 35 /// Enumeration that defines the width of the I/O operation. 36 /// 37 typedef enum { 38 EfiCpuIoWidthUint8, 39 EfiCpuIoWidthUint16, 40 EfiCpuIoWidthUint32, 41 EfiCpuIoWidthUint64, 42 EfiCpuIoWidthFifoUint8, 43 EfiCpuIoWidthFifoUint16, 44 EfiCpuIoWidthFifoUint32, 45 EfiCpuIoWidthFifoUint64, 46 EfiCpuIoWidthFillUint8, 47 EfiCpuIoWidthFillUint16, 48 EfiCpuIoWidthFillUint32, 49 EfiCpuIoWidthFillUint64, 50 EfiCpuIoWidthMaximum 51 } EFI_CPU_IO_PROTOCOL_WIDTH; 52 53 /** 54 Enables a driver to access registers in the PI CPU I/O space. 55 56 The Io.Read() and Io.Write() functions enable a driver to access PCI controller 57 registers in the PI CPU I/O space. 58 59 The I/O operations are carried out exactly as requested. The caller is responsible 60 for satisfying any alignment and I/O width restrictions that a PI System on a 61 platform might require. For example on some platforms, width requests of 62 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will 63 be handled by the driver. 64 65 If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, 66 or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for 67 each of the Count operations that is performed. 68 69 If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, 70 EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is 71 incremented for each of the Count operations that is performed. The read or 72 write operation is performed Count times on the same Address. 73 74 If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, 75 EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is 76 incremented for each of the Count operations that is performed. The read or 77 write operation is performed Count times from the first element of Buffer. 78 79 @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance. 80 @param[in] Width Signifies the width of the I/O or Memory operation. 81 @param[in] Address The base address of the I/O operation. 82 @param[in] Count The number of I/O operations to perform. The number 83 of bytes moved is Width size * Count, starting at Address. 84 @param[in, out] Buffer For read operations, the destination buffer to store the results. 85 For write operations, the source buffer from which to write data. 86 87 @retval EFI_SUCCESS The data was read from or written to the PI system. 88 @retval EFI_INVALID_PARAMETER Width is invalid for this PI system. 89 @retval EFI_INVALID_PARAMETER Buffer is NULL. 90 @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width. 91 @retval EFI_UNSUPPORTED The address range specified by Address, Width, 92 and Count is not valid for this PI system. 93 94 **/ 95 typedef 96 EFI_STATUS 97 (EFIAPI *EFI_CPU_IO_PROTOCOL_IO_MEM)( 98 IN EFI_CPU_IO2_PROTOCOL *This, 99 IN EFI_CPU_IO_PROTOCOL_WIDTH Width, 100 IN UINT64 Address, 101 IN UINTN Count, 102 IN OUT VOID *Buffer 103 ); 104 105 /// 106 /// Service for read and write accesses. 107 /// 108 typedef struct { 109 /// 110 /// This service provides the various modalities of memory and I/O read. 111 /// 112 EFI_CPU_IO_PROTOCOL_IO_MEM Read; 113 /// 114 /// This service provides the various modalities of memory and I/O write. 115 /// 116 EFI_CPU_IO_PROTOCOL_IO_MEM Write; 117 } EFI_CPU_IO_PROTOCOL_ACCESS; 118 119 /// 120 /// Provides the basic memory and I/O interfaces that are used to abstract 121 /// accesses to devices in a system. 122 /// 123 struct _EFI_CPU_IO2_PROTOCOL { 124 /// 125 /// Enables a driver to access memory-mapped registers in the EFI system memory space. 126 /// 127 EFI_CPU_IO_PROTOCOL_ACCESS Mem; 128 /// 129 /// Enables a driver to access registers in the EFI CPU I/O space. 130 /// 131 EFI_CPU_IO_PROTOCOL_ACCESS Io; 132 }; 133 134 extern EFI_GUID gEfiCpuIo2ProtocolGuid; 135 136 #endif 137