1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2011, 2016, 2025 Chelsio Communications. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28 29 #ifndef __T4_REGS_VALUES_H__ 30 #define __T4_REGS_VALUES_H__ 31 32 /* 33 * This file contains definitions for various T4 register value hardware 34 * constants. The types of values encoded here are predominantly those for 35 * register fields which control "modal" behavior. For the most part, we do 36 * not include definitions for register fields which are simple numeric 37 * metrics, etc. 38 * 39 * These new "modal values" use a naming convention which matches the 40 * currently existing macros in t4_reg.h. For register field FOO which would 41 * have S_FOO, M_FOO, V_FOO() and G_FOO() macros, we introduce X_FOO_{MODE} 42 * definitions. These can be used as V_FOO(X_FOO_MODE) or as (G_FOO(x) == 43 * X_FOO_MODE). 44 * 45 * Note that this should all be part of t4_regs.h but the toolset used to 46 * generate that file doesn't [yet] have the capability of collecting these 47 * constants. 48 */ 49 50 /* 51 * SGE definitions. 52 * ================ 53 */ 54 55 /* 56 * SGE register field values. 57 */ 58 59 /* CONTROL register */ 60 #define X_FLSPLITMODE_FLSPLITMIN 0 61 #define X_FLSPLITMODE_ETHHDR 1 62 #define X_FLSPLITMODE_IPHDR 2 63 #define X_FLSPLITMODE_TCPHDR 3 64 65 #define X_DCASYSTYPE_FSB 0 66 #define X_DCASYSTYPE_CSI 1 67 68 #define X_EGSTATPAGESIZE_64B 0 69 #define X_EGSTATPAGESIZE_128B 1 70 71 #define X_RXPKTCPLMODE_DATA 0 72 #define X_RXPKTCPLMODE_SPLIT 1 73 74 #define X_INGPCIEBOUNDARY_SHIFT 5 75 #define X_INGPCIEBOUNDARY_32B 0 76 #define X_INGPCIEBOUNDARY_64B 1 77 #define X_INGPCIEBOUNDARY_128B 2 78 #define X_INGPCIEBOUNDARY_256B 3 79 #define X_INGPCIEBOUNDARY_512B 4 80 #define X_INGPCIEBOUNDARY_1024B 5 81 #define X_INGPCIEBOUNDARY_2048B 6 82 #define X_INGPCIEBOUNDARY_4096B 7 83 84 #define X_T6_INGPADBOUNDARY_SHIFT 3 85 #define X_T6_INGPADBOUNDARY_8B 0 86 #define X_T6_INGPADBOUNDARY_16B 1 87 #define X_T6_INGPADBOUNDARY_32B 2 88 #define X_T6_INGPADBOUNDARY_64B 3 89 #define X_T6_INGPADBOUNDARY_128B 4 90 #define X_T6_INGPADBOUNDARY_256B 5 91 #define X_T6_INGPADBOUNDARY_512B 6 92 #define X_T6_INGPADBOUNDARY_1024B 7 93 94 #define X_INGPADBOUNDARY_SHIFT 5 95 #define X_INGPADBOUNDARY_32B 0 96 #define X_INGPADBOUNDARY_64B 1 97 #define X_INGPADBOUNDARY_128B 2 98 #define X_INGPADBOUNDARY_256B 3 99 #define X_INGPADBOUNDARY_512B 4 100 #define X_INGPADBOUNDARY_1024B 5 101 #define X_INGPADBOUNDARY_2048B 6 102 #define X_INGPADBOUNDARY_4096B 7 103 104 #define X_EGRPCIEBOUNDARY_SHIFT 5 105 #define X_EGRPCIEBOUNDARY_32B 0 106 #define X_EGRPCIEBOUNDARY_64B 1 107 #define X_EGRPCIEBOUNDARY_128B 2 108 #define X_EGRPCIEBOUNDARY_256B 3 109 #define X_EGRPCIEBOUNDARY_512B 4 110 #define X_EGRPCIEBOUNDARY_1024B 5 111 #define X_EGRPCIEBOUNDARY_2048B 6 112 #define X_EGRPCIEBOUNDARY_4096B 7 113 114 /* CONTROL2 register */ 115 #define X_INGPACKBOUNDARY_SHIFT 5 // *most* of the values ... 116 #define X_INGPACKBOUNDARY_16B 0 // Note weird value! 117 #define X_INGPACKBOUNDARY_64B 1 118 #define X_INGPACKBOUNDARY_128B 2 119 #define X_INGPACKBOUNDARY_256B 3 120 #define X_INGPACKBOUNDARY_512B 4 121 #define X_INGPACKBOUNDARY_1024B 5 122 #define X_INGPACKBOUNDARY_2048B 6 123 #define X_INGPACKBOUNDARY_4096B 7 124 125 /* GTS register */ 126 #define SGE_TIMERREGS 6 127 #define X_TIMERREG_COUNTER0 0 128 #define X_TIMERREG_COUNTER1 1 129 #define X_TIMERREG_COUNTER2 2 130 #define X_TIMERREG_COUNTER3 3 131 #define X_TIMERREG_COUNTER4 4 132 #define X_TIMERREG_COUNTER5 5 133 #define X_TIMERREG_RESTART_COUNTER 6 134 #define X_TIMERREG_UPDATE_CIDX 7 135 136 /* 137 * Egress Context field values 138 */ 139 #define EC_WR_UNITS 16 140 141 #define X_FETCHBURSTMIN_SHIFT 4 142 #define X_FETCHBURSTMIN_16B 0 143 #define X_FETCHBURSTMIN_32B 1 144 #define X_FETCHBURSTMIN_64B 2 145 #define X_FETCHBURSTMIN_128B 3 146 147 /* T6 and later use a single-bit encoding for FetchBurstMin */ 148 #define X_FETCHBURSTMIN_SHIFT_T6 6 149 #define X_FETCHBURSTMIN_64B_T6 0 150 #define X_FETCHBURSTMIN_128B_T6 1 151 152 #define X_FETCHBURSTMAX_SHIFT 6 153 #define X_FETCHBURSTMAX_64B 0 154 #define X_FETCHBURSTMAX_128B 1 155 #define X_FETCHBURSTMAX_256B 2 156 #define X_FETCHBURSTMAX_512B 3 157 158 #define X_HOSTFCMODE_NONE 0 159 #define X_HOSTFCMODE_INGRESS_QUEUE 1 160 #define X_HOSTFCMODE_STATUS_PAGE 2 161 #define X_HOSTFCMODE_BOTH 3 162 163 #define X_HOSTFCOWNER_UP 0 164 #define X_HOSTFCOWNER_SGE 1 165 166 #define X_CIDXFLUSHTHRESH_1 0 167 #define X_CIDXFLUSHTHRESH_2 1 168 #define X_CIDXFLUSHTHRESH_4 2 169 #define X_CIDXFLUSHTHRESH_8 3 170 #define X_CIDXFLUSHTHRESH_16 4 171 #define X_CIDXFLUSHTHRESH_32 5 172 #define X_CIDXFLUSHTHRESH_64 6 173 #define X_CIDXFLUSHTHRESH_128 7 174 175 #define X_IDXSIZE_UNIT 64 176 177 #define X_BASEADDRESS_ALIGN 512 178 179 /* 180 * Ingress Context field values 181 */ 182 #define X_UPDATESCHEDULING_TIMER 0 183 #define X_UPDATESCHEDULING_COUNTER_OPTTIMER 1 184 185 #define X_UPDATEDELIVERY_NONE 0 186 #define X_UPDATEDELIVERY_INTERRUPT 1 187 #define X_UPDATEDELIVERY_STATUS_PAGE 2 188 #define X_UPDATEDELIVERY_BOTH 3 189 190 #define X_INTERRUPTDESTINATION_PCIE 0 191 #define X_INTERRUPTDESTINATION_IQ 1 192 193 #define X_QUEUEENTRYSIZE_16B 0 194 #define X_QUEUEENTRYSIZE_32B 1 195 #define X_QUEUEENTRYSIZE_64B 2 196 #define X_QUEUEENTRYSIZE_128B 3 197 198 #define IC_SIZE_UNIT 16 199 #define IC_BASEADDRESS_ALIGN 512 200 201 #define X_RSPD_TYPE_FLBUF 0 202 #define X_RSPD_TYPE_CPL 1 203 #define X_RSPD_TYPE_INTR 2 204 205 /* 206 * Context field definitions. This is by no means a complete list of SGE 207 * Context fields. In the vast majority of cases the firmware initializes 208 * things the way they need to be set up. But in a few small cases, we need 209 * to compute new values and ship them off to the firmware to be applied to 210 * the SGE Conexts ... 211 */ 212 213 /* 214 * Congestion Manager Definitions. 215 */ 216 #define S_CONMCTXT_CNGTPMODE 19 217 #define M_CONMCTXT_CNGTPMODE 0x3 218 #define V_CONMCTXT_CNGTPMODE(x) ((x) << S_CONMCTXT_CNGTPMODE) 219 #define G_CONMCTXT_CNGTPMODE(x) \ 220 (((x) >> S_CONMCTXT_CNGTPMODE) & M_CONMCTXT_CNGTPMODE) 221 #define S_CONMCTXT_CNGCHMAP 0 222 #define M_CONMCTXT_CNGCHMAP 0xffff 223 #define V_CONMCTXT_CNGCHMAP(x) ((x) << S_CONMCTXT_CNGCHMAP) 224 #define G_CONMCTXT_CNGCHMAP(x) \ 225 (((x) >> S_CONMCTXT_CNGCHMAP) & M_CONMCTXT_CNGCHMAP) 226 227 #define X_CONMCTXT_CNGTPMODE_DISABLE 0 228 #define X_CONMCTXT_CNGTPMODE_QUEUE 1 229 #define X_CONMCTXT_CNGTPMODE_CHANNEL 2 230 #define X_CONMCTXT_CNGTPMODE_BOTH 3 231 232 /* 233 * T5 and later support a new BAR2-based doorbell mechanism for Egress Queues. 234 * The User Doorbells are each 128 bytes in length with a Simple Doorbell at 235 * offsets 8x and a Write Combining single 64-byte Egress Queue Unit 236 * (X_IDXSIZE_UNIT) Gather Buffer interface at offset 64. For Ingress Queues, 237 * we have a Going To Sleep register at offsets 8x+4. 238 * 239 * As noted above, we have many instances of the Simple Doorbell and Going To 240 * Sleep registers at offsets 8x and 8x+4, respectively. We want to use a 241 * non-64-byte aligned offset for the Simple Doorbell in order to attempt to 242 * avoid buffering of the writes to the Simple Doorbell and we want to use a 243 * non-contiguous offset for the Going To Sleep writes in order to avoid 244 * possible combining between them. 245 */ 246 #define SGE_UDB_SIZE 128 247 #define SGE_UDB_KDOORBELL 8 248 #define SGE_UDB_GTS 20 249 #define SGE_UDB_WCDOORBELL 64 250 251 /* 252 * CIM definitions. 253 * ================ 254 */ 255 256 /* 257 * CIM register field values. 258 */ 259 #define X_MBOWNER_NONE 0 260 #define X_MBOWNER_FW 1 261 #define X_MBOWNER_PL 2 262 #define X_MBOWNER_FW_DEFERRED 3 263 264 /* 265 * PCI-E definitions. 266 * ================== 267 */ 268 269 #define X_WINDOW_SHIFT 10 270 #define X_PCIEOFST_SHIFT 10 271 #define X_T7_MEMOFST_SHIFT 4 272 273 /* 274 * TP definitions. 275 * =============== 276 */ 277 278 /* 279 * TP_VLAN_PRI_MAP controls which subset of fields will be present in the 280 * Compressed Filter Tuple for LE filters. Each bit set in TP_VLAN_PRI_MAP 281 * selects for a particular field being present. These fields, when present 282 * in the Compressed Filter Tuple, have the following widths in bits. 283 */ 284 #define S_FT_FIRST S_FCOE 285 #define S_FT_LAST S_FRAGMENTATION 286 287 #define S_T7_FT_FIRST S_IPSECIDX 288 #define S_T7_FT_LAST S_TCPFLAGS 289 290 #define W_FT_IPSECIDX 12 291 #define W_FT_FCOE 1 292 #define W_FT_PORT 3 293 #define W_FT_VNIC_ID 17 294 #define W_FT_VLAN 17 295 #define W_FT_TOS 8 296 #define W_FT_PROTOCOL 8 297 #define W_FT_ETHERTYPE 16 298 #define W_FT_MACMATCH 9 299 #define W_FT_MPSHITTYPE 3 300 #define W_FT_FRAGMENTATION 1 301 #define W_FT_ROCE 1 302 #define W_FT_SYNONLY 1 303 #define W_FT_TCPFLAGS 12 304 305 /* 306 * Some of the Compressed Filter Tuple fields have internal structure. These 307 * bit shifts/masks describe those structures. All shifts are relative to the 308 * base position of the fields within the Compressed Filter Tuple 309 */ 310 #define S_FT_VLAN_VLD 16 311 #define V_FT_VLAN_VLD(x) ((x) << S_FT_VLAN_VLD) 312 #define F_FT_VLAN_VLD V_FT_VLAN_VLD(1U) 313 314 #define S_FT_VNID_ID_VF 0 315 #define M_FT_VNID_ID_VF 0x7fU 316 #define V_FT_VNID_ID_VF(x) ((x) << S_FT_VNID_ID_VF) 317 #define G_FT_VNID_ID_VF(x) (((x) >> S_FT_VNID_ID_VF) & M_FT_VNID_ID_VF) 318 319 #define S_FT_VNID_ID_PF 7 320 #define M_FT_VNID_ID_PF 0x7U 321 #define V_FT_VNID_ID_PF(x) ((x) << S_FT_VNID_ID_PF) 322 #define G_FT_VNID_ID_PF(x) (((x) >> S_FT_VNID_ID_PF) & M_FT_VNID_ID_PF) 323 324 #define S_FT_VNID_ID_VLD 16 325 #define V_FT_VNID_ID_VLD(x) ((x) << S_FT_VNID_ID_VLD) 326 #define F_FT_VNID_ID_VLD V_FT_VNID_ID_VLD(1U) 327 328 #endif /* __T4_REGS_VALUES_H__ */ 329