xref: /freebsd/lib/libc/amd64/amd64_archlevel.h (revision ad2fac552c3fcb577feb3055fa083f2d256c06ed)
1 /*-
2  * Copyright (c) 2023 The FreeBSD Foundation
3  *
4  * This software was developed by Robert Clausecker <fuz@FreeBSD.org>
5  * under sponsorship from the FreeBSD Foundation.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ''AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE
27  */
28 
29 /* must be macros so they can be accessed from assembly */
30 #define X86_64_SCALAR    0 /* disable SIMD optimisations */
31 #define	X86_64_BASELINE  1 /* CMOV, CX8, FPU, FXSR, MMX, OSFXSR, SSE, SSE2 */
32 #define	X86_64_V2        2 /* CMPXCHG16B, LAHF-SAHF, POPCNT, SSE3, SSSE3, SSE4_1, SSE4_2 */
33 #define	X86_64_V3        3 /* AVX, AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, OSXSAVE */
34 #define	X86_64_V4        4 /* AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL */
35 
36 #define	X86_64_MAX       X86_64_V4 /* highest supported architecture level */
37 #define	X86_64_UNDEFINED -1 /* architecture level not set yet */
38 
39 #ifndef __ASSEMBLER__
40 #include <dlfcn.h>
41 
42 dlfunc_t	__archlevel_resolve(u_int, u_int, u_int, u_int,
43 		    int32_t[X86_64_MAX + 1]) __hidden;
44 #else
45 #include <machine/asm.h>
46 
47 #define ARCHRESOLVE(func) \
48 	.globl CNAME(func); \
49 	.type CNAME(func), @gnu_indirect_function; \
50 	.set CNAME(func), __CONCAT(func,_resolver); \
51 	ARCHENTRY(func, resolver); \
52 	lea __CONCAT(func,_funcs)(%rip), %r8; \
53 	jmp CNAME(__archlevel_resolve); \
54 	ARCHEND(func, resolver)
55 
56 /*
57  * The func_funcs array stores the location of the implementations
58  * as the distance from the func_funcs array to the function.  Due
59  * to compiling for the medium code model, a 32 bit integer suffices
60  * to hold the distance.
61  *
62  * Doing it this way both saves storage and avoids giving rtld
63  * relocations to process at load time.
64  */
65 #define ARCHFUNCS(func) \
66 	ARCHRESOLVE(func); \
67 	.section .rodata; \
68 	.align 4; \
69 	__CONCAT(func,_funcs):
70 
71 #define NOARCHFUNC \
72 	.4byte 0
73 
74 #define ARCHFUNC(func, level) \
75 	.4byte __CONCAT(__CONCAT(func,_),level) - __CONCAT(func,_funcs)
76 
77 #define ENDARCHFUNCS(func) \
78 	.zero 4*(X86_64_MAX+1)-(.-__CONCAT(func,_funcs)); \
79 	.size __CONCAT(func,_funcs), .-__CONCAT(func,_funcs)
80 
81 #define ARCHENTRY(func, level) \
82 	_START_ENTRY; \
83 	.type __CONCAT(__CONCAT(func,_),level), @function; \
84 	__CONCAT(__CONCAT(func,_),level):; \
85 	.cfi_startproc
86 
87 #define ARCHEND(func, level) \
88 	END(__CONCAT(__CONCAT(func,_),level))
89 
90 #endif  /* __ASSEMBLER__ */
91