xref: /freebsd/sys/arm64/include/vmm_dev.h (revision a4197ea477771d525c2970d0c42acab727e43f16)
1 /*
2  * Copyright (C) 2015 Mihai Carabas <mihai.carabas@gmail.com>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 #ifndef	_VMM_DEV_H_
28 #define	_VMM_DEV_H_
29 
30 #include <sys/domainset.h>
31 
32 #include <machine/vmm.h>
33 
34 struct vm_memmap {
35 	vm_paddr_t	gpa;
36 	int		segid;		/* memory segment */
37 	vm_ooffset_t	segoff;		/* offset into memory segment */
38 	size_t		len;		/* mmap length */
39 	int		prot;		/* RWX */
40 	int		flags;
41 };
42 #define	VM_MEMMAP_F_WIRED	0x01
43 
44 struct vm_munmap {
45 	vm_paddr_t	gpa;
46 	size_t		len;
47 };
48 
49 #define	VM_MEMSEG_NAME(m)	((m)->name[0] != '\0' ? (m)->name : NULL)
50 struct vm_memseg {
51 	int		segid;
52 	size_t		len;
53 	char		name[VM_MAX_SUFFIXLEN + 1];
54 	domainset_t	*ds_mask;
55 	size_t		ds_mask_size;
56 	int		ds_policy;
57 };
58 
59 struct vm_register {
60 	int		cpuid;
61 	int		regnum;		/* enum vm_reg_name */
62 	uint64_t	regval;
63 };
64 
65 struct vm_register_set {
66 	int		cpuid;
67 	unsigned int	count;
68 	const int	*regnums;	/* enum vm_reg_name */
69 	uint64_t	*regvals;
70 };
71 
72 struct vm_run {
73 	int		cpuid;
74 	cpuset_t	*cpuset;	/* CPU set storage */
75 	size_t		cpusetsize;
76 	struct vm_exit	*vm_exit;
77 };
78 
79 struct vm_exception {
80 	int		cpuid;
81 	uint64_t	esr;
82 	uint64_t	far;
83 };
84 
85 struct vm_msi {
86 	uint64_t	msg;
87 	uint64_t	addr;
88 	int		bus;
89 	int		slot;
90 	int		func;
91 };
92 
93 struct vm_capability {
94 	int		cpuid;
95 	enum vm_cap_type captype;
96 	int		capval;
97 	int		allcpus;
98 };
99 
100 #define	MAX_VM_STATS	64
101 struct vm_stats {
102 	int		cpuid;				/* in */
103 	int		index;				/* in */
104 	int		num_entries;			/* out */
105 	struct timeval	tv;
106 	uint64_t	statbuf[MAX_VM_STATS];
107 };
108 struct vm_stat_desc {
109 	int		index;				/* in */
110 	char		desc[128];			/* out */
111 };
112 
113 struct vm_suspend {
114 	enum vm_suspend_how how;
115 };
116 
117 struct vm_gla2gpa {
118 	int		vcpuid;		/* inputs */
119 	int 		prot;		/* PROT_READ or PROT_WRITE */
120 	uint64_t	gla;
121 	struct vm_guest_paging paging;
122 	int		fault;		/* outputs */
123 	uint64_t	gpa;
124 };
125 
126 struct vm_activate_cpu {
127 	int		vcpuid;
128 };
129 
130 struct vm_cpuset {
131 	int		which;
132 	int		cpusetsize;
133 	cpuset_t	*cpus;
134 };
135 #define	VM_ACTIVE_CPUS		0
136 #define	VM_SUSPENDED_CPUS	1
137 #define	VM_DEBUG_CPUS		2
138 
139 struct vm_vgic_version {
140 	u_int version;
141 	u_int flags;
142 };
143 
144 struct vm_vgic_descr {
145 	struct vm_vgic_version ver;
146 	union {
147 		struct {
148 			uint64_t dist_start;
149 			uint64_t dist_size;
150 			uint64_t redist_start;
151 			uint64_t redist_size;
152 		} v3_regs;
153 	};
154 };
155 
156 struct vm_irq {
157 	uint32_t irq;
158 };
159 
160 struct vm_cpu_topology {
161 	uint16_t	sockets;
162 	uint16_t	cores;
163 	uint16_t	threads;
164 	uint16_t	maxcpus;
165 };
166 
167 enum {
168 	/* general routines */
169 	IOCNUM_ABIVERS = 0,
170 	IOCNUM_RUN = 1,
171 	IOCNUM_SET_CAPABILITY = 2,
172 	IOCNUM_GET_CAPABILITY = 3,
173 	IOCNUM_SUSPEND = 4,
174 	IOCNUM_REINIT = 5,
175 
176 	/* memory apis */
177 	IOCNUM_GET_GPA_PMAP = 12,
178 	IOCNUM_GLA2GPA_NOFAULT = 13,
179 	IOCNUM_ALLOC_MEMSEG = 14,
180 	IOCNUM_GET_MEMSEG = 15,
181 	IOCNUM_MMAP_MEMSEG = 16,
182 	IOCNUM_MMAP_GETNEXT = 17,
183 	IOCNUM_MUNMAP_MEMSEG = 18,
184 
185 	/* register/state accessors */
186 	IOCNUM_SET_REGISTER = 20,
187 	IOCNUM_GET_REGISTER = 21,
188 	IOCNUM_SET_REGISTER_SET = 24,
189 	IOCNUM_GET_REGISTER_SET = 25,
190 
191 	/* statistics */
192 	IOCNUM_VM_STATS = 50,
193 	IOCNUM_VM_STAT_DESC = 51,
194 
195 	/* CPU Topology */
196 	IOCNUM_SET_TOPOLOGY = 63,
197 	IOCNUM_GET_TOPOLOGY = 64,
198 
199 	/* interrupt injection */
200 	IOCNUM_ASSERT_IRQ = 80,
201 	IOCNUM_DEASSERT_IRQ = 81,
202 	IOCNUM_RAISE_MSI = 82,
203 	IOCNUM_INJECT_EXCEPTION = 83,
204 
205 	/* vm_cpuset */
206 	IOCNUM_ACTIVATE_CPU = 90,
207 	IOCNUM_GET_CPUSET = 91,
208 	IOCNUM_SUSPEND_CPU = 92,
209 	IOCNUM_RESUME_CPU = 93,
210 
211 	/* vm_attach_vgic */
212 	IOCNUM_GET_VGIC_VERSION = 110,
213 	IOCNUM_ATTACH_VGIC = 111,
214 };
215 
216 #define	VM_RUN		\
217 	_IOWR('v', IOCNUM_RUN, struct vm_run)
218 #define	VM_SUSPEND	\
219 	_IOW('v', IOCNUM_SUSPEND, struct vm_suspend)
220 #define	VM_REINIT	\
221 	_IO('v', IOCNUM_REINIT)
222 #define	VM_ALLOC_MEMSEG	\
223 	_IOW('v', IOCNUM_ALLOC_MEMSEG, struct vm_memseg)
224 #define	VM_GET_MEMSEG	\
225 	_IOWR('v', IOCNUM_GET_MEMSEG, struct vm_memseg)
226 #define	VM_MMAP_MEMSEG	\
227 	_IOW('v', IOCNUM_MMAP_MEMSEG, struct vm_memmap)
228 #define	VM_MMAP_GETNEXT	\
229 	_IOWR('v', IOCNUM_MMAP_GETNEXT, struct vm_memmap)
230 #define	VM_MUNMAP_MEMSEG	\
231 	_IOW('v', IOCNUM_MUNMAP_MEMSEG, struct vm_munmap)
232 #define	VM_SET_REGISTER \
233 	_IOW('v', IOCNUM_SET_REGISTER, struct vm_register)
234 #define	VM_GET_REGISTER \
235 	_IOWR('v', IOCNUM_GET_REGISTER, struct vm_register)
236 #define	VM_SET_REGISTER_SET \
237 	_IOW('v', IOCNUM_SET_REGISTER_SET, struct vm_register_set)
238 #define	VM_GET_REGISTER_SET \
239 	_IOWR('v', IOCNUM_GET_REGISTER_SET, struct vm_register_set)
240 #define	VM_SET_CAPABILITY \
241 	_IOW('v', IOCNUM_SET_CAPABILITY, struct vm_capability)
242 #define	VM_GET_CAPABILITY \
243 	_IOWR('v', IOCNUM_GET_CAPABILITY, struct vm_capability)
244 #define	VM_STATS \
245 	_IOWR('v', IOCNUM_VM_STATS, struct vm_stats)
246 #define	VM_STAT_DESC \
247 	_IOWR('v', IOCNUM_VM_STAT_DESC, struct vm_stat_desc)
248 #define VM_ASSERT_IRQ \
249 	_IOW('v', IOCNUM_ASSERT_IRQ, struct vm_irq)
250 #define VM_DEASSERT_IRQ \
251 	_IOW('v', IOCNUM_DEASSERT_IRQ, struct vm_irq)
252 #define VM_RAISE_MSI \
253 	_IOW('v', IOCNUM_RAISE_MSI, struct vm_msi)
254 #define	VM_INJECT_EXCEPTION	\
255 	_IOW('v', IOCNUM_INJECT_EXCEPTION, struct vm_exception)
256 #define VM_SET_TOPOLOGY \
257 	_IOW('v', IOCNUM_SET_TOPOLOGY, struct vm_cpu_topology)
258 #define VM_GET_TOPOLOGY \
259 	_IOR('v', IOCNUM_GET_TOPOLOGY, struct vm_cpu_topology)
260 #define	VM_GLA2GPA_NOFAULT \
261 	_IOWR('v', IOCNUM_GLA2GPA_NOFAULT, struct vm_gla2gpa)
262 #define	VM_ACTIVATE_CPU	\
263 	_IOW('v', IOCNUM_ACTIVATE_CPU, struct vm_activate_cpu)
264 #define	VM_GET_CPUS	\
265 	_IOW('v', IOCNUM_GET_CPUSET, struct vm_cpuset)
266 #define	VM_SUSPEND_CPU \
267 	_IOW('v', IOCNUM_SUSPEND_CPU, struct vm_activate_cpu)
268 #define	VM_RESUME_CPU \
269 	_IOW('v', IOCNUM_RESUME_CPU, struct vm_activate_cpu)
270 #define	VM_GET_VGIC_VERSION	\
271 	_IOR('v', IOCNUM_GET_VGIC_VERSION, struct vm_vgic_version)
272 #define	VM_ATTACH_VGIC	\
273 	_IOW('v', IOCNUM_ATTACH_VGIC, struct vm_vgic_descr)
274 #endif
275