| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 185 /// operand index UseIdx. in hasPipelineForwarding() argument
206 getOperandLatency(unsigned DefClass,unsigned DefIdx,unsigned UseClass,unsigned UseIdx) getOperandLatency() argument
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| H A D | MCSubtargetInfo.h | 187 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles()
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| H A D | MCSchedule.h | 109 unsigned UseIdx; member
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetSchedule.cpp | 159 unsigned UseIdx = 0; in findUseIdx() local
213 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
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| H A D | LiveIntervalCalc.cpp | 170 SlotIndex UseIdx; in extendToUses() local
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| H A D | RegisterCoalescer.cpp | 899 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef() local
949 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef() local
1241 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in removePartialRedundancy() local
1813 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
1847 void RegisterCoalescer::addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx, in addUndefFlag()
1889 SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(true); in updateRegDefsUses() local
1947 SlotIndex UseIdx = MIIdx.getRegSlot(true); in updateRegDefsUses() local
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| H A D | LiveRangeEdit.cpp | 159 SlotIndex UseIdx) { in canRematerializeAt()
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| H A D | MachineCombiner.cpp | 231 int UseIdx = in getDepth() local
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| H A D | InlineSpiller.cpp | 628 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true); in hasPhysRegAvailable() local
648 SlotIndex UseIdx = LIS.getInstructionIndex(MI).getRegSlot(true); in reMaterializeFor() local
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| H A D | MachineCopyPropagation.cpp | 638 const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) { in isBackwardPropagatableRegClassCopy()
657 unsigned UseIdx) { in isForwardableRegClassCopy()
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| H A D | MachineVerifier.cpp | 2842 unsigned MONum, SlotIndex UseIdx, in checkLivenessAtUse()
2975 SlotIndex UseIdx; in checkLiveness() local
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| H A D | TwoAddressInstructionPass.cpp | 1702 SlotIndex UseIdx = LIS->getInstructionIndex(*MI); in processTiedPairs() local
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| H A D | SplitKit.cpp | 623 SlotIndex UseIdx, MachineBasicBlock &MBB, in defFromParent()
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| H A D | MachineInstr.cpp | 1189 void MachineInstr::tieOperands(unsigned DefIdx, unsigned UseIdx) { in tieOperands()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 678 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
744 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
786 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
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| H A D | PPCInstrInfo.h | 455 unsigned UseIdx) const override { in getOperandLatency()
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | AbstractCallSite.cpp | 100 unsigned UseIdx = CB->getArgOperandNo(U); in AbstractCallSite() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3796 unsigned UseIdx, unsigned UseAlign) const { in getVSTMUseCycle()
3835 unsigned UseIdx, unsigned UseAlign) const { in getSTMUseCycle()
3863 unsigned UseIdx, unsigned UseAlign) const { in getOperandLatency()
3998 unsigned &UseIdx, unsigned &Dist) { in getBundledUseMI()
4244 unsigned UseIdx, const MCInstrDesc &UseMCID, unsigned UseAdj) const { in getOperandLatencyImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 471 int UseIdx = -1; in adjustSchedDependency() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 700 unsigned UseIdx; in foldImmediate() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 1392 unsigned UseIdx = GroupIdx.back() + 1; in EmitSpecialNode() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNSchedStrategy.cpp | 1839 SlotIndex UseIdx = DAG.LIS->getInstructionIndex(*UseMI).getRegSlot(true); in canIncreaseOccupancyOrReduceSpill() local
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | SubtargetEmitter.cpp | 1238 for (unsigned UseIdx = 0, EndIdx = Reads.size(); UseIdx != EndIdx; in genSchedClassTables() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 729 unsigned UseIdx; in foldImmediate() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1889 unsigned UseIdx) const { in hasHighOperandLatency()
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