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Searched defs:UVD_POWER_STATUS__UVD_POWER_STATUS_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h36 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Duvd_3_1_sh_mask.h737 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK 0x1 macro
H A Duvd_4_2_sh_mask.h743 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK 0x1 macro
H A Duvd_4_0_sh_mask.h584 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK 0x00000001L macro
H A Duvd_5_0_sh_mask.h927 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK 0x3 macro
H A Duvd_6_0_sh_mask.h915 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK 0x3 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h80 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Dvcn_2_5_sh_mask.h1520 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1517 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Dvcn_2_6_0_sh_mask.h2958 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2054 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Dvcn_5_0_0_sh_mask.h5351 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Dvcn_4_0_5_sh_mask.h6174 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Dvcn_4_0_0_sh_mask.h6347 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro
H A Dvcn_4_0_3_sh_mask.h7151 #define UVD_POWER_STATUS__UVD_POWER_STATUS_MASK … macro