1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2003 Marcel Moolenaar
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef _DEV_UART_BUS_H_
30 #define _DEV_UART_BUS_H_
31
32 #ifndef KLD_MODULE
33 #include "opt_uart.h"
34 #endif
35
36 #include <sys/serial.h>
37 #include <sys/timepps.h>
38
39 /* Drain and flush targets. */
40 #define UART_DRAIN_RECEIVER 0x0001
41 #define UART_DRAIN_TRANSMITTER 0x0002
42 #define UART_FLUSH_RECEIVER UART_DRAIN_RECEIVER
43 #define UART_FLUSH_TRANSMITTER UART_DRAIN_TRANSMITTER
44
45 /* Received character status bits. */
46 #define UART_STAT_BREAK 0x0100
47 #define UART_STAT_FRAMERR 0x0200
48 #define UART_STAT_OVERRUN 0x0400
49 #define UART_STAT_PARERR 0x0800
50
51 /* UART_IOCTL() requests */
52 #define UART_IOCTL_BREAK 1
53 #define UART_IOCTL_IFLOW 2
54 #define UART_IOCTL_OFLOW 3
55 #define UART_IOCTL_BAUD 4
56
57 /* UART quirk flags */
58 #define UART_F_BUSY_DETECT 0x1
59 #define UART_F_IGNORE_SPCR_REGSHFT 0x2
60
61 /*
62 * UART class & instance (=softc)
63 */
64 struct uart_class {
65 KOBJ_CLASS_FIELDS;
66 struct uart_ops *uc_ops; /* Low-level console operations. */
67 u_int uc_range; /* Bus space address range. */
68 u_int uc_rclk; /* Default rclk for this device. */
69 u_int uc_rshift; /* Default regshift for this device. */
70 u_int uc_riowidth; /* Default reg io width for this device. */
71 };
72
73 #define UART_CLASS(class) \
74 DATA_SET(uart_class_set, class)
75
76 struct uart_softc {
77 KOBJ_FIELDS;
78 struct uart_class *sc_class;
79 struct uart_bas sc_bas;
80 device_t sc_dev;
81
82 struct mtx sc_hwmtx_s; /* Spinlock protecting hardware. */
83 struct mtx *sc_hwmtx;
84
85 struct resource *sc_rres; /* Register resource. */
86 int sc_rrid;
87 int sc_rtype; /* SYS_RES_{IOPORT|MEMORY}. */
88 struct resource *sc_ires; /* Interrupt resource. */
89 void *sc_icookie;
90 int sc_irid;
91 struct callout sc_timer;
92
93 bool sc_callout:1; /* This UART is opened for callout. */
94 bool sc_fastintr:1; /* This UART uses fast interrupts. */
95 bool sc_hwiflow:1; /* This UART has HW input flow ctl. */
96 bool sc_hwoflow:1; /* This UART has HW output flow ctl. */
97 bool sc_leaving:1; /* This UART is going away. */
98 bool sc_opened:1; /* This UART is open for business. */
99 bool sc_polled:1; /* This UART has no interrupts. */
100 bool sc_txbusy:1; /* This UART is transmitting. */
101 bool sc_isquelch:1; /* This UART has input squelched. */
102 bool sc_testintr:1; /* This UART is under int. testing. */
103
104 struct uart_devinfo *sc_sysdev; /* System device (or NULL). */
105
106 int sc_altbrk; /* State for alt break sequence. */
107 uint32_t sc_hwsig; /* Signal state. Used by HW driver. */
108
109 /* Receiver data. */
110 uint16_t *sc_rxbuf;
111 int sc_rxbufsz;
112 int sc_rxput;
113 int sc_rxget;
114 int sc_rxfifosz; /* Size of RX FIFO. */
115 int sc_rxoverruns;
116
117 /* Transmitter data. */
118 uint8_t *sc_txbuf;
119 int sc_txdatasz;
120 int sc_txfifosz; /* Size of TX FIFO and buffer. */
121
122 /* Pulse capturing support (PPS). */
123 struct pps_state sc_pps;
124 int sc_pps_mode;
125 sbintime_t sc_pps_captime;
126
127 /* Upper layer data. */
128 void *sc_softih;
129 uint32_t sc_ttypend;
130 union {
131 /* TTY specific data. */
132 struct {
133 struct tty *tp;
134 } u_tty;
135 /* Keyboard specific data. */
136 struct {
137 } u_kbd;
138 } sc_u;
139 };
140
141 extern const char uart_driver_name[];
142
143 int uart_bus_attach(device_t dev);
144 int uart_bus_detach(device_t dev);
145 int uart_bus_resume(device_t dev);
146 serdev_intr_t *uart_bus_ihand(device_t dev, int ipend);
147 int uart_bus_ipend(device_t dev);
148 int uart_bus_probe(device_t dev, int regshft, int regiowidth, int rclk, int rid, int chan, int quirks);
149 int uart_bus_sysdev(device_t dev);
150
151 void uart_sched_softih(struct uart_softc *, uint32_t);
152
153 int uart_tty_attach(struct uart_softc *);
154 int uart_tty_detach(struct uart_softc *);
155 struct mtx *uart_tty_getlock(struct uart_softc *);
156 void uart_tty_intr(void *arg);
157
158 /*
159 * Receive buffer operations.
160 */
161 static __inline int
uart_rx_empty(struct uart_softc * sc)162 uart_rx_empty(struct uart_softc *sc)
163 {
164
165 return ((sc->sc_rxget == sc->sc_rxput) ? 1 : 0);
166 }
167
168 static __inline int
uart_rx_full(struct uart_softc * sc)169 uart_rx_full(struct uart_softc *sc)
170 {
171
172 return ((sc->sc_rxput + 1 < sc->sc_rxbufsz) ?
173 (sc->sc_rxput + 1 == sc->sc_rxget) : (sc->sc_rxget == 0));
174 }
175
176 static __inline int
uart_rx_get(struct uart_softc * sc)177 uart_rx_get(struct uart_softc *sc)
178 {
179 int ptr, xc;
180
181 ptr = sc->sc_rxget;
182 if (ptr == sc->sc_rxput)
183 return (-1);
184 xc = sc->sc_rxbuf[ptr++];
185 sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0;
186 return (xc);
187 }
188
189 static __inline int
uart_rx_next(struct uart_softc * sc)190 uart_rx_next(struct uart_softc *sc)
191 {
192 int ptr;
193
194 ptr = sc->sc_rxget;
195 if (ptr == sc->sc_rxput)
196 return (-1);
197 ptr += 1;
198 sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0;
199 return (0);
200 }
201
202 static __inline int
uart_rx_peek(struct uart_softc * sc)203 uart_rx_peek(struct uart_softc *sc)
204 {
205 int ptr;
206
207 ptr = sc->sc_rxget;
208 return ((ptr == sc->sc_rxput) ? -1 : sc->sc_rxbuf[ptr]);
209 }
210
211 static __inline int
uart_rx_put(struct uart_softc * sc,int xc)212 uart_rx_put(struct uart_softc *sc, int xc)
213 {
214 int ptr;
215
216 ptr = (sc->sc_rxput + 1 < sc->sc_rxbufsz) ? sc->sc_rxput + 1 : 0;
217 if (ptr == sc->sc_rxget)
218 return (ENOSPC);
219 sc->sc_rxbuf[sc->sc_rxput] = xc;
220 sc->sc_rxput = ptr;
221 return (0);
222 }
223
224 #endif /* _DEV_UART_BUS_H_ */
225