Searched defs:Tmp5 (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | IntrinsicLowering.cpp | 97 Value *Tmp5 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 289 Value *Tmp5 = Builder.CreateShl(R_1, One); in generateUnsignedDivisionCode() local
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExprComplex.cpp | 1096 llvm::Value *Tmp5 = Builder.CreateMul(RHSi, RHSi); // d*d in EmitBinDiv() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 8930 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5; in expandVPCTPOP() local
9370 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in expandBSWAP() local
9430 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in expandVPBSWAP() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 2472 SDValue Mux = DAG.getNode(ISD::VSELECT, dl, IntTy, {Eq, Tmp5, Tmp4}); in emitHvxShiftRightRnd() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 9120 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSHL_PARTS() local
9149 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRL_PARTS() local
9177 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRA_PARTS() local
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