| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | IntrinsicLowering.cpp | 73 Value *Tmp3 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
101 Value* Tmp3 = Builder.CreateLShr(V, in LowerBSWAP() local
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 125 Value *Tmp3 = Builder.CreateXor(Tmp1, Divisor); in generateSignedDivisionCode() local
262 Value *Tmp3 = Builder.CreateLShr(Dividend, SR_1); in generateUnsignedDivisionCode() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4190 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchBEXTRFromAndImm() local
4227 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPISTR() local
4260 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in emitPCMPESTR() local
4553 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in matchVPTERNLOG() local
4939 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in tryVPTESTM() local
5515 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5568 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5654 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5788 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
5796 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Chain; in Select() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 1740 SDValue Tmp3 = Node->getOperand(2); in ExpandDYNAMIC_STACKALLOC() local
3058 SDValue Tmp1, Tmp2, Tmp3, Tmp4; in ExpandNode() local
5112 SDValue Tmp1, Tmp2, Tmp3, Tmp4; in PromoteNode() local
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| H A D | TargetLowering.cpp | 8143 SDValue Tmp2, Tmp3; in expandShiftParts() local
8930 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5; in expandVPCTPOP() local
9370 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in expandBSWAP() local
9430 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in expandVPBSWAP() local
9502 SDValue Tmp, Tmp2, Tmp3; in expandBITREVERSE() local
9567 SDValue Tmp, Tmp2, Tmp3; in expandVPBITREVERSE() local
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| H A D | LegalizeFloatTypes.cpp | 2128 SDValue Tmp1, Tmp2, Tmp3, OutputChain; in FloatExpandSetCCOperands() local
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExprComplex.cpp | 1093 llvm::Value *Tmp3 = Builder.CreateAdd(Tmp1, Tmp2); // ac+bd in EmitBinDiv() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2118 Register Tmp3 = MRI.createVirtualRegister(RC); in prepareSymbol() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 3100 SDValue Tmp3 = ST->getValue(); in LowerSTOREi1() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 2467 SDValue Tmp3 = DAG.getNode(ISD::ADD, dl, IntTy, Tmp2, Rup); emitHvxShiftRightRnd() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 2325 SDValue Tmp3 = in lowerVAARG() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 9118 SDValue Tmp3 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Tmp1); in LowerSHL_PARTS() local
9147 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1); in LowerSRL_PARTS() local
9175 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1); in LowerSRA_PARTS() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 3968 SDValue Tmp3 = Op.getOperand(2); in lowerDYNAMIC_STACKALLOCImpl() local
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