1 /*-
2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
3 * All rights reserved.
4 *
5 * Developed by Semihalf.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of MARVELL nor the names of contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32 /*
33 * Driver for the TWSI (aka I2C, aka IIC) bus controller found on Marvell
34 * and Allwinner SoCs. Supports master operation only.
35 *
36 * Calls to DELAY() are needed per Application Note AN-179 "TWSI Software
37 * Guidelines for Discovery(TM), Horizon (TM) and Feroceon(TM) Devices".
38 */
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/bus.h>
43 #include <sys/kernel.h>
44 #include <sys/lock.h>
45 #include <sys/mutex.h>
46 #include <sys/module.h>
47 #include <sys/resource.h>
48 #include <sys/rman.h>
49 #include <sys/sysctl.h>
50
51 #include <machine/_inttypes.h>
52 #include <machine/bus.h>
53 #include <machine/resource.h>
54
55 #include <dev/iicbus/iiconf.h>
56 #include <dev/iicbus/iicbus.h>
57
58 #include <dev/iicbus/controller/twsi/twsi.h>
59
60 #include "iicbus_if.h"
61
62 #define TWSI_CONTROL_ACK (1 << 2)
63 #define TWSI_CONTROL_IFLG (1 << 3)
64 #define TWSI_CONTROL_STOP (1 << 4)
65 #define TWSI_CONTROL_START (1 << 5)
66 #define TWSI_CONTROL_TWSIEN (1 << 6)
67 #define TWSI_CONTROL_INTEN (1 << 7)
68
69 #define TWSI_STATUS_BUS_ERROR 0x00
70 #define TWSI_STATUS_START 0x08
71 #define TWSI_STATUS_RPTD_START 0x10
72 #define TWSI_STATUS_ADDR_W_ACK 0x18
73 #define TWSI_STATUS_ADDR_W_NACK 0x20
74 #define TWSI_STATUS_DATA_WR_ACK 0x28
75 #define TWSI_STATUS_DATA_WR_NACK 0x30
76 #define TWSI_STATUS_ARBITRATION_LOST 0x38
77 #define TWSI_STATUS_ADDR_R_ACK 0x40
78 #define TWSI_STATUS_ADDR_R_NACK 0x48
79 #define TWSI_STATUS_DATA_RD_ACK 0x50
80 #define TWSI_STATUS_DATA_RD_NOACK 0x58
81 #define TWSI_STATUS_IDLE 0xf8
82
83 #define TWSI_DEBUG
84 #undef TWSI_DEBUG
85
86 #define debugf(sc, fmt, args...) if ((sc)->debug) \
87 device_printf((sc)->dev, "%s: " fmt, __func__, ##args)
88
89 static struct resource_spec res_spec[] = {
90 { SYS_RES_MEMORY, 0, RF_ACTIVE },
91 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE},
92 { -1, 0 }
93 };
94
95 static __inline uint32_t
TWSI_READ(struct twsi_softc * sc,bus_size_t off)96 TWSI_READ(struct twsi_softc *sc, bus_size_t off)
97 {
98 uint32_t val;
99
100 val = bus_read_4(sc->res[0], off);
101 if (sc->debug > 1)
102 debugf(sc, "read %x from %lx\n", val, off);
103 return (val);
104 }
105
106 static __inline void
TWSI_WRITE(struct twsi_softc * sc,bus_size_t off,uint32_t val)107 TWSI_WRITE(struct twsi_softc *sc, bus_size_t off, uint32_t val)
108 {
109
110 if (sc->debug > 1)
111 debugf(sc, "Writing %x to %lx\n", val, off);
112 bus_write_4(sc->res[0], off, val);
113 }
114
115 static __inline void
twsi_control_clear(struct twsi_softc * sc,uint32_t mask)116 twsi_control_clear(struct twsi_softc *sc, uint32_t mask)
117 {
118 uint32_t val;
119
120 val = TWSI_READ(sc, sc->reg_control);
121 debugf(sc, "read val=%x\n", val);
122 val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START);
123 val &= ~mask;
124 debugf(sc, "write val=%x\n", val);
125 TWSI_WRITE(sc, sc->reg_control, val);
126 }
127
128 static __inline void
twsi_control_set(struct twsi_softc * sc,uint32_t mask)129 twsi_control_set(struct twsi_softc *sc, uint32_t mask)
130 {
131 uint32_t val;
132
133 val = TWSI_READ(sc, sc->reg_control);
134 debugf(sc, "read val=%x\n", val);
135 val &= ~(TWSI_CONTROL_STOP | TWSI_CONTROL_START);
136 val |= mask;
137 debugf(sc, "write val=%x\n", val);
138 TWSI_WRITE(sc, sc->reg_control, val);
139 }
140
141 static __inline void
twsi_clear_iflg(struct twsi_softc * sc)142 twsi_clear_iflg(struct twsi_softc *sc)
143 {
144
145 DELAY(1000);
146 /* There are two ways of clearing IFLAG. */
147 if (sc->iflag_w1c)
148 twsi_control_set(sc, TWSI_CONTROL_IFLG);
149 else
150 twsi_control_clear(sc, TWSI_CONTROL_IFLG);
151 DELAY(1000);
152 }
153
154
155 /*
156 * timeout given in us
157 * returns
158 * 0 on successful mask change
159 * non-zero on timeout
160 */
161 static int
twsi_poll_ctrl(struct twsi_softc * sc,int timeout,uint32_t mask)162 twsi_poll_ctrl(struct twsi_softc *sc, int timeout, uint32_t mask)
163 {
164
165 timeout /= 10;
166 debugf(sc, "Waiting for ctrl reg to match mask %x\n", mask);
167 while (!(TWSI_READ(sc, sc->reg_control) & mask)) {
168 DELAY(10);
169 if (--timeout < 0)
170 return (timeout);
171 }
172 debugf(sc, "done\n");
173 return (0);
174 }
175
176
177 /*
178 * 'timeout' is given in us. Note also that timeout handling is not exact --
179 * twsi_locked_start() total wait can be more than 2 x timeout
180 * (twsi_poll_ctrl() is called twice). 'mask' can be either TWSI_STATUS_START
181 * or TWSI_STATUS_RPTD_START
182 */
183 static int
twsi_locked_start(device_t dev,struct twsi_softc * sc,int32_t mask,u_char slave,int timeout)184 twsi_locked_start(device_t dev, struct twsi_softc *sc, int32_t mask,
185 u_char slave, int timeout)
186 {
187 int read_access, iflg_set = 0;
188 uint32_t status;
189
190 mtx_assert(&sc->mutex, MA_OWNED);
191
192 if (mask == TWSI_STATUS_RPTD_START)
193 /* read IFLG to know if it should be cleared later; from NBSD */
194 iflg_set = TWSI_READ(sc, sc->reg_control) & TWSI_CONTROL_IFLG;
195
196 debugf(sc, "send start\n");
197 twsi_control_set(sc, TWSI_CONTROL_START);
198
199 if (mask == TWSI_STATUS_RPTD_START && iflg_set) {
200 debugf(sc, "IFLG set, clearing (mask=%x)\n", mask);
201 twsi_clear_iflg(sc);
202 }
203
204 /*
205 * Without this delay we timeout checking IFLG if the timeout is 0.
206 * NBSD driver always waits here too.
207 */
208 DELAY(1000);
209
210 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
211 debugf(sc, "timeout sending %sSTART condition\n",
212 mask == TWSI_STATUS_START ? "" : "repeated ");
213 return (IIC_ETIMEOUT);
214 }
215
216 status = TWSI_READ(sc, sc->reg_status);
217 debugf(sc, "status=%x\n", status);
218
219 if (status != mask) {
220 debugf(sc, "wrong status (%02x) after sending %sSTART condition\n",
221 status, mask == TWSI_STATUS_START ? "" : "repeated ");
222 return (IIC_ESTATUS);
223 }
224
225 TWSI_WRITE(sc, sc->reg_data, slave);
226 twsi_clear_iflg(sc);
227 DELAY(1000);
228
229 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
230 debugf(sc, "timeout sending slave address (timeout=%d)\n", timeout);
231 return (IIC_ETIMEOUT);
232 }
233
234 read_access = (slave & 0x1) ? 1 : 0;
235 status = TWSI_READ(sc, sc->reg_status);
236 if (status != (read_access ?
237 TWSI_STATUS_ADDR_R_ACK : TWSI_STATUS_ADDR_W_ACK)) {
238 debugf(sc, "no ACK (status: %02x) after sending slave address\n",
239 status);
240 return (IIC_ENOACK);
241 }
242
243 return (IIC_NOERR);
244 }
245
246 #define TWSI_BAUD_RATE_RAW(C,M,N) ((C)/((10*(M+1))<<(N)))
247 #define ABSSUB(a,b) (((a) > (b)) ? (a) - (b) : (b) - (a))
248
249 static int
twsi_calc_baud_rate(struct twsi_softc * sc,const u_int target,int * param)250 twsi_calc_baud_rate(struct twsi_softc *sc, const u_int target,
251 int *param)
252 {
253 uint64_t clk;
254 uint32_t cur, diff, diff0;
255 int m, n, m0, n0;
256
257 /* Calculate baud rate. */
258 diff0 = 0xffffffff;
259
260 if (clk_get_freq(sc->clk_core, &clk) < 0)
261 return (-1);
262
263 debugf(sc, "Bus clock is at %ju\n", clk);
264
265 for (n = 0; n < 8; n++) {
266 for (m = 0; m < 16; m++) {
267 cur = TWSI_BAUD_RATE_RAW(clk,m,n);
268 diff = ABSSUB(target, cur);
269 if (diff < diff0) {
270 m0 = m;
271 n0 = n;
272 diff0 = diff;
273 }
274 }
275 }
276 *param = TWSI_BAUD_RATE_PARAM(m0, n0);
277
278 return (0);
279 }
280
281 /*
282 * Only slave mode supported, disregard [old]addr
283 */
284 static int
twsi_reset(device_t dev,u_char speed,u_char addr,u_char * oldaddr)285 twsi_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
286 {
287 struct twsi_softc *sc;
288 uint32_t param;
289 u_int busfreq;
290
291 sc = device_get_softc(dev);
292
293 busfreq = IICBUS_GET_FREQUENCY(sc->iicbus, speed);
294
295 if (twsi_calc_baud_rate(sc, busfreq, ¶m) == -1) {
296 switch (speed) {
297 case IIC_SLOW:
298 case IIC_FAST:
299 param = sc->baud_rate[speed].param;
300 debugf(sc, "Using IIC_FAST mode with speed param=%x\n", param);
301 break;
302 case IIC_FASTEST:
303 case IIC_UNKNOWN:
304 default:
305 param = sc->baud_rate[IIC_FAST].param;
306 debugf(sc, "Using IIC_FASTEST/UNKNOWN mode with speed param=%x\n", param);
307 break;
308 }
309 }
310
311 debugf(sc, "Using clock param=%x\n", param);
312
313 mtx_lock(&sc->mutex);
314 TWSI_WRITE(sc, sc->reg_soft_reset, 0x1);
315 TWSI_WRITE(sc, sc->reg_baud_rate, param);
316 TWSI_WRITE(sc, sc->reg_control, TWSI_CONTROL_TWSIEN);
317 DELAY(1000);
318 mtx_unlock(&sc->mutex);
319
320 return (0);
321 }
322
323 static int
twsi_stop(device_t dev)324 twsi_stop(device_t dev)
325 {
326 struct twsi_softc *sc;
327
328 sc = device_get_softc(dev);
329
330 debugf(sc, "%s\n", __func__);
331 mtx_lock(&sc->mutex);
332 twsi_control_clear(sc, TWSI_CONTROL_ACK);
333 twsi_control_set(sc, TWSI_CONTROL_STOP);
334 twsi_clear_iflg(sc);
335 DELAY(1000);
336 mtx_unlock(&sc->mutex);
337
338 return (IIC_NOERR);
339 }
340
341 /*
342 * timeout is given in us
343 */
344 static int
twsi_repeated_start(device_t dev,u_char slave,int timeout)345 twsi_repeated_start(device_t dev, u_char slave, int timeout)
346 {
347 struct twsi_softc *sc;
348 int rv;
349
350 sc = device_get_softc(dev);
351
352 debugf(sc, "%s: slave=%x\n", __func__, slave);
353 mtx_lock(&sc->mutex);
354 rv = twsi_locked_start(dev, sc, TWSI_STATUS_RPTD_START, slave,
355 timeout);
356 mtx_unlock(&sc->mutex);
357
358 if (rv) {
359 twsi_stop(dev);
360 return (rv);
361 } else
362 return (IIC_NOERR);
363 }
364
365 /*
366 * timeout is given in us
367 */
368 static int
twsi_start(device_t dev,u_char slave,int timeout)369 twsi_start(device_t dev, u_char slave, int timeout)
370 {
371 struct twsi_softc *sc;
372 int rv;
373
374 sc = device_get_softc(dev);
375
376 debugf(sc, "%s: slave=%x\n", __func__, slave);
377 mtx_lock(&sc->mutex);
378 rv = twsi_locked_start(dev, sc, TWSI_STATUS_START, slave, timeout);
379 mtx_unlock(&sc->mutex);
380
381 if (rv) {
382 twsi_stop(dev);
383 return (rv);
384 } else
385 return (IIC_NOERR);
386 }
387
388 static int
twsi_read(device_t dev,char * buf,int len,int * read,int last,int delay)389 twsi_read(device_t dev, char *buf, int len, int *read, int last, int delay)
390 {
391 struct twsi_softc *sc;
392 uint32_t status;
393 int last_byte, rv;
394
395 sc = device_get_softc(dev);
396
397 mtx_lock(&sc->mutex);
398 *read = 0;
399 while (*read < len) {
400 /*
401 * Check if we are reading last byte of the last buffer,
402 * do not send ACK then, per I2C specs
403 */
404 last_byte = ((*read == len - 1) && last) ? 1 : 0;
405 if (last_byte)
406 twsi_control_clear(sc, TWSI_CONTROL_ACK);
407 else
408 twsi_control_set(sc, TWSI_CONTROL_ACK);
409
410 twsi_clear_iflg(sc);
411 DELAY(1000);
412
413 if (twsi_poll_ctrl(sc, delay, TWSI_CONTROL_IFLG)) {
414 debugf(sc, "timeout reading data (delay=%d)\n", delay);
415 rv = IIC_ETIMEOUT;
416 goto out;
417 }
418
419 status = TWSI_READ(sc, sc->reg_status);
420 if (status != (last_byte ?
421 TWSI_STATUS_DATA_RD_NOACK : TWSI_STATUS_DATA_RD_ACK)) {
422 debugf(sc, "wrong status (%02x) while reading\n", status);
423 rv = IIC_ESTATUS;
424 goto out;
425 }
426
427 *buf++ = TWSI_READ(sc, sc->reg_data);
428 (*read)++;
429 }
430 rv = IIC_NOERR;
431 out:
432 mtx_unlock(&sc->mutex);
433 return (rv);
434 }
435
436 static int
twsi_write(device_t dev,const char * buf,int len,int * sent,int timeout)437 twsi_write(device_t dev, const char *buf, int len, int *sent, int timeout)
438 {
439 struct twsi_softc *sc;
440 uint32_t status;
441 int rv;
442
443 sc = device_get_softc(dev);
444
445 mtx_lock(&sc->mutex);
446 *sent = 0;
447 while (*sent < len) {
448 TWSI_WRITE(sc, sc->reg_data, *buf++);
449
450 twsi_clear_iflg(sc);
451 DELAY(1000);
452 if (twsi_poll_ctrl(sc, timeout, TWSI_CONTROL_IFLG)) {
453 debugf(sc, "timeout writing data (timeout=%d)\n", timeout);
454 rv = IIC_ETIMEOUT;
455 goto out;
456 }
457
458 status = TWSI_READ(sc, sc->reg_status);
459 if (status != TWSI_STATUS_DATA_WR_ACK) {
460 debugf(sc, "wrong status (%02x) while writing\n", status);
461 rv = IIC_ESTATUS;
462 goto out;
463 }
464 (*sent)++;
465 }
466 rv = IIC_NOERR;
467 out:
468 mtx_unlock(&sc->mutex);
469 return (rv);
470 }
471
472 static void
twsi_error(struct twsi_softc * sc,int err)473 twsi_error(struct twsi_softc *sc, int err)
474 {
475 /*
476 * Must send stop condition to abort the current transfer.
477 */
478 debugf(sc, "Sending STOP condition for error %d\n", err);
479 sc->transfer = 0;
480 sc->error = err;
481 sc->control_val = 0;
482 TWSI_WRITE(sc, sc->reg_control, sc->control_val | TWSI_CONTROL_STOP);
483 }
484
485 static int
twsi_transfer(device_t dev,struct iic_msg * msgs,uint32_t nmsgs)486 twsi_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
487 {
488 struct twsi_softc *sc;
489 uint32_t status;
490 int error;
491
492 sc = device_get_softc(dev);
493
494 if (!sc->have_intr)
495 return (iicbus_transfer_gen(dev, msgs, nmsgs));
496
497 mtx_lock(&sc->mutex);
498 KASSERT(sc->transfer == 0,
499 ("starting a transfer while another is active"));
500
501 debugf(sc, "transmitting %d messages\n", nmsgs);
502 status = TWSI_READ(sc, sc->reg_status);
503 debugf(sc, "status=0x%x\n", status);
504 if (status != TWSI_STATUS_IDLE) {
505 debugf(sc, "Bad status at start of transfer\n");
506 twsi_error(sc, IIC_ESTATUS);
507 goto end;
508 }
509
510 sc->nmsgs = nmsgs;
511 sc->msgs = msgs;
512 sc->msg_idx = 0;
513 sc->transfer = 1;
514 sc->error = 0;
515
516 #ifdef TWSI_DEBUG
517 for (int i = 0; i < nmsgs; i++)
518 debugf(sc, "msg %d is %d bytes long\n", i, msgs[i].len);
519 #endif
520
521 /* Send start and re-enable interrupts */
522 sc->control_val = TWSI_CONTROL_TWSIEN | TWSI_CONTROL_INTEN;
523 TWSI_WRITE(sc, sc->reg_control, sc->control_val | TWSI_CONTROL_START);
524 msleep_sbt(sc, &sc->mutex, 0, "twsi", 3000 * SBT_1MS, SBT_1MS, 0);
525 debugf(sc, "pause finish\n");
526 if (sc->error == 0 && sc->transfer != 0) {
527 device_printf(sc->dev, "transfer timeout\n");
528 sc->error = IIC_ETIMEOUT;
529 sc->transfer = 0;
530 }
531
532 if (sc->error != 0)
533 debugf(sc, "Error: %d\n", sc->error);
534
535 end:
536 /* Disable module and interrupts */
537 debugf(sc, "status=0x%x\n", TWSI_READ(sc, sc->reg_status));
538 TWSI_WRITE(sc, sc->reg_control, 0);
539 debugf(sc, "status=0x%x\n", TWSI_READ(sc, sc->reg_status));
540 error = sc->error;
541 mtx_unlock(&sc->mutex);
542
543 return (error);
544 }
545
546 static void
twsi_intr(void * arg)547 twsi_intr(void *arg)
548 {
549 struct twsi_softc *sc;
550 uint32_t status;
551 bool message_done;
552 bool send_start;
553
554 sc = arg;
555 send_start = false;
556
557 mtx_lock(&sc->mutex);
558 debugf(sc, "Got interrupt, current msg=%u\n", sc->msg_idx);
559
560 status = TWSI_READ(sc, sc->reg_status);
561 debugf(sc, "reg control = 0x%x, status = 0x%x\n",
562 TWSI_READ(sc, sc->reg_control), status);
563
564 if (sc->transfer == 0) {
565 device_printf(sc->dev, "interrupt without active transfer, "
566 "status = 0x%x\n", status);
567 TWSI_WRITE(sc, sc->reg_control, sc->control_val |
568 TWSI_CONTROL_STOP);
569 goto end;
570 }
571
572 restart:
573 message_done = false;
574
575 switch (status) {
576 case TWSI_STATUS_START:
577 case TWSI_STATUS_RPTD_START:
578 /* Transmit the address */
579 debugf(sc, "Send address 0x%x\n",
580 sc->msgs[sc->msg_idx].slave);
581
582 if (sc->msgs[sc->msg_idx].flags & IIC_M_RD)
583 TWSI_WRITE(sc, sc->reg_data,
584 sc->msgs[sc->msg_idx].slave | LSB);
585 else
586 TWSI_WRITE(sc, sc->reg_data,
587 sc->msgs[sc->msg_idx].slave & ~LSB);
588 break;
589
590 case TWSI_STATUS_ADDR_W_ACK:
591 debugf(sc, "Address ACK-ed (write)\n");
592
593 if (sc->msgs[sc->msg_idx].len > 0) {
594 /* Directly send the first byte */
595 sc->sent_bytes = 1;
596 debugf(sc, "Sending byte 0 (of %d) = %x\n",
597 sc->msgs[sc->msg_idx].len,
598 sc->msgs[sc->msg_idx].buf[0]);
599 TWSI_WRITE(sc, sc->reg_data,
600 sc->msgs[sc->msg_idx].buf[0]);
601 } else {
602 debugf(sc, "Zero-length write, sending STOP\n");
603 TWSI_WRITE(sc, sc->reg_control,
604 sc->control_val | TWSI_CONTROL_STOP);
605 }
606 break;
607
608 case TWSI_STATUS_ADDR_R_ACK:
609 debugf(sc, "Address ACK-ed (read)\n");
610 sc->recv_bytes = 0;
611
612 if (sc->msgs[sc->msg_idx].len == 0) {
613 debugf(sc, "Zero-length read, sending STOP\n");
614 TWSI_WRITE(sc, sc->reg_control,
615 sc->control_val | TWSI_CONTROL_STOP);
616 } else if (sc->msgs[sc->msg_idx].len == 1) {
617 sc->control_val &= ~TWSI_CONTROL_ACK;
618 } else {
619 sc->control_val |= TWSI_CONTROL_ACK;
620 }
621 break;
622
623 case TWSI_STATUS_ADDR_W_NACK:
624 case TWSI_STATUS_ADDR_R_NACK:
625 debugf(sc, "Address NACK-ed\n");
626 twsi_error(sc, IIC_ENOACK);
627 break;
628 case TWSI_STATUS_DATA_WR_NACK:
629 debugf(sc, "Data byte NACK-ed\n");
630 twsi_error(sc, IIC_ENOACK);
631 break;
632 case TWSI_STATUS_DATA_WR_ACK:
633 KASSERT(sc->sent_bytes <= sc->msgs[sc->msg_idx].len,
634 ("sent_bytes beyond message length"));
635 debugf(sc, "ACK received after transmitting data\n");
636 if (sc->sent_bytes == sc->msgs[sc->msg_idx].len) {
637 debugf(sc, "Done TX data\n");
638
639 /* Send stop, no interrupts on stop */
640 if (!(sc->msgs[sc->msg_idx].flags & IIC_M_NOSTOP)) {
641 TWSI_WRITE(sc, sc->reg_control,
642 sc->control_val | TWSI_CONTROL_STOP);
643 } else {
644 debugf(sc, "NOSTOP flag\n");
645 }
646 message_done = true;
647 break;
648 }
649
650 debugf(sc, "Sending byte %d (of %d) = 0x%x\n",
651 sc->sent_bytes,
652 sc->msgs[sc->msg_idx].len,
653 sc->msgs[sc->msg_idx].buf[sc->sent_bytes]);
654 TWSI_WRITE(sc, sc->reg_data,
655 sc->msgs[sc->msg_idx].buf[sc->sent_bytes]);
656 sc->sent_bytes++;
657 break;
658
659 case TWSI_STATUS_DATA_RD_ACK:
660 debugf(sc, "Received and ACK-ed data\n");
661 KASSERT(sc->recv_bytes < sc->msgs[sc->msg_idx].len,
662 ("receiving beyond the end of buffer"));
663
664 sc->msgs[sc->msg_idx].buf[sc->recv_bytes] =
665 TWSI_READ(sc, sc->reg_data);
666 debugf(sc, "Received byte %d (of %d) = 0x%x\n",
667 sc->recv_bytes,
668 sc->msgs[sc->msg_idx].len,
669 sc->msgs[sc->msg_idx].buf[sc->recv_bytes]);
670 sc->recv_bytes++;
671
672 /* If we only have one byte left, disable ACK */
673 if (sc->msgs[sc->msg_idx].len - sc->recv_bytes == 1) {
674 sc->control_val &= ~TWSI_CONTROL_ACK;
675 } else if (sc->msgs[sc->msg_idx].len == sc->recv_bytes) {
676 /*
677 * We should not have ACK-ed the last byte.
678 * The protocol state machine is in invalid state.
679 */
680 debugf(sc, "RX all but asked for more?\n");
681 twsi_error(sc, IIC_ESTATUS);
682 }
683 break;
684
685 case TWSI_STATUS_DATA_RD_NOACK:
686 debugf(sc, "Received and NACK-ed data\n");
687 KASSERT(sc->recv_bytes == sc->msgs[sc->msg_idx].len - 1,
688 ("sent NACK before receiving all requested data"));
689 sc->msgs[sc->msg_idx].buf[sc->recv_bytes] =
690 TWSI_READ(sc, sc->reg_data);
691 debugf(sc, "Received byte %d (of %d) = 0x%x\n",
692 sc->recv_bytes,
693 sc->msgs[sc->msg_idx].len,
694 sc->msgs[sc->msg_idx].buf[sc->recv_bytes]);
695 sc->recv_bytes++;
696
697 if (sc->msgs[sc->msg_idx].len == sc->recv_bytes) {
698 debugf(sc, "Done RX data\n");
699 if (!(sc->msgs[sc->msg_idx].flags & IIC_M_NOSTOP)) {
700 debugf(sc, "Send STOP\n");
701 TWSI_WRITE(sc, sc->reg_control,
702 sc->control_val | TWSI_CONTROL_STOP);
703 }
704 message_done = true;
705 } else {
706 /*
707 * We should not have NACK-ed yet.
708 * The protocol state machine is in invalid state.
709 */
710 debugf(sc, "NACK-ed before receving all bytes?\n");
711 twsi_error(sc, IIC_ESTATUS);
712 }
713 break;
714
715 case TWSI_STATUS_BUS_ERROR:
716 debugf(sc, "Bus error\n");
717 twsi_error(sc, IIC_EBUSERR);
718 break;
719 case TWSI_STATUS_ARBITRATION_LOST:
720 debugf(sc, "Arbitration lost\n");
721 twsi_error(sc, IIC_EBUSBSY);
722 break;
723 default:
724 debugf(sc, "unexpected status 0x%x\n", status);
725 twsi_error(sc, IIC_ESTATUS);
726 break;
727 }
728
729 if (message_done) {
730 sc->msg_idx++;
731 if (sc->msg_idx == sc->nmsgs) {
732 debugf(sc, "All messages transmitted\n");
733 sc->transfer = 0;
734 sc->error = 0;
735 } else if ((sc->msgs[sc->msg_idx].flags & IIC_M_NOSTART) == 0) {
736 debugf(sc, "Send (repeated) start\n");
737 send_start = true;
738 } else {
739 /* Just keep transmitting data. */
740 KASSERT((sc->msgs[sc->msg_idx - 1].flags & IIC_M_NOSTOP) != 0,
741 ("NOSTART message after STOP"));
742 KASSERT((sc->msgs[sc->msg_idx].flags & IIC_M_RD) ==
743 (sc->msgs[sc->msg_idx - 1].flags & IIC_M_RD),
744 ("change of transfer direction without a START"));
745 debugf(sc, "NOSTART message after NOSTOP\n");
746 sc->sent_bytes = 0;
747 sc->recv_bytes = 0;
748 if ((sc->msgs[sc->msg_idx].flags & IIC_M_RD) == 0) {
749 status = TWSI_STATUS_ADDR_W_ACK;
750 goto restart;
751 } else {
752 debugf(sc, "Read+NOSTART unsupported\n");
753 twsi_error(sc, IIC_ESTATUS);
754 }
755 }
756 }
757 end:
758 /*
759 * Newer Allwinner chips clear IFLG after writing 1 to it.
760 */
761 debugf(sc, "Refresh reg_control\n");
762 TWSI_WRITE(sc, sc->reg_control, sc->control_val |
763 (sc->iflag_w1c ? TWSI_CONTROL_IFLG : 0) |
764 (send_start ? TWSI_CONTROL_START : 0));
765
766 debugf(sc, "Done with interrupt, transfer = %d\n", sc->transfer);
767 if (sc->transfer == 0)
768 wakeup(sc);
769 mtx_unlock(&sc->mutex);
770 }
771
772 static void
twsi_intr_start(void * pdev)773 twsi_intr_start(void *pdev)
774 {
775 struct twsi_softc *sc;
776
777 sc = device_get_softc(pdev);
778
779 if ((bus_setup_intr(pdev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
780 NULL, twsi_intr, sc, &sc->intrhand)))
781 device_printf(pdev, "unable to register interrupt handler\n");
782
783 sc->have_intr = true;
784 }
785
786 int
twsi_attach(device_t dev)787 twsi_attach(device_t dev)
788 {
789 struct twsi_softc *sc;
790 struct sysctl_ctx_list *ctx;
791 struct sysctl_oid *tree_node;
792 struct sysctl_oid_list *tree;
793
794 sc = device_get_softc(dev);
795 sc->dev = dev;
796
797 mtx_init(&sc->mutex, device_get_nameunit(dev), "twsi", MTX_DEF);
798
799 if (bus_alloc_resources(dev, res_spec, sc->res)) {
800 device_printf(dev, "could not allocate resources\n");
801 twsi_detach(dev);
802 return (ENXIO);
803 }
804
805 #ifdef TWSI_DEBUG
806 sc->debug = 1;
807 #endif
808 ctx = device_get_sysctl_ctx(dev);
809 tree_node = device_get_sysctl_tree(dev);
810 tree = SYSCTL_CHILDREN(tree_node);
811 SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "debug", CTLFLAG_RWTUN,
812 &sc->debug, 0, "Set debug level (zero to disable)");
813
814 /* Attach the iicbus. */
815 if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL) {
816 device_printf(dev, "could not allocate iicbus instance\n");
817 twsi_detach(dev);
818 return (ENXIO);
819 }
820 bus_attach_children(dev);
821
822 config_intrhook_oneshot(twsi_intr_start, dev);
823
824 return (0);
825 }
826
827 int
twsi_detach(device_t dev)828 twsi_detach(device_t dev)
829 {
830 struct twsi_softc *sc;
831 int rv;
832
833 sc = device_get_softc(dev);
834
835 if ((rv = bus_generic_detach(dev)) != 0)
836 return (rv);
837
838 if (sc->iicbus != NULL)
839 if ((rv = device_delete_child(dev, sc->iicbus)) != 0)
840 return (rv);
841
842 if (sc->intrhand != NULL)
843 bus_teardown_intr(sc->dev, sc->res[1], sc->intrhand);
844
845 bus_release_resources(dev, res_spec, sc->res);
846
847 mtx_destroy(&sc->mutex);
848 return (0);
849 }
850
851 static device_method_t twsi_methods[] = {
852 /* device interface */
853 DEVMETHOD(device_detach, twsi_detach),
854
855 /* Bus interface */
856 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
857 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
858 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
859 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
860 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
861 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
862 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
863 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
864 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
865
866 /* iicbus interface */
867 DEVMETHOD(iicbus_callback, iicbus_null_callback),
868 DEVMETHOD(iicbus_repeated_start, twsi_repeated_start),
869 DEVMETHOD(iicbus_start, twsi_start),
870 DEVMETHOD(iicbus_stop, twsi_stop),
871 DEVMETHOD(iicbus_write, twsi_write),
872 DEVMETHOD(iicbus_read, twsi_read),
873 DEVMETHOD(iicbus_reset, twsi_reset),
874 DEVMETHOD(iicbus_transfer, twsi_transfer),
875 { 0, 0 }
876 };
877
878 DEFINE_CLASS_0(twsi, twsi_driver, twsi_methods,
879 sizeof(struct twsi_softc));
880