1 /*-
2 * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
3 * All rights reserved.
4 *
5 * Developed by Semihalf.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of MARVELL nor the names of contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32 /*
33 * Driver for the TWSI (aka I2C, aka IIC) bus controller found on Marvell
34 * and Allwinner SoCs. Supports master operation only, and works in polling mode.
35 *
36 * Calls to DELAY() are needed per Application Note AN-179 "TWSI Software
37 * Guidelines for Discovery(TM), Horizon (TM) and Feroceon(TM) Devices".
38 */
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/bus.h>
43 #include <sys/kernel.h>
44 #include <sys/module.h>
45 #include <sys/resource.h>
46
47 #include <machine/_inttypes.h>
48 #include <machine/bus.h>
49 #include <machine/resource.h>
50
51 #include <sys/rman.h>
52
53 #include <sys/lock.h>
54 #include <sys/mutex.h>
55
56 #include <dev/iicbus/iiconf.h>
57 #include <dev/iicbus/iicbus.h>
58 #include <dev/ofw/ofw_bus.h>
59 #include <dev/ofw/ofw_bus_subr.h>
60
61 #include <dev/clk/clk.h>
62
63 #include <arm/mv/mvreg.h>
64 #include <arm/mv/mvvar.h>
65 #include <dev/iicbus/controller/twsi/twsi.h>
66
67 #include "iicbus_if.h"
68
69 #define MV_TWSI_NAME "twsi"
70 #define IICBUS_DEVNAME "iicbus"
71
72 #define TWSI_ADDR 0x00
73 #define TWSI_DATA 0x04
74 #define TWSI_CNTR 0x08
75 #define TWSI_XADDR 0x10
76 #define TWSI_STAT 0x0c
77 #define TWSI_BAUD_RATE 0x0c
78 #define TWSI_SRST 0x1c
79
80 #define TWSI_BAUD_RATE_RAW(C,M,N) ((C)/((10*(M+1))<<(N+1)))
81 #define TWSI_BAUD_RATE_SLOW 50000 /* 50kHz */
82 #define TWSI_BAUD_RATE_FAST 100000 /* 100kHz */
83
84 #define TWSI_DEBUG
85 #undef TWSI_DEBUG
86
87 #ifdef TWSI_DEBUG
88 #define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt,##args); } while (0)
89 #else
90 #define debugf(fmt, args...)
91 #endif
92
93 static phandle_t mv_twsi_get_node(device_t, device_t);
94 static int mv_twsi_probe(device_t);
95 static int mv_twsi_attach(device_t);
96
97 static struct ofw_compat_data compat_data[] = {
98 { "mrvl,twsi", true },
99 { "marvell,mv64xxx-i2c", true },
100 { "marvell,mv78230-i2c", true },
101 { NULL, false }
102 };
103
104 static device_method_t mv_twsi_methods[] = {
105 /* device interface */
106 DEVMETHOD(device_probe, mv_twsi_probe),
107 DEVMETHOD(device_attach, mv_twsi_attach),
108
109 /* ofw_bus interface */
110 DEVMETHOD(ofw_bus_get_node, mv_twsi_get_node),
111
112 DEVMETHOD_END
113 };
114
115 DEFINE_CLASS_1(twsi, mv_twsi_driver, mv_twsi_methods,
116 sizeof(struct twsi_softc), twsi_driver);
117
118 DRIVER_MODULE(twsi, simplebus, mv_twsi_driver, 0, 0);
119 DRIVER_MODULE(iicbus, twsi, iicbus_driver, 0, 0);
120 MODULE_DEPEND(twsi, iicbus, 1, 1, 1);
121 SIMPLEBUS_PNP_INFO(compat_data);
122
123 static phandle_t
mv_twsi_get_node(device_t bus,device_t dev)124 mv_twsi_get_node(device_t bus, device_t dev)
125 {
126
127 /* Used by ofw_iicbus. */
128 return (ofw_bus_get_node(bus));
129 }
130
131 static int
mv_twsi_probe(device_t dev)132 mv_twsi_probe(device_t dev)
133 {
134
135 if (!ofw_bus_status_okay(dev))
136 return (ENXIO);
137
138 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
139 return (ENXIO);
140
141 device_set_desc(dev, "Marvell Integrated I2C Bus Controller");
142 return (BUS_PROBE_DEFAULT);
143 }
144
145 #define ABSSUB(a,b) (((a) > (b)) ? (a) - (b) : (b) - (a))
146 static void
mv_twsi_cal_baud_rate(struct twsi_softc * sc,const uint32_t target,struct twsi_baud_rate * rate)147 mv_twsi_cal_baud_rate(struct twsi_softc *sc, const uint32_t target,
148 struct twsi_baud_rate *rate)
149 {
150 uint64_t clk;
151 uint32_t cur, diff, diff0;
152 int m, n, m0, n0;
153
154 /* Calculate baud rate. */
155 m0 = n0 = 4; /* Default values on reset */
156 diff0 = 0xffffffff;
157 clk_get_freq(sc->clk_core, &clk);
158
159 for (n = 0; n < 8; n++) {
160 for (m = 0; m < 16; m++) {
161 cur = TWSI_BAUD_RATE_RAW(clk,m,n);
162 diff = ABSSUB(target, cur);
163 if (diff < diff0) {
164 m0 = m;
165 n0 = n;
166 diff0 = diff;
167 }
168 }
169 }
170 rate->raw = TWSI_BAUD_RATE_RAW(clk, m0, n0);
171 rate->param = TWSI_BAUD_RATE_PARAM(m0, n0);
172 rate->m = m0;
173 rate->n = n0;
174 }
175
176 static int
mv_twsi_attach(device_t dev)177 mv_twsi_attach(device_t dev)
178 {
179 struct twsi_softc *sc;
180 int error;
181
182 sc = device_get_softc(dev);
183 sc->dev = dev;
184
185 /* Activate clock */
186 error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk_core);
187 if (error != 0) {
188 device_printf(dev, "could not find core clock\n");
189 return (error);
190 }
191 error = clk_enable(sc->clk_core);
192 if (error != 0) {
193 device_printf(dev, "could not enable core clock\n");
194 return (error);
195 }
196
197 if (clk_get_by_ofw_index(dev, 0, 1, &sc->clk_reg) == 0) {
198 error = clk_enable(sc->clk_reg);
199 if (error != 0) {
200 device_printf(dev, "could not enable core clock\n");
201 return (error);
202 }
203 }
204
205 mv_twsi_cal_baud_rate(sc, TWSI_BAUD_RATE_SLOW, &sc->baud_rate[IIC_SLOW]);
206 mv_twsi_cal_baud_rate(sc, TWSI_BAUD_RATE_FAST, &sc->baud_rate[IIC_FAST]);
207 if (bootverbose)
208 device_printf(dev, "calculated baud rates are:\n"
209 " %" PRIu32 " kHz (M=%d, N=%d) for slow,\n"
210 " %" PRIu32 " kHz (M=%d, N=%d) for fast.\n",
211 sc->baud_rate[IIC_SLOW].raw / 1000,
212 sc->baud_rate[IIC_SLOW].m,
213 sc->baud_rate[IIC_SLOW].n,
214 sc->baud_rate[IIC_FAST].raw / 1000,
215 sc->baud_rate[IIC_FAST].m,
216 sc->baud_rate[IIC_FAST].n);
217
218 sc->reg_data = TWSI_DATA;
219 sc->reg_slave_addr = TWSI_ADDR;
220 sc->reg_slave_ext_addr = TWSI_XADDR;
221 sc->reg_control = TWSI_CNTR;
222 sc->reg_status = TWSI_STAT;
223 sc->reg_baud_rate = TWSI_BAUD_RATE;
224 sc->reg_soft_reset = TWSI_SRST;
225
226 return (twsi_attach(dev));
227 }
228