| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineFunctionInfo.cpp | 191 const SIRegisterInfo &TRI) { in addPrivateSegmentBuffer()
199 Register SIMachineFunctionInfo::addDispatchPtr(const SIRegisterInfo &TRI) { in addDispatchPtr()
206 Register SIMachineFunctionInfo::addQueuePtr(const SIRegisterInfo &TRI) { in addQueuePtr()
213 Register SIMachineFunctionInfo::addKernargSegmentPtr(const SIRegisterInfo &TRI) { in addKernargSegmentPtr()
221 Register SIMachineFunctionInfo::addDispatchID(const SIRegisterInfo &TRI) { in addDispatchID()
228 Register SIMachineFunctionInfo::addFlatScratchInit(const SIRegisterInfo &TRI) { in addFlatScratchInit()
235 Register SIMachineFunctionInfo::addPrivateSegmentSize(const SIRegisterInfo &TRI) { in addPrivateSegmentSize()
241 Register SIMachineFunctionInfo::addImplicitBufferPtr(const SIRegisterInfo &TRI) { in addImplicitBufferPtr()
255 const SIRegisterInfo &TRI, const TargetRegisterClass *RC, in addPreloadedKernArg()
325 const SIRegisterInfo *TRI = MF.getSubtarget<GCNSubtarget>().getRegisterInfo(); in shiftSpillPhysVGPRsToLowestRange() local
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| H A D | SIFrameLowering.cpp | 80 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in getVGPRSpillLaneOrTempRegister() local
134 static void buildPrologSpill(const GCNSubtarget &ST, const SIRegisterInfo &TRI, in buildPrologSpill()
158 const SIRegisterInfo &TRI, in buildEpilogRestore()
182 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in buildGitPtr() local
202 static void initLiveUnits(LiveRegUnits &LiveUnits, const SIRegisterInfo &TRI, in initLiveUnits()
232 const SIRegisterInfo &TRI; member in llvm::PrologEpilogSGPRSpillBuilder
342 const SIRegisterInfo &TRI, in PrologEpilogSGPRSpillBuilder()
387 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionFlatScratchInit() local
542 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in getEntryFunctionReservedScratchRsrcReg() local
612 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionPrologue() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LiveRegUnits.h | 31 const TargetRegisterInfo *TRI = nullptr; variable
39 LiveRegUnits(const TargetRegisterInfo &TRI) { in LiveRegUnits()
50 const TargetRegisterInfo *TRI) { in accumulateUsedDefed()
73 void init(const TargetRegisterInfo &TRI) { in init()
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| H A D | LivePhysRegs.h | 53 const TargetRegisterInfo *TRI = nullptr; variable
62 LivePhysRegs(const TargetRegisterInfo &TRI) : TRI(&TRI) { in LivePhysRegs()
70 void init(const TargetRegisterInfo &TRI) { in init()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFrameLowering.cpp | 95 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFP() local
104 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP() local
116 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize() local
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| H A D | MipsMachineFunction.cpp | 157 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); createEhDataRegsFI() local
175 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); createISRRegFI() local
202 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); getMoveF64ViaSpillFI() local
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| H A D | MipsInstrInfo.h | 140 const TargetRegisterInfo *TRI, in storeRegToStackSlot()
148 const TargetRegisterInfo *TRI, in loadRegFromStackSlot()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreMachineFunctionInfo.cpp | 46 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot() local
64 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot() local
77 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCRegisterBankInfo.cpp | 31 PPCRegisterBankInfo::PPCRegisterBankInfo(const TargetRegisterInfo &TRI) {} in PPCRegisterBankInfo()
85 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in getInstrMapping() local
253 const TargetRegisterInfo &TRI, in hasFPConstraints()
296 const TargetRegisterInfo &TRI, in onlyUsesFP()
315 const TargetRegisterInfo &TRI, in onlyDefinesFP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86RegisterBankInfo.cpp | 32 X86RegisterBankInfo::X86RegisterBankInfo(const TargetRegisterInfo &TRI) { in X86RegisterBankInfo()
97 const TargetRegisterInfo &TRI, in hasFPConstraints()
135 const TargetRegisterInfo &TRI, in onlyUsesFP()
154 const TargetRegisterInfo &TRI, in onlyDefinesFP()
279 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in getInstrMapping() local
425 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in getInstrAlternativeMappings() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MIRPrinter.cpp | 189 const TargetRegisterInfo *TRI) { in printRegMIR()
269 const TargetRegisterInfo *TRI) { in printCustomRegMask()
289 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
312 const TargetRegisterInfo *TRI) { in convert()
386 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in convertEntryValueObjects() local
400 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in convertStackObjects() local
533 const auto *TRI = MF.getSubtarget().getRegisterInfo(); in convertCallSiteObjects() local
619 const auto *TRI = MF.getSubtarget().getRegisterInfo(); in initRegisterMaskIds() local
719 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in print() local
758 const auto *TRI = SubTarget.getRegisterInfo(); in print() local
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| H A D | MachineOperand.cpp | 84 const TargetRegisterInfo &TRI) { in substVirtReg()
93 void MachineOperand::substPhysReg(MCRegister Reg, const TargetRegisterInfo &TRI) { in substPhysReg()
360 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in isIdenticalTo() local
422 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in hash_value() local
456 const TargetRegisterInfo *&TRI, in tryToGetTargetInfo()
492 const TargetRegisterInfo *TRI) { in printCFIRegister()
570 const TargetRegisterInfo *TRI) { in printSubRegIdx()
665 const TargetRegisterInfo *TRI) { in printCFI()
779 void MachineOperand::print(raw_ostream &OS, const TargetRegisterInfo *TRI, in print()
785 const TargetRegisterInfo *TRI, in print()
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| H A D | MachineRegisterInfo.cpp | 394 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in replaceRegWith() local
480 const TargetRegisterInfo &TRI, in EmitLiveInCopies()
531 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isConstantPhysReg() local
589 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isPhysRegModified() local
604 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isPhysRegUsed() local
615 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in disableCalleeSavedRegister() local
656 const TargetRegisterInfo *TRI = getTargetRegisterInfo(); in isReservedRegUnit() local
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| H A D | InterferenceCache.cpp | 90 const TargetRegisterInfo *TRI) { in revalidate()
102 const TargetRegisterInfo *TRI, in reset()
120 const TargetRegisterInfo *TRI) { in valid()
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| H A D | MachineCopyPropagation.cpp | 122 const TargetRegisterInfo &TRI) { in markRegsUnavailable()
134 void invalidateRegister(MCRegister Reg, const TargetRegisterInfo &TRI, in invalidateRegister()
166 void clobberRegister(MCRegister Reg, const TargetRegisterInfo &TRI, in clobberRegister()
227 void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI, in trackCopy()
256 const TargetRegisterInfo &TRI, in findCopyForUnit()
267 const TargetRegisterInfo &TRI) { in findCopyDefViaUnit()
278 const TargetRegisterInfo &TRI, in findAvailBackwardCopy()
306 const TargetRegisterInfo &TRI, in findAvailCopy()
339 const TargetRegisterInfo &TRI, in findLastSeenDefInCopy()
370 const TargetRegisterInfo &TRI) { in findLastSeenUseInCopy()
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| H A D | TargetRegisterInfo.cpp | 108 Printable printReg(Register Reg, const TargetRegisterInfo *TRI, in printReg()
139 Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printRegUnit()
162 Printable printVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { in printVRegOrUnit()
173 const TargetRegisterInfo *TRI) { in printRegClassOrBank()
278 const TargetRegisterInfo *TRI) { in firstCommonClass()
379 static bool shareSameRegisterFile(const TargetRegisterInfo &TRI, in shareSameRegisterFile()
678 const TargetRegisterInfo *TRI) { in dumpReg()
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| H A D | LiveRangeEdit.cpp | 139 const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo(); in allUsesAvailableAt() local
272 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in useIsKill() local
406 const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo(); in eliminateDeadDef() local
415 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); in eliminateDeadDef() local
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| H A D | FixupStatepointCallerSaved.cpp | 92 static unsigned getRegisterSize(const TargetRegisterInfo &TRI, Register Reg) { in getRegisterSize()
113 const TargetRegisterInfo &TRI) { in performCopyPropagation()
211 const TargetRegisterInfo &TRI; member in __anon2f435cf10211::FrameIndexesCache
235 FrameIndexesCache(MachineFrameInfo &MFI, const TargetRegisterInfo &TRI) in FrameIndexesCache()
319 const TargetRegisterInfo &TRI; member in __anon2f435cf10211::StatepointState
566 const TargetRegisterInfo &TRI; member in __anon2f435cf10211::StatepointProcessor
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| H A D | RegUsageInfoCollector.cpp | 102 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); in runOnMachineFunction() local
200 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in computeCalleeSavedRegs() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.cpp | 47 const TargetRegisterInfo &TRI) { in AArch64RegisterBankInfo()
302 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in getInstrAlternativeMappings() local
505 const TargetRegisterInfo &TRI, const unsigned Depth) const { in isPHIWithFPContraints() argument
519 const TargetRegisterInfo &TRI, in hasFPConstraints()
557 const TargetRegisterInfo &TRI, in onlyUsesFP()
574 const TargetRegisterInfo &TRI, in onlyDefinesFP()
664 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in getInstrMapping() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.h | 55 const TargetRegisterInfo *TRI) const override { in spillCalleeSavedRegisters()
63 const TargetRegisterInfo *TRI) const override { in restoreCalleeSavedRegisters()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMIChecking.cpp | 36 const TargetRegisterInfo *TRI; member
108 static bool hasLiveDefs(const MachineInstr &MI, const TargetRegisterInfo *TRI) { in hasLiveDefs()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64PBQPRegAlloc.h | 27 const TargetRegisterInfo *TRI; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 248 const TargetRegisterInfo *TRI = &getRegisterInfo(); in insertBranch() local
331 const TargetRegisterInfo *TRI) { in copyPhysSubRegs()
375 const TargetRegisterInfo *TRI = &getRegisterInfo(); in copyPhysReg() local
404 const TargetRegisterInfo *TRI = &getRegisterInfo(); in copyPhysReg() local
463 const TargetRegisterInfo *TRI, in storeRegToStackSlot()
526 const TargetRegisterInfo *TRI, in loadRegFromStackSlot()
979 const TargetRegisterInfo *TRI = &getRegisterInfo(); in expandPostRAPseudo() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupBWInsts.cpp | 136 const TargetRegisterInfo *TRI = nullptr; member in __anon46e815f70111::FixupBWInstPass
184 const X86RegisterInfo *TRI = &TII->getRegisterInfo(); in getSuperRegDestIfDead() local
322 const X86RegisterInfo *TRI = &TII->getRegisterInfo(); in tryReplaceCopy() local
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