1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_IB_ADAPTERS_TAVOR_IOCTL_H 28 #define _SYS_IB_ADAPTERS_TAVOR_IOCTL_H 29 30 #include <sys/cred.h> 31 32 /* 33 * tavor_ioctl.h 34 * Contains all of the prototypes, #defines, and structures necessary 35 * for all ioctl access into the driver. This includes everything 36 * necessary for updating firmware, accessing the tavor flash device, 37 * providing interfaces for VTS. 38 */ 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 int tavor_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, 45 int *rvalp); 46 47 /* 48 * Enumerated type for the Tavor ioctl() interface types 49 */ 50 #define TAVOR_IOCTL ('t' << 8) 51 #ifdef DEBUG 52 typedef enum { 53 TAVOR_IOCTL_FLASH_READ = TAVOR_IOCTL | 0x00, 54 TAVOR_IOCTL_FLASH_WRITE = TAVOR_IOCTL | 0x01, 55 TAVOR_IOCTL_FLASH_ERASE = TAVOR_IOCTL | 0x02, 56 TAVOR_IOCTL_FLASH_INIT = TAVOR_IOCTL | 0x03, 57 TAVOR_IOCTL_FLASH_FINI = TAVOR_IOCTL | 0x04, 58 TAVOR_IOCTL_REG_WRITE = TAVOR_IOCTL | 0x10, 59 TAVOR_IOCTL_REG_READ = TAVOR_IOCTL | 0x11, 60 TAVOR_IOCTL_LOOPBACK = TAVOR_IOCTL | 0x20, 61 TAVOR_IOCTL_INFO = TAVOR_IOCTL | 0x21, 62 TAVOR_IOCTL_PORTS = TAVOR_IOCTL | 0x22, 63 TAVOR_IOCTL_DDR_READ = TAVOR_IOCTL | 0x23 64 } tavor_ioctl_enum_t; 65 #else 66 typedef enum { 67 TAVOR_IOCTL_FLASH_READ = TAVOR_IOCTL | 0x00, 68 TAVOR_IOCTL_FLASH_WRITE = TAVOR_IOCTL | 0x01, 69 TAVOR_IOCTL_FLASH_ERASE = TAVOR_IOCTL | 0x02, 70 TAVOR_IOCTL_FLASH_INIT = TAVOR_IOCTL | 0x03, 71 TAVOR_IOCTL_FLASH_FINI = TAVOR_IOCTL | 0x04, 72 TAVOR_IOCTL_LOOPBACK = TAVOR_IOCTL | 0x20, 73 TAVOR_IOCTL_INFO = TAVOR_IOCTL | 0x21, 74 TAVOR_IOCTL_PORTS = TAVOR_IOCTL | 0x22, 75 TAVOR_IOCTL_DDR_READ = TAVOR_IOCTL | 0x23 76 } tavor_ioctl_enum_t; 77 #endif /* DEBUG */ 78 79 /* 80 * Specific operations for each of the flash ioctl interfaces 81 */ 82 #define TAVOR_FLASH_READ_SECTOR 0x01 83 #define TAVOR_FLASH_READ_QUADLET 0x02 84 #define TAVOR_FLASH_WRITE_SECTOR 0x01 85 #define TAVOR_FLASH_WRITE_BYTE 0x02 86 #define TAVOR_FLASH_ERASE_SECTOR 0x01 87 #define TAVOR_FLASH_ERASE_CHIP 0x02 88 89 /* 90 * Default values for the flash (overridden by CFI info, if available) 91 */ 92 #define TAVOR_FLASH_SECTOR_SZ_DEFAULT 0x10000 93 #define TAVOR_FLASH_DEVICE_SZ_DEFAULT 0x400000 94 95 /* 96 * CFI (Common Flash Interface) initialization 97 */ 98 #define TAVOR_FLASH_CFI_INIT 0x98 99 100 /* 101 * Needed for compatability 102 */ 103 #define TAVOR_FLASH_CFI_SIZE 0x4c 104 #define TAVOR_FLASH_CFI_SIZE_QUADLET TAVOR_FLASH_CFI_SIZE >> 2 105 106 /* 107 * Expand CFI data size to support the Intel Expanded Command Set. 108 */ 109 #define TAVOR_CFI_INFO_SIZE 0x100 110 #define TAVOR_CFI_INFO_QSIZE TAVOR_CFI_INFO_SIZE >> 2 111 112 /* 113 * Mellanox uses two different parallel Flash devices for their 114 * HCAs that tavor supports. They are the AMD AM29LV033C and the 115 * Intel 28F320J3C. The AM29LV033C utilizes the AMD Standard CFI 116 * command set while the 28F320J3C utliizes the Intel Extended 117 * CFI command set. 118 */ 119 #define TAVOR_FLASH_INTEL_CMDSET 0x0001 120 #define TAVOR_FLASH_AMD_CMDSET 0x0002 121 #define TAVOR_FLASH_UNKNOWN_CMDSET 0XFFFF 122 123 /* 124 * The firmware version structure used in TAVOR_IOCTL_INFO and 125 * TAVOR_IOCTL_FLASH_INIT interfaces. The structure consists of major, 126 * minor and subminor portions for firmware revision number. 127 */ 128 typedef struct tavor_fw_info_ioctl_s { 129 uint32_t tfi_maj; 130 uint32_t tfi_min; 131 uint32_t tfi_sub; 132 } tavor_fw_info_ioctl_t; 133 134 /* 135 * structure used for read, write, and erase flash routines 136 * Supported fields for each type: 137 * read_sector: tf_type, tf_sector, tf_sector_num 138 * read_quadlet: tf_type, tf_addr, tf_quadlet 139 * write_sector: tf_type, tf_sector, tf_sector_num 140 * write_byte: tf_type, tf_addr, tf_byte 141 * erase_sector: tf_type, tf_sector_num 142 * erase_chip: tf_type 143 * 144 * The 'tf_sector' field must point to a sector sized portion of memory, as 145 * all sector read/write ioctl calls are done as one complete sector only. 146 */ 147 typedef struct tavor_flash_ioctl_s { 148 uint32_t tf_type; 149 caddr_t tf_sector; 150 uint32_t tf_sector_num; 151 uint32_t tf_addr; 152 uint32_t tf_quadlet; 153 uint8_t tf_byte; 154 } tavor_flash_ioctl_t; 155 156 /* Structure used for flash init interface */ 157 typedef struct tavor_flash_init_ioctl_s { 158 uint32_t tf_hwrev; 159 tavor_fw_info_ioctl_t tf_fwrev; 160 uint32_t tf_cfi_info[TAVOR_FLASH_CFI_SIZE_QUADLET]; 161 char tf_hwpn[64]; 162 int tf_pn_len; 163 } tavor_flash_init_ioctl_t; 164 165 /* 166 * The structure used for Tavor register read/write interface. 167 * The "trg_reg_set" field indicates the register set (the BAR) from which 168 * the access is desired (TAVOR_CMD_BAR, TAVOR_UAR_BAR, or TAVOR_DDR_BAR). 169 * The "trg_offset" and "trg_data" fields indicate the register and either 170 * the destination or source of the data to be read/written. 171 */ 172 typedef struct tavor_reg_ioctl_s { 173 uint_t trg_reg_set; 174 uint_t trg_offset; 175 uint32_t trg_data; 176 } tavor_reg_ioctl_t; 177 178 179 /* 180 * Tavor VTS IOCTL revision number. This revision number is currently 181 * expected to be passed in all Tavor VTS ioctl interfaces. 182 */ 183 #define TAVOR_VTS_IOCTL_REVISION 1 184 185 /* 186 * The port structure used in TAVOR_IOCTL_PORTS interface. 187 * Each port has an associated guid, port number, and IBA-defined 188 * logical port state. 189 */ 190 typedef struct tavor_stat_port_ioctl_s { 191 uint64_t tsp_guid; 192 uint32_t tsp_port_num; 193 uint32_t tsp_state; 194 } tavor_stat_port_ioctl_t; 195 196 /* 197 * The structure used for the TAVOR_IOCTL_PORTS interface. 198 * The number of ports and a buffer large enough for 256 199 * port structures will be supplied by the caller. The 200 * revision should be set to TAVOR_VTS_IOCTL_REVISION. The 201 * number of ports ("tp_num_ports") is always returned, 202 * regardless of success or failure otherwise. 203 */ 204 typedef struct tavor_ports_ioctl_s { 205 uint_t tp_revision; 206 tavor_stat_port_ioctl_t *tp_ports; 207 uint8_t tp_num_ports; 208 } tavor_ports_ioctl_t; 209 210 /* 211 * The structure used for TAVOR_IOCTL_DDR_READ interface. 212 * It includes byte offset within DDR from which to read 213 * a 32-bit value (offset will be rounded off to 32-bit 214 * alignment). 215 */ 216 typedef struct tavor_ddr_read_ioctl_s { 217 uint_t tdr_revision; 218 uint_t tdr_offset; 219 uint32_t tdr_data; 220 } tavor_ddr_read_ioctl_t; 221 222 /* 223 * These are the status codes that can be returned by the 224 * TAVOR_IOCTL_LOOPBACK test. They are returned as part of 225 * the tavor_loopback_ioctl_t struct (below). 226 */ 227 typedef enum { 228 TAVOR_LOOPBACK_SUCCESS, 229 TAVOR_LOOPBACK_INVALID_REVISION, 230 TAVOR_LOOPBACK_INVALID_PORT, 231 TAVOR_LOOPBACK_PROT_DOMAIN_ALLOC_FAIL, 232 TAVOR_LOOPBACK_SEND_BUF_INVALID, 233 TAVOR_LOOPBACK_SEND_BUF_MEM_REGION_ALLOC_FAIL, 234 TAVOR_LOOPBACK_SEND_BUF_COPY_FAIL, 235 TAVOR_LOOPBACK_RECV_BUF_MEM_REGION_ALLOC_FAIL, 236 TAVOR_LOOPBACK_XMIT_SEND_CQ_ALLOC_FAIL, 237 TAVOR_LOOPBACK_XMIT_RECV_CQ_ALLOC_FAIL, 238 TAVOR_LOOPBACK_XMIT_QP_ALLOC_FAIL, 239 TAVOR_LOOPBACK_RECV_SEND_CQ_ALLOC_FAIL, 240 TAVOR_LOOPBACK_RECV_RECV_CQ_ALLOC_FAIL, 241 TAVOR_LOOPBACK_RECV_QP_ALLOC_FAIL, 242 TAVOR_LOOPBACK_XMIT_QP_INIT_FAIL, 243 TAVOR_LOOPBACK_XMIT_QP_RTR_FAIL, 244 TAVOR_LOOPBACK_XMIT_QP_RTS_FAIL, 245 TAVOR_LOOPBACK_RECV_QP_INIT_FAIL, 246 TAVOR_LOOPBACK_RECV_QP_RTR_FAIL, 247 TAVOR_LOOPBACK_RECV_QP_RTS_FAIL, 248 TAVOR_LOOPBACK_WQE_POST_FAIL, 249 TAVOR_LOOPBACK_CQ_POLL_FAIL, 250 TAVOR_LOOPBACK_SEND_RECV_COMPARE_FAIL 251 } tavor_loopback_error_t; 252 253 /* 254 * The structure used for TAVOR_IOCTL_LOOPBACK interface. 255 * It defines the port number, number of iterations, wait duration, 256 * number of retries and the data pattern to be sent. Upon return, 257 * the driver will supply the number of iterations succesfully 258 * completed, and the kind of failure (if any, along with the failing 259 * data pattern). 260 */ 261 typedef struct tavor_loopback_ioctl_s { 262 uint_t tlb_revision; 263 caddr_t tlb_send_buf; 264 caddr_t tlb_fail_buf; 265 uint_t tlb_buf_sz; 266 uint_t tlb_num_iter; 267 uint_t tlb_pass_done; 268 uint_t tlb_timeout; 269 tavor_loopback_error_t tlb_error_type; 270 uint8_t tlb_port_num; 271 uint8_t tlb_num_retry; 272 } tavor_loopback_ioctl_t; 273 274 /* 275 * The structure used for the TAVOR_IOCTL_INFO interface. It 276 * includes firmware version, hardware version, accessable 277 * range of adapter DDR memory, and adapter flash memory size. 278 */ 279 typedef struct tavor_info_ioctl_s { 280 uint_t ti_revision; 281 tavor_fw_info_ioctl_t ti_fw_rev; 282 uint32_t ti_hw_rev; 283 uint_t ti_flash_sz; 284 uint_t ti_mem_start_offset; 285 uint_t ti_mem_end_offset; 286 } tavor_info_ioctl_t; 287 288 289 #ifdef __cplusplus 290 } 291 #endif 292 293 #endif /* _SYS_IB_ADAPTERS_TAVOR_IOCTL_H */ 294