1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * This file is part of the Chelsio T4 support code. 14 * 15 * Copyright (C) 2011-2013 Chelsio Communications. All rights reserved. 16 * 17 * This program is distributed in the hope that it will be useful, but WITHOUT 18 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 19 * FITNESS FOR A PARTICULAR PURPOSE. See the LICENSE file included in this 20 * release for licensing terms and conditions. 21 */ 22 23 /* 24 * Copyright 2025 Oxide Computer Company 25 */ 26 27 #ifndef __T4NEX_H 28 #define __T4NEX_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 #define T4_IOCTL ((('t' << 16) | '4') << 8) 35 #define T4_IOCTL_PCIGET32 (T4_IOCTL + 1) 36 #define T4_IOCTL_PCIPUT32 (T4_IOCTL + 2) 37 #define T4_IOCTL_GET32 (T4_IOCTL + 3) 38 #define T4_IOCTL_PUT32 (T4_IOCTL + 4) 39 #define T4_IOCTL_REGDUMP (T4_IOCTL + 5) 40 #define T4_IOCTL_SGE_CONTEXT (T4_IOCTL + 6) 41 #define T4_IOCTL_DEVLOG (T4_IOCTL + 7) 42 #define T4_IOCTL_GET_MEM (T4_IOCTL + 8) 43 #define T4_IOCTL_GET_TID_TAB (T4_IOCTL + 9) 44 #define T4_IOCTL_GET_MBOX (T4_IOCTL + 10) 45 #define T4_IOCTL_GET_CIM_LA (T4_IOCTL + 11) 46 #define T4_IOCTL_GET_CIM_QCFG (T4_IOCTL + 12) 47 #define T4_IOCTL_GET_CIM_IBQ (T4_IOCTL + 13) 48 #define T4_IOCTL_GET_EDC (T4_IOCTL + 14) 49 #define T4_IOCTL_LOAD_FW (T4_IOCTL + 15) 50 #define T4_IOCTL_GET_CUDBG (T4_IOCTL + 16) 51 52 enum { 53 T4_CTXT_EGRESS, 54 T4_CTXT_INGRESS, 55 T4_CTXT_FLM 56 }; 57 58 struct t4_reg32_cmd { 59 uint32_t reg; 60 uint32_t value; 61 }; 62 63 #define T4_REGDUMP_SIZE (160 * 1024) 64 #define T6_REGDUMP_SIZE (332 * 1024) 65 #define T5_REGDUMP_SIZE (332 * 1024) 66 67 struct t4_regdump { 68 uint32_t version; 69 uint32_t len; 70 uint32_t data[]; 71 }; 72 73 struct t4_sge_context { 74 uint32_t version; 75 uint32_t mem_id; 76 uint32_t addr; 77 uint32_t len; 78 uint8_t *data; 79 }; 80 81 struct t4_mem_range { 82 uint32_t addr; 83 uint32_t len; 84 uint32_t *data; 85 }; 86 87 struct t4_tid_info { 88 uint32_t len; 89 uint32_t *data; 90 }; 91 92 struct t4_mbox { 93 uint32_t len; 94 uint32_t *data; 95 }; 96 97 struct t4_cim_la { 98 uint32_t len; 99 uint32_t *data; 100 }; 101 102 struct t4_ibq { 103 uint32_t len; 104 uint32_t *data; 105 }; 106 107 struct t4_edc { 108 uint32_t len; 109 uint32_t mem; 110 uint32_t pos; 111 char *data; 112 }; 113 114 struct t4_cim_qcfg { 115 uint16_t base[14]; 116 uint16_t size[14]; 117 uint16_t thres[6]; 118 uint32_t stat[4 * (6 + 8)]; 119 uint32_t obq_wr[2 * (8)]; 120 uint32_t num_obq; 121 }; 122 123 #define T4_DEVLOG_SIZE 32768 124 struct t4_devlog { 125 uint32_t len; 126 uint32_t data[0]; 127 }; 128 129 struct t4_ldfw { 130 uint32_t len; 131 uint32_t data[0]; 132 }; 133 134 struct t4_cudbg_dump { 135 uint8_t wr_flash; 136 uint8_t bitmap[16]; 137 uint32_t len; 138 uint32_t data[0]; 139 }; 140 141 #ifdef __cplusplus 142 } 143 #endif 144 145 #endif /* __T4NEX_H */ 146