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Searched defs:SuperRC (Results 1 – 14 of 14) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp1260 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in copyFromSrcRegs() local
1308 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeRead2Pair() local
1437 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeImagePair() local
1473 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeSMemLoadImmPair() local
1506 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeBufferLoadPair() local
1547 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeTBufferLoadPair() local
1633 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI, Paired); in mergeFlatLoadPair() local
H A DSIRegisterInfo.cpp2907 SIRegisterInfo::getCompatibleSubRegClass(const TargetRegisterClass *SuperRC, in getCompatibleSubRegClass()
H A DSIInstrInfo.cpp5653 const MachineOperand &SuperReg, const TargetRegisterClass *SuperRC, in buildExtractSubReg()
5667 const MachineOperand &Op, const TargetRegisterClass *SuperRC, in buildExtractSubRegOrImm()
5707 const TargetRegisterClass *SuperRC = RI.getLargestLegalSuperClass(RC, *MF); in isLegalRegOperand() local
H A DAMDGPUISelDAGToDAG.cpp379 const TargetRegisterClass *SuperRC = in getOperandRegClass() local
H A DAMDGPUInstructionSelector.cpp3012 const TargetRegisterClass *SuperRC, Register IdxReg, in computeIndirectRegIndex()
H A DSIISelLowering.cpp4602 const TargetRegisterClass *SuperRC, in computeIndirectRegAndOffset()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp439 if (const TargetRegisterClass *SuperRC = *RC.getSuperClasses()) in getHexagonSubRegIndex() local
H A DHexagonCopyToCombine.cpp584 const TargetRegisterClass *SuperRC = nullptr; in combine() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DAggressiveAntiDepBreaker.cpp606 const TargetRegisterClass *SuperRC = in FindSuitableFreeRegisters() local
H A DRegAllocGreedy.cpp1337 const MachineInstr *MI, Register Reg, const TargetRegisterClass *SuperRC, in getNumAllocatableRegsForConstraints()
1439 const TargetRegisterClass *SuperRC = in tryInstructionSplit() local
H A DTargetLoweringBase.cpp1238 const TargetRegisterClass *SuperRC = TRI->getRegClass(i); in findRepresentativeClass() local
H A DMachineVerifier.cpp2628 const TargetRegisterClass *SuperRC = in visitMachineOperand() local
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.h437 CodeGenRegisterClass *SuperRC) { in addSuperRegClass()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h684 getSubRegisterClass(const TargetRegisterClass *SuperRC, in getSubRegisterClass()