Searched defs:SubRegs (Results 1 – 10 of 10) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRewritePartialRegUses.cpp | 103 mutable SmallDenseMap<std::pair<unsigned, unsigned>, unsigned> SubRegs; member in __anonf1e524d80111::GCNRewritePartialRegUsesImpl
391 SubRegMap SubRegs; in rewriteReg() local
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| H A D | AMDGPUInstructionSelector.cpp | 654 ArrayRef<int16_t> SubRegs = TRI.getRegSplitParts(DstRC, SrcSize / 8); in selectG_MERGE_VALUES() local
699 ArrayRef<int16_t> SubRegs = TRI.getRegSplitParts(SrcRC, DstSize / 8); in selectG_UNMERGE_VALUES() local
3220 ArrayRef<int16_t> SubRegs = TRI.getRegSplitParts(SuperRC, EltSize); in computeIndirectRegIndex() local
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| H A D | SIInstrInfo.cpp | 6364 unsigned SubRegs = RI.getRegSizeInBits(*VRC) / 32; in readlaneVGPRToSGPR() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 116 uint32_t SubRegs; // Sub-register set, described above member
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenRegisters.h | 301 SubRegMap SubRegs; variable
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| H A D | CodeGenRegisters.cpp | 557 const ListInit *SubRegs = Def->getValueAsListInit("SubRegs"); in expand() local
2168 const SubRegMap &SubRegs = Register.getSubRegs(); in computeRegUnitLaneMasks() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1404 static const unsigned SubRegs[] = {AArch64::dsub0, AArch64::dsub1, in createDTuple() local
1413 static const unsigned SubRegs[] = {AArch64::qsub0, AArch64::qsub1, in createQTuple() local
1423 static const unsigned SubRegs[] = {AArch64::zsub0, AArch64::zsub1, in createZTuple() local
1436 static const unsigned SubRegs[] = {AArch64::zsub0, AArch64::zsub1, in createZMulTuple() local
1443 const unsigned SubRegs[]) { in createTuple()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 712 const unsigned SubRegs[], MachineIRBuilder &MIB) { in createTuple()
733 static const unsigned SubRegs[] = {AArch64::dsub0, AArch64::dsub1, in createDTuple() local
742 static const unsigned SubRegs[] = {AArch64::qsub0, AArch64::qsub1, in createQTuple() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 763 unsigned SubRegs = 0; in copyPhysReg() local
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| H A D | ARMISelDAGToDAG.cpp | 2929 uint16_t SubRegs[2] = {ARM::gsub_0, ARM::gsub_1}; in SelectCDE_CXxD() local
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