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Searched defs:SubReg0 (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp204 unsigned SubReg0; in isProfitableToTransform() local
296 unsigned Src0 = 0, SubReg0; in transformInstruction() local
H A DAArch64ISelLowering.cpp27465 SDValue SubReg0 = DAG.getTargetConstant(AArch64::sube64, DL, MVT::i32); in createGPRPairNode() local
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp387 SDValue SubReg0 = CurDAG->getTargetConstant(CSKY::sub32_0, dl, MVT::i32); in createGPRPairNode() local
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp1848 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::gsub_0, dl, MVT::i32); in createGPRPairNode() local
1859 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::ssub_0, dl, MVT::i32); in createSRegPairNode() local
1870 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::dsub_0, dl, MVT::i32); in createDRegPairNode() local
1881 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::qsub_0, dl, MVT::i32); in createQRegPairNode() local
1893 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::ssub_0, dl, MVT::i32); in createQuadSRegsNode() local
1908 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::dsub_0, dl, MVT::i32); in createQuadDRegsNode() local
1923 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::qsub_0, dl, MVT::i32); in createQuadQRegsNode() local
H A DARMISelLowering.cpp10524 SDValue SubReg0 = DAG.getTargetConstant(ARM::gsub_0, dl, MVT::i32); in createGPRPairNode2xi32() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp1015 unsigned SubReg0 = Defs[I].second; in isRegSeqSplat() local
H A DAMDGPUISelDAGToDAG.cpp685 SDValue RC, SubReg0, SubReg1; in Select() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetInstrInfo.cpp202 unsigned SubReg0 = HasDef ? MI.getOperand(0).getSubReg() : 0; in commuteInstructionImpl() local