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Searched defs:SubReg (Results 1 – 25 of 74) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveVariables.cpp224 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in FindLastPartialDef() local
245 for (MCPhysReg SubReg : TRI->subregs_inclusive(DefReg)) in FindLastPartialDef() local
275 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in HandlePhysRegUse() local
297 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) in HandlePhysRegUse() local
312 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in FindLastRefOrPartRef() local
360 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in HandlePhysRegKill() local
389 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in HandlePhysRegKill() local
467 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) in HandlePhysRegDef() local
470 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in HandlePhysRegDef() local
490 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in HandlePhysRegDef() local
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H A DLiveIntervalCalc.cpp59 if (LI.hasSubRanges() || (SubReg != 0 && TrackSubRegs)) { in calculate() local
159 if (SubReg != 0) { in extendToUses() local
H A DDetectDeadLanes.cpp92 unsigned SubReg = MI.getOperand(2).getImm(); in isCrossCopy() local
343 unsigned SubReg = MO.getSubReg(); in determineInitialUsedLanes() local
419 unsigned SubReg = MO.getSubReg(); in isUndefRegAtInput() local
H A DMachineInstrBundle.cpp199 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in finalizeBundle() local
318 unsigned SubReg = MO.getSubReg(); in AnalyzeVirtRegLanesInBundle() local
H A DLiveIntervals.cpp584 unsigned SubReg = MO.getSubReg(); in shrinkToUses() local
802 unsigned SubReg = MO.getSubReg(); in addKillFlags() local
1044 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local
1061 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local
1475 unsigned SubReg = MO.getSubReg(); in findLastUseBefore() local
1609 unsigned SubReg = MO.getSubReg(); in repairOldRegInRange() local
1704 unsigned SubReg = MO.getSubReg(); in repairIntervalsInRange() local
H A DLiveRangeEdit.cpp140 unsigned SubReg = MO.getSubReg(); in allUsesAvailableAt() local
273 unsigned SubReg = MO.getSubReg(); in useIsKill() local
H A DCriticalAntiDepBreaker.cpp216 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) in PrescanInstruction() local
240 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) { in PrescanInstruction() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp104 static bool isGPR64(unsigned Reg, unsigned SubReg, in isGPR64()
113 static bool isFPR64(unsigned Reg, unsigned SubReg, in isFPR64()
129 unsigned &SubReg) { in getSrcFromCopy()
245 unsigned SubReg; in isProfitableToTransform() local
H A DAArch64RegisterInfo.cpp355 for (MCPhysReg SubReg : in UpdateCustomCallPreservedMask() local
468 for (MCPhysReg SubReg : subregs_inclusive(AArch64::ZA)) in getStrictlyReservedRegs() local
476 for (MCSubRegIterator SubReg(AArch64::ZT0, this, /*self=*/true); in getStrictlyReservedRegs() local
1067 MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNRewritePartialRegUses.cpp86 unsigned SubReg = AMDGPU::NoSubRegister; member
180 unsigned GCNRewritePartialRegUses::shiftSubReg(unsigned SubReg, in shiftSubReg()
426 const unsigned SubReg = MO.getSubReg(); in rewriteReg() local
469 unsigned SubReg = SubRegs[MO.getSubReg()].SubReg; in rewriteReg() local
H A DSIRegisterInfo.h387 // \returns a DWORD offset of a \p SubReg in getNumChannelsFromSubReg() argument
382 getChannelFromSubReg(unsigned SubReg) getChannelFromSubReg() argument
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H A DSIPreAllocateWWMRegs.cpp133 const unsigned SubReg = MO.getSubReg(); in rewriteRegs() local
H A DSIRegisterInfo.cpp1542 Register SubReg = e == 1 in buildSpillLoadStore() local
1782 Register SubReg = in spillSGPR() local
1836 Register SubReg = in spillSGPR() local
1898 Register SubReg = in restoreSGPR() local
1931 Register SubReg = in restoreSGPR() local
1978 Register SubReg = in spillEmergencySGPR() local
2013 Register SubReg = in spillEmergencySGPR() local
3029 unsigned SubReg, in shouldCoalesce()
3156 MachineInstr *SIRegisterInfo::findReachingDef(Register Reg, unsigned SubReg, in findReachingDef()
H A DSIFormMemoryClauses.cpp374 for (unsigned SubReg : KilledIndexes) { in runOnMachineFunction() local
H A DSIFrameLowering.cpp254 Register SubReg = NumSubRegs == 1 in saveToMemory() local
275 Register SubReg = NumSubRegs == 1 in saveToVGPRLane() local
302 Register SubReg = NumSubRegs == 1 in restoreFromMemory() local
321 Register SubReg = NumSubRegs == 1 in restoreFromVGPRLane() local
H A DR600OptimizeVectorRegisters.cpp192 unsigned SubReg = It.first; in RebuildVector() local
H A DSIFixSGPRCopies.cpp295 unsigned SubReg = CopyUse.getOperand(1).getSubReg(); in foldVGPRCopyIntoRegSequence() local
1062 unsigned SubReg = MI->getOperand(1).getSubReg(); in lowerVGPR2SGPRCopies() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsOptionRecord.cpp74 for (const MCPhysReg &SubReg : MCRegInfo->subregs_inclusive(Reg)) { in SetPhysRegUsed() local
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp550 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RSP)) in getReservedRegs() local
557 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RIP)) in getReservedRegs() local
562 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RBP)) in getReservedRegs() local
576 for (const MCPhysReg &SubReg : subregs_inclusive(BasePtr)) in getReservedRegs() local
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLivePhysRegs.h86 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) in addReg() local
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.cpp266 for (const auto &SubReg : SubRegs) { in inheritRegUnits() local
361 for (const auto &SubReg : Map) in computeSubRegs() local
368 for (const auto &SubReg : SubRegs) { in computeSubRegs() local
488 const CodeGenRegister *SubReg; in computeSecondarySubRegs() local
546 for (auto SubReg : NewSubReg->SubRegs) { in computeSecondarySubRegs() local
565 for (auto SubReg : SubRegs) in computeSuperRegs() local
571 for (auto SubReg : SubRegs) { in computeSuperRegs() local
595 for (auto SubReg : SubRegs) in addSubRegsPreOrder() local
2174 CodeGenRegister *SubReg = S.second; in computeRegUnitLaneMasks() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.cpp314 MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp354 const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMIPeephole.cpp218 Register SubReg = MovMI->getOperand(1).getReg(); eliminateZExtSeq() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp650 const TargetRegisterInfo &TRI, unsigned &SubReg) { in getSubRegForClass()
924 const TargetRegisterClass *To, unsigned SubReg) { in copySubReg()
1035 unsigned SubReg; in selectCopy() local
2940 unsigned SubReg; in select() local
2956 unsigned SubReg; in select() local
3771 unsigned SubReg = 0; in emitNarrowVector() local
4067 unsigned SubReg = 0; in selectUnmergeValues() local
5736 unsigned SubReg; in tryOptBuildVecToSubregToReg() local
5810 unsigned SubReg = 0; in selectBuildVector() local
5865 unsigned SubReg = Size == 64 ? AArch64::dsub0 : AArch64::qsub0; in selectVectorLoadIntrinsic() local
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