| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64AdvSIMDScalarPass.cpp | 102 static bool isGPR64(unsigned Reg, unsigned SubReg, in isGPR64() 111 static bool isFPR64(unsigned Reg, unsigned SubReg, in isFPR64() 127 unsigned &SubReg) { in getSrcFromCopy() 243 unsigned SubReg; in isProfitableToTransform() local
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| H A D | AArch64RegisterInfo.cpp | 364 for (MCPhysReg SubReg : in UpdateCustomCallPreservedMask() local 477 for (MCPhysReg SubReg : subregs_inclusive(AArch64::ZA)) in getStrictlyReservedRegs() local 485 for (MCSubRegIterator SubReg(AArch64::ZT0, this, /*self=*/true); in getStrictlyReservedRegs() local 1320 MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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| H A D | SMEPeepholeOpt.cpp | 262 MCRegister SubReg = MCRegister::NoRegister; in visitRegSequence() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveVariables.cpp | 223 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in FindLastPartialDef() local 272 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in HandlePhysRegUse() local 293 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) in HandlePhysRegUse() local 308 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in FindLastRefOrPartRef() local 356 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in HandlePhysRegKill() local 384 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in HandlePhysRegKill() local 465 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in HandlePhysRegDef() local 483 for (MCPhysReg SubReg : TRI->subregs(Reg)) { in HandlePhysRegDef() local 498 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) { in UpdatePhysRegDefs() local
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| H A D | LiveIntervalCalc.cpp | 57 unsigned SubReg = MO.getSubReg(); in calculate() local 157 unsigned SubReg = MO.getSubReg(); in extendToUses() local
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| H A D | DetectDeadLanes.cpp | 92 unsigned SubReg = MI.getOperand(2).getImm(); in isCrossCopy() local 343 unsigned SubReg = MO.getSubReg(); in determineInitialUsedLanes() local 426 unsigned SubReg = MO.getSubReg(); in isUndefRegAtInput() local
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| H A D | LiveIntervals.cpp | 600 unsigned SubReg = MO.getSubReg(); in shrinkToUses() local 827 unsigned SubReg = MO.getSubReg(); in addKillFlags() local 1077 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local 1094 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local 1511 unsigned SubReg = MO.getSubReg(); in findLastUseBefore() local 1645 unsigned SubReg = MO.getSubReg(); in repairOldRegInRange() local 1740 unsigned SubReg = MO.getSubReg(); in repairIntervalsInRange() local
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| H A D | LiveRangeEdit.cpp | 140 unsigned SubReg = MO.getSubReg(); in allUsesAvailableAt() local 269 unsigned SubReg = MO.getSubReg(); in useIsKill() local
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| H A D | CriticalAntiDepBreaker.cpp | 217 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) in PrescanInstruction() local 241 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) { in PrescanInstruction() local
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| H A D | VirtRegMap.cpp | 609 const LiveInterval &LI, const MachineBasicBlock &MBB, unsigned SubReg, in liveOutUndefPhiLanesForUndefSubregDef() 667 unsigned SubReg = MO.getSubReg(); in rewrite() local
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| H A D | MachineInstrBundle.cpp | 298 unsigned SubReg = MO.getSubReg(); in AnalyzeVirtRegLanesInBundle() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsOptionRecord.cpp | 74 for (const MCPhysReg &SubReg : MCRegInfo->subregs_inclusive(Reg)) { in SetPhysRegUsed() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.h | 423 unsigned getChannelFromSubReg(unsigned SubReg) const { in getChannelFromSubReg() 428 unsigned getNumChannelsFromSubReg(unsigned SubReg) const { in getNumChannelsFromSubReg()
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| H A D | SIRegisterInfo.cpp | 1787 Register SubReg = e == 1 in buildSpillLoadStore() local 2059 Register SubReg = in spillSGPR() local 2113 Register SubReg = in spillSGPR() local 2175 Register SubReg = in restoreSGPR() local 2208 Register SubReg = in restoreSGPR() local 2255 Register SubReg = in spillEmergencySGPR() local 2292 Register SubReg = in spillEmergencySGPR() local 3727 unsigned SubReg, in shouldCoalesce() 3920 MachineInstr *SIRegisterInfo::findReachingDef(Register Reg, unsigned SubReg, in findReachingDef()
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| H A D | SIPreAllocateWWMRegs.cpp | 137 const unsigned SubReg = MO.getSubReg(); in rewriteRegs() local
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| H A D | SIFormMemoryClauses.cpp | 375 for (unsigned SubReg : KilledIndexes) { in run() local
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| H A D | GCNRewritePartialRegUses.cpp | 167 unsigned GCNRewritePartialRegUsesImpl::shiftSubReg(unsigned SubReg, in shiftSubReg()
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| H A D | GCNSchedStrategy.cpp | 1683 unsigned SubReg = MO.getSubReg(); in allUsesAvailableAt() local 1913 unsigned SubReg = DefMI->getOperand(0).getSubReg(); in rematerialize() local 2066 unsigned SubReg = RematMI.getOperand(0).getSubReg(); in finalizeGCNSchedStage() local
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| H A D | SIFrameLowering.cpp | 254 Register SubReg = NumSubRegs == 1 in saveToMemory() local 275 Register SubReg = NumSubRegs == 1 in saveToVGPRLane() local 302 Register SubReg = NumSubRegs == 1 in restoreFromMemory() local 322 Register SubReg = NumSubRegs == 1 in restoreFromVGPRLane() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 554 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RSP)) in getReservedRegs() local 561 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RIP)) in getReservedRegs() local 571 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RBP)) in getReservedRegs() local 584 for (const MCPhysReg &SubReg : subregs_inclusive(BasePtr)) in getReservedRegs() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LivePhysRegs.h | 86 for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg)) in addReg() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.cpp | 309 MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVPreLegalizerCombiner.cpp | 64 Register SubReg = MI.getOperand(2).getReg(); in matchLengthToDistance() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 349 const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.cpp | 389 unsigned SubReg = RI.getSubReg(Reg, M68k::MxSubRegIndex8Lo); in ExpandMOVI() local 418 unsigned SubReg = RI.getSubReg(Reg, M68k::MxSubRegIndex16Lo); in ExpandMOVI() local
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