| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 1003 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPExt() local 1082 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in selectFPTrunc() local 1105 MVT DstVT, SrcVT; in selectFPToInt() local 1216 MVT SrcVT = ArgVT; in processCallArgs() local 1224 MVT SrcVT = ArgVT; in processCallArgs() local 1788 EVT SrcVT, DestVT; in selectTrunc() local 1825 MVT SrcVT = SrcEVT.getSimpleVT(); in selectIntExt() local 1835 bool MipsFastISel::emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntSExt32r1() 1854 bool MipsFastISel::emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntSExt32r2() 1869 bool MipsFastISel::emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in emitIntSExt() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 812 MVT SrcVT = SrcEVT.getSimpleVT(); in PPCEmitCmp() local 945 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in SelectFPExt() local 963 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in SelectFPTrunc() local 1005 Register PPCFastISel::PPCMoveToFPReg(MVT SrcVT, Register SrcReg, in PPCMoveToFPReg() 1064 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() local 1176 MVT DstVT, SrcVT; in SelectFPToI() local 1794 bool PPCFastISel::PPCEmitIntExt(MVT SrcVT, Register SrcReg, MVT DestVT, in PPCEmitIntExt() 1865 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true); in SelectTrunc() local 1904 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 1183 MVT SrcVT = RetVT; in emitAddSub() local 2833 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType(), true); in selectFPToInt() local 2872 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType(), true); in selectIntToFP() local 3043 MVT SrcVT = ArgVT; in processCallArgs() local 3053 MVT SrcVT = ArgVT; in processCallArgs() local 3959 MVT SrcVT = SrcEVT.getSimpleVT(); in selectTrunc() local 4106 Register AArch64FastISel::emitLSL_ri(MVT RetVT, MVT SrcVT, Register Op0, in emitLSL_ri() 4210 Register AArch64FastISel::emitLSR_ri(MVT RetVT, MVT SrcVT, Register Op0, in emitLSR_ri() 4327 Register AArch64FastISel::emitASR_ri(MVT RetVT, MVT SrcVT, Register Op0, in emitASR_ri() 4407 Register AArch64FastISel::emitIntExt(MVT SrcVT, Register SrcReg, MVT DestVT, in emitIntExt() [all …]
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| H A D | AArch64ISelLowering.cpp | 4356 EVT SrcVT = SrcVal.getValueType(); in LowerFP_ROUND() local 4632 EVT SrcVT = SrcVal.getValueType(); in LowerVectorFP_TO_INT_SAT() local 4736 EVT SrcVT = SrcVal.getValueType(); in LowerFP_TO_INT_SAT() local 10594 EVT SrcVT = In2.getValueType(); in LowerFCOPYSIGN() local 13011 EVT SrcVT = Src.getValueType(); in ReconstructShuffle() local 13061 EVT SrcVT = Src.ShuffleVec.getValueType(); in ReconstructShuffle() local 13958 EVT SrcVT = SrcOp.getValueType(); in LowerZERO_EXTEND_VECTOR_INREG() local 16059 EVT SrcVT = Src.getValueType(); in LowerVECREDUCE() local 18040 bool AArch64TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap() 20055 EVT SrcVT = N->getOperand(0).getValueType(); in performConcatVectorsCombine() local [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 618 bool shouldMergeStoreOfLoadsOverCall(EVT SrcVT, EVT MergedVT) const override { in shouldMergeStoreOfLoadsOverCall()
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| H A D | RISCVISelLowering.cpp | 2072 bool RISCVTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const { in isTruncateFree() 2084 EVT SrcVT = Val.getValueType(); in isTruncateFree() local 2113 bool RISCVTargetLowering::isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const { in isSExtCheaperThanZExt() 2340 bool RISCVTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap() 3112 MVT SrcVT = Src.getSimpleValueType(); in lowerFP_TO_INT_SAT() local 3492 MVT SrcVT = Src.getSimpleValueType(); in lowerVectorXRINT_XROUND() local 3706 MVT SrcVT = Src.getSimpleValueType(); in matchSplatAsGather() local 4969 MVT SrcVT = Src.getSimpleValueType(); in lowerVECTOR_SHUFFLEAsVSlidedown() local 6478 MVT SrcVT = Source.getSimpleValueType(); in lowerVPCttzElements() local 7515 MVT SrcVT = Src.getSimpleValueType(); in LowerOperation() local [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 701 EVT SrcVT, Register &ResultReg) { in X86FastEmitExtend() 1244 EVT SrcVT = TLI.getValueType(DL, RV->getType()); in X86SelectRet() local 1544 MVT SrcVT = TLI.getSimpleValueType(DL, I->getOperand(0)->getType()); in X86SelectZExt() local 1602 MVT SrcVT = TLI.getSimpleValueType(DL, I->getOperand(0)->getType()); in X86SelectSExt() local 2408 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType()); in X86SelectIntToFP() local 2521 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType()); in X86SelectTrunc() local 2553 MVT SrcVT, DstVT; in X86SelectBitCast() local 3721 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType()); in fastSelectInstruction() local
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| H A D | X86ISelLowering.cpp | 3371 bool X86TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap() 5258 EVT SrcVT = Op.getOperand(0).getValueType(); in getTargetConstantBitsFromNode() local 6372 EVT SrcVT = SrcVec.getValueType(); in getFauxShuffleMask() local 6470 EVT SrcVT = Src.getValueType(); in getFauxShuffleMask() local 6581 EVT SrcVT = Src.getValueType(); in getFauxShuffleMask() local 6607 EVT SrcVT = Src.getValueType(); in getFauxShuffleMask() local 6820 EVT SrcVT = Src.getValueType(); in getShuffleScalarElt() local 8907 EVT SrcVT = Idx.getValueType(); in createVariablePermute() local 9818 EVT SrcVT = Src.getValueType(); in IsElementEquivalent() local 10557 static bool matchShuffleAsVTRUNC(MVT &SrcVT, MVT &DstVT, MVT VT, in matchShuffleAsVTRUNC() [all …]
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| H A D | X86SelectionDAGInfo.cpp | 311 EVT SrcVT = Src.getValueType(); in emitConstantSizeRepmov() local
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| H A D | X86ISelDAGToDAG.cpp | 1399 MVT SrcVT = N->getOperand(0).getSimpleValueType(); in PreprocessISelDAG() local 1455 MVT SrcVT = N->getOperand(1).getSimpleValueType(); in PreprocessISelDAG() local 2829 MVT SrcVT = ShlSrc.getSimpleValueType(); in matchAddressRecursively() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyTargetTransformInfo.cpp | 98 auto SrcVT = SrcTy.getSimpleVT(); in getCastInstrCost() local
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| H A D | WebAssemblyISelLowering.cpp | 2334 EVT SrcVT = Src.getValueType(); in LowerEXTEND_VECTOR_INREG() local 3137 EVT SrcVT = In.getValueType(); in truncateVectorWithNARROW() local 3220 EVT SrcVT = Src.getValueType(); in performBitcastCombine() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 1386 MVT SrcVT = SrcEVT.getSimpleVT(); in ARMEmitCmp() local 1587 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() local 2654 EVT SrcVT, DestVT; in SelectTrunc() local 2672 Register ARMFastISel::ARMEmitIntExt(MVT SrcVT, Register SrcReg, MVT DestVT, in ARMEmitIntExt() 2828 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt() local
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| H A D | ARMISelLowering.cpp | 6116 EVT SrcVT = Tmp1.getValueType(); in LowerFCOPYSIGN() local 6322 EVT SrcVT = Op.getValueType(); in ExpandBITCAST() local 8316 EVT SrcVT = Src.ShuffleVec.getValueType(); in ReconstructShuffle() local 18647 EVT SrcVT = Src.getValueType(); in PerformBITCASTCombine() local 18661 EVT SrcVT = Src.getValueType(); in PerformBITCASTCombine() local 19291 bool ARMTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const { in isTruncateFree() 20856 MVT SrcVT = (Sz == 16 ? MVT::f16 : MVT::f32); in LowerFP_EXTEND() local 20882 EVT SrcVT = SrcVal.getValueType(); in LowerFP_ROUND() local 21189 bool ARMTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 1407 EVT SrcVT = Src.getValueType(); in ExpandANY_EXTEND_VECTOR_INREG() local 1440 EVT SrcVT = Src.getValueType(); in ExpandSIGN_EXTEND_VECTOR_INREG() local 1465 EVT SrcVT = Src.getValueType(); in ExpandZERO_EXTEND_VECTOR_INREG() local 1824 EVT SrcVT = Src.getValueType(); in ExpandUINT_TO_FLOAT() local
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| H A D | FastISel.cpp | 1442 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType()); in selectCast() local 1480 MVT SrcVT = SrcEVT.getSimpleVT(); in selectBitCast() local 1852 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType()); in selectOperator() local
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| H A D | TargetLowering.cpp | 724 EVT SrcVT = Src.getValueType(); in SimplifyMultipleUseDemandedBits() local 910 EVT SrcVT = Src.getValueType(); in SimplifyMultipleUseDemandedBits() local 2493 EVT SrcVT = Src.getValueType(); in SimplifyDemandedBits() local 2534 EVT SrcVT = Src.getValueType(); in SimplifyDemandedBits() local 2597 EVT SrcVT = Src.getValueType(); in SimplifyDemandedBits() local 2751 EVT SrcVT = Src.getValueType(); in SimplifyDemandedBits() local 3242 EVT SrcVT = Src.getValueType(); in SimplifyDemandedVectorElts() local 3264 EVT SrcVT = Src.getValueType(); in SimplifyDemandedVectorElts() local 3707 EVT SrcVT = Src.getValueType(); in SimplifyDemandedVectorElts() local 8391 EVT SrcVT = Src.getValueType(); in expandFP_TO_SINT() local [all …]
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| H A D | LegalizeDAG.cpp | 731 EVT SrcVT = LD->getMemoryVT(); in LegalizeLoadOps() local 1845 EVT SrcVT = SrcOp.getValueType(); in EmitStackConvert() local 2678 EVT SrcVT = Op0.getValueType(); in ExpandLegalINT_TO_FP() local 3338 EVT SrcVT = Op.getValueType(); in ExpandNode() local
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| H A D | LegalizeVectorTypes.cpp | 661 EVT SrcVT = Src.getValueType(); in ScalarizeVecRes_FP_TO_XINT_SAT() local 2697 EVT SrcVT = N->getOperand(0).getValueType(); in SplitVecRes_ExtendOp() local 3142 EVT SrcVT = N->getOperand(0).getValueType(); in SplitVecRes_FP_TO_XINT_SAT() local 5517 EVT SrcVT = Src.getValueType(); in WidenVecRes_FP_TO_XINT_SAT() local 5538 EVT SrcVT = Src.getValueType(); in WidenVecRes_XROUND() local 7126 EVT SrcVT = Src.getValueType(); in WidenVecOp_FP_TO_XINT_SAT() local 7797 EVT SrcVT = Source.getValueType(); in WidenVecOp_VP_CttzElements() local
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| H A D | DAGCombiner.cpp | 3851 static SDValue getTruncatedUSUBSAT(EVT DstVT, EVT SrcVT, SDValue LHS, in getTruncatedUSUBSAT() 7184 EVT SrcVT = Src.getValueType(); in combineShiftAnd1ToBitTest() local 7462 EVT SrcVT = N0Op0.getValueType(); in visitAND() local 11392 EVT SrcVT = N->getValueType(0); in foldABSToABD() local 13894 EVT SrcVT = N0.getValueType(); in CombineExtLoad() local 14772 EVT SrcVT = N0.getOperand(0).getValueType(); in visitZERO_EXTEND() local 15780 EVT SrcVT = EVT::getVectorVT(*DAG.getContext(), in foldExtendVectorInregToExtendOfSubvector() local 15920 static SDValue foldToSaturated(SDNode *N, EVT &VT, SDValue &Src, EVT &SrcVT, in foldToSaturated() 15923 auto AllowedTruncateSat = [&](unsigned Opc, EVT SrcVT, EVT VT) -> bool { in foldToSaturated() 15950 EVT SrcVT = N0.getValueType(); in visitTRUNCATE() local [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1038 bool AMDGPUTargetLowering::isNarrowingProfitable(SDNode *N, EVT SrcVT, in isNarrowingProfitable() 1605 EVT SrcVT = Op.getOperand(0).getValueType(); in LowerEXTRACT_SUBVECTOR() local 3414 EVT SrcVT = Src.getValueType(); in LowerUINT_TO_FP() local 3460 EVT SrcVT = Src.getValueType(); in LowerSINT_TO_FP() local 3509 EVT SrcVT = Src.getValueType(); in LowerFP_TO_INT64() local 3688 EVT SrcVT = Src.getValueType(); in LowerFP_TO_INT() local 3988 EVT SrcVT = Src.getValueType(); in performAssertSZExtCombine() local 4419 EVT SrcVT = Src.getValueType(); in performTruncateCombine() local 5168 EVT SrcVT = Src.getValueType(); in performFNegCombine() local 5254 EVT SrcVT = Src.getValueType(); in performFAbsCombine() local [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TypePromotion.cpp | 939 EVT SrcVT = TLI->getValueType(DL, I->getType()); in run() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2718 static unsigned decideComp(EVT SrcVT, ISD::CondCode CC) { in decideComp() 2727 static EVT decideCompType(EVT SrcVT) { in decideCompType() 2733 static bool safeWithoutCompWithNull(EVT SrcVT, ISD::CondCode CC, in safeWithoutCompWithNull()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 4084 EVT SrcVT = Src.getValueType(); in ReplaceNodeResults() local 4576 EVT SrcVT = Src.getValueType(); in performSETCC_BITCASTCombine() local 4649 EVT SrcVT = Src.getValueType(); in performBITCASTCombine() local 8411 bool LoongArchTargetLowering::isSExtCheaperThanZExt(EVT SrcVT, in isSExtCheaperThanZExt() 8552 MVT SrcVT = Src.getSimpleValueType(); in SimplifyDemandedBitsForTargetNode() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 3275 virtual bool isFPExtFree(EVT DestVT, EVT SrcVT) const { in isFPExtFree() 3293 EVT DestVT, EVT SrcVT) const { in isFPExtFoldable() 3394 virtual bool isNarrowingProfitable(SDNode *N, EVT SrcVT, EVT DestVT) const { in isNarrowingProfitable() 3422 virtual bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
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