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Searched defs:SrcReg1 (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PreLegalizerCombiner.cpp562 Register DstReg, Register SrcReg1, Register SrcReg2) { in matchPushAddSubExt()
588 Register SrcReg1, Register SrcReg2) { in applyPushAddSubExt()
H A DAArch64LegalizerInfo.cpp1409 Register SrcReg1 = MI.getOperand(2).getReg(); in legalizeICMP() local
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMCCodeEmitter.cpp249 MCRegister SrcReg1 = MI.getOperand(0).getReg(); in expandLongCondBr() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SIMDInstrOpt.cpp435 Register SrcReg1 = MI.getOperand(2).getReg(); optimizeVectElement() local
H A DAArch64InstrInfo.cpp4813 Register SrcReg1 = SrcReg; in storeRegPairToStackSlot() local
6670 Register SrcReg1 = MUL->getOperand(2).getReg(); in genFusedMultiply() local
6734 Register SrcReg1 = MAD->getOperand(2).getReg(); in genFNegatedMAD() local
6901 Register SrcReg1 = MUL->getOperand(2).getReg(); in genMaddR() local
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp850 Register SrcReg1 = getRegForValue(SrcValue1); in PPCEmitCmp() local
1300 Register SrcReg1 = getRegForValue(I->getOperand(0)); in SelectBinaryIntOp() local
H A DPPCInstrInfo.cpp5404 Register SrcReg1 = MI->getOperand(1).getReg(); in isSignOrZeroExtended() local
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1412 Register SrcReg1 = getRegForValue(Src1Value); in ARMEmitCmp() local
1758 Register SrcReg1 = getRegForValue(I->getOperand(0)); in SelectBinaryIntOp() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp2557 Register SrcReg1 = MI.getOperand(2).getReg(); in applyMappingImpl() local