/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonPeephole.cpp | 136 Register SrcReg = Src.getReg(); in runOnMachineFunction() local 156 Register SrcReg = Src2.getReg(); in runOnMachineFunction() local 173 Register SrcReg = Src1.getReg(); in runOnMachineFunction() local 184 Register SrcReg = Src.getReg(); in runOnMachineFunction() local 206 Register SrcReg = Src.getReg(); in runOnMachineFunction() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64MIPeepholeOpt.cpp | 213 Register NewDstReg) { in visitAND() 277 Register SrcReg = MI.getOperand(2).getReg(); in visitORR() local 386 Register NewDstReg) { in visitADDSUB() 432 Register NewDstReg) { in visitADDSSUBS() 535 Register SrcReg = MI.getOperand(1).getReg(); in splitTwoPartImm() local 599 Register SrcReg = SrcMI->getOperand(1).getReg(); in visitINSviGPR() local 716 Register SrcReg = SrcMI->getOperand(1).getReg(); in visitCopy() local
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H A D | AArch64RedundantCopyElimination.cpp | 186 MCPhysReg SrcReg = PredI.getOperand(1).getReg(); in knownRegValInBlock() local 382 Register SrcReg = IsCopy ? MI->getOperand(1).getReg() : Register(); in optimizeBlock() local
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | LegalizationArtifactCombiner.h | 68 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineAnyExt() local 127 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineZExt() local 202 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineSExt() local 268 Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg()); in tryCombineTrunc() local 565 static void replaceRegOrBuildCopy(Register DstReg, Register SrcReg, in replaceRegOrBuildCopy() 636 Register SrcReg = Concat.getReg(StartSrcIdx); in findValueFromConcat() local 784 Register SrcReg = MI.getOperand(1).getReg(); in findValueFromExt() local 810 Register SrcReg = MI.getOperand(1).getReg(); in findValueFromTrunc() local 843 Register SrcReg = Def->getOperand(Def->getNumOperands() - 1).getReg(); in findValueFromDefImpl() local 1061 Register SrcReg = MI.getSourceReg(); in tryCombineUnmergeValues() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 215 MachineInstrBuilder emitInstStore(unsigned Opc, unsigned SrcReg, in emitInstStore() 806 bool MipsFastISel::emitStore(MVT VT, unsigned SrcReg, Address &Addr) { in emitStore() 907 unsigned SrcReg = 0; in selectStore() local 997 Register SrcReg = in selectFPExt() local 1076 Register SrcReg = getRegForValue(Src); in selectFPTrunc() local 1112 Register SrcReg = getRegForValue(Src); in selectFPToInt() local 1458 unsigned SrcReg = Allocation[ArgNo].Reg; in fastLowerArguments() local 1591 Register SrcReg = getRegForValue(II->getOperand(0)); in fastLowerIntrinsicCall() local 1721 unsigned SrcReg = Reg + VA.getValNo(); in selectRet() local 1785 Register SrcReg = getRegForValue(Op); in selectTrunc() local [all …]
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H A D | MipsSEInstrInfo.cpp | 86 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg() 216 Register SrcReg, bool isKill, int FI, in storeRegToStack() 733 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local 756 Register SrcReg = I->getOperand(1).getReg(); in expandExtractElementF64() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFInstrInfo.cpp | 34 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg() 47 Register SrcReg = MI->getOperand(1).getReg(); in expandMEMCPY() local 126 Register SrcReg, bool IsKill, int FI, in storeRegToStackSlot()
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H A D | BPFMISimplifyPatchable.cpp | 191 MachineBasicBlock &MBB, MachineInstr &MI, Register &SrcReg, in processCandidate() 226 Register &DstReg, Register &SrcReg, const GlobalValue *GVal, in processDstReg() 331 Register SrcReg = MI.getOperand(1).getReg(); in removeLD() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCRegisterBankInfo.cpp | 122 Register SrcReg = MI.getOperand(1).getReg(); in getInstrMapping() local 157 Register SrcReg = MI.getOperand(1).getReg(); in getInstrMapping() local 167 Register SrcReg = MI.getOperand(0).getReg(); in getInstrMapping() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 150 unsigned SrcReg, unsigned Flag = 0, in copyRegToRegClass() 618 bool PPCFastISel::PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr) { in PPCEmitStore() 735 unsigned SrcReg = 0; in SelectStore() local 963 Register SrcReg = getRegForValue(Src); in SelectFPExt() local 981 Register SrcReg = getRegForValue(Src); in SelectFPTrunc() local 1017 unsigned PPCFastISel::PPCMoveToFPReg(MVT SrcVT, unsigned SrcReg, in PPCMoveToFPReg() 1082 Register SrcReg = getRegForValue(Src); in SelectIToFP() local 1153 unsigned SrcReg, bool IsSigned) { in PPCMoveToIntReg() 1209 Register SrcReg = getRegForValue(Src); in SelectFPToI() local 1726 unsigned SrcReg = in SelectRet() local [all …]
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H A D | PPCRegisterInfo.h | 26 inline static unsigned getCRFromCRBit(unsigned SrcReg) { in getCRFromCRBit() argument [all...] |
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.cpp | 234 Register SrcReg = Src.getReg(); in computeKnownBitsImpl() local 465 Register SrcReg = MI.getOperand(1).getReg(); in computeKnownBitsImpl() local 511 Register SrcReg = MI.getOperand(NumOps - 1).getReg(); in computeKnownBitsImpl() local 528 Register SrcReg = MI.getOperand(1).getReg(); in computeKnownBitsImpl() local 534 Register SrcReg = MI.getOperand(1).getReg(); in computeKnownBitsImpl() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstructionSelector.cpp |
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
H A D | X86InstructionSelector.cpp | 283 Register SrcReg = I.getOperand(1).getReg(); in selectCopy() local 776 const TargetRegisterClass *DstRC, const unsigned SrcReg, in selectTurnIntoCOPY() 797 const Register SrcReg = I.getOperand(1).getReg(); in selectTruncOrPtrToInt() local 861 const Register SrcReg = I.getOperand(1).getReg(); in selectZext() local 926 const Register SrcReg = I.getOperand(1).getReg(); in selectAnyext() local 1230 const Register SrcReg = I.getOperand(1).getReg(); in selectExtract() local 1280 bool X86InstructionSelector::emitExtractSubreg(unsigned DstReg, unsigned SrcReg, in emitExtractSubreg() 1318 bool X86InstructionSelector::emitInsertSubreg(unsigned DstReg, unsigned SrcReg, in emitInsertSubreg() 1362 const Register SrcReg = I.getOperand(1).getReg(); in selectInsert() local 1421 Register SrcReg = I.getOperand(NumDefs).getReg(); in selectUnmergeValues() local
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | PHIEliminationUtils.cpp | 22 unsigned SrcReg) { in findPHICopyInsertPoint()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchOptWInstrs.cpp | 477 static bool isSignExtendedW(Register SrcReg, const LoongArchSubtarget &ST, in isSignExtendedW() 483 auto AddRegToWorkList = [&](Register SrcReg) { in isSignExtendedW() 697 Register SrcReg = MI.getOperand(1).getReg(); in removeSExtWInstrs() local
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H A D | LoongArchInstrInfo.cpp | 42 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg() 111 MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Register SrcReg, in storeRegToStackSlot() 187 Register SrcReg = LoongArch::R0; in movImm() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | Thumb1InstrInfo.cpp | 45 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg() 116 Register SrcReg, bool isKill, int FI, in storeRegToStackSlot()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZElimCompare.cpp | 212 unsigned SrcReg = getCompareSourceReg(Compare); in convertToBRCT() local 256 unsigned SrcReg = getCompareSourceReg(Compare); in convertToLoadAndTrap() local 509 unsigned SrcReg = getCompareSourceReg(Compare); in optimizeCompareZero() local 612 Register SrcReg = Compare.getOperand(0).getReg(); in fuseCompareOperations() local
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H A D | SystemZPostRewrite.cpp | 83 Register SrcReg = MBBI->getOperand(2).getReg(); in selectLOCRMux() local 158 Register SrcReg = MI.getOperand(2).getReg(); in expandCondMove() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRExpandPseudoInsts.cpp | 155 Register SrcReg = MI.getOperand(2).getReg(); in expandArith() local 188 Register SrcReg = MI.getOperand(2).getReg(); in expandLogic() local 498 Register SrcReg = MI.getOperand(1).getReg(); in expand() local 531 Register SrcReg = MI.getOperand(1).getReg(); in expand() local 662 Register SrcReg = MI.getOperand(1).getReg(); in expand() local 707 Register SrcReg = MI.getOperand(1).getReg(); in expand() local 740 Register SrcReg = MI.getOperand(1).getReg(); in expand() local 772 Register SrcReg = MI.getOperand(1).getReg(); in expand() local 840 Register SrcReg = MI.getOperand(1).getReg(); in expandLPMWELPMW() local 952 Register SrcReg = MI.getOperand(1).getReg(); in expandLPMBELPMB() local [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCDuplexInfo.cpp | 190 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local 536 unsigned DstReg, SrcReg; in subInstWouldBeExtended() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.cpp | 37 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, in storeRegToStackSlot() 93 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVOptWInstrs.cpp | 396 static bool isSignExtendedW(Register SrcReg, const RISCVSubtarget &ST, in isSignExtendedW() 402 auto AddRegToWorkList = [&](Register SrcReg) { in isSignExtendedW() 644 Register SrcReg = MI.getOperand(1).getReg(); in removeSExtWInstrs() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUCombinerHelper.cpp | 404 Register SrcReg = Def->getOperand(1).getReg(); in isFPExtFromF16OrConst() local 423 Register SrcReg = MI.getOperand(1).getReg(); in matchExpandPromotedF16FMed3() local
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