| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFixSGPRCopies.cpp | 195 const TargetRegisterClass *SrcRC = SrcReg.isVirtual() in getCopyRegClasses() local
209 static bool isVGPRToSGPRCopy(const TargetRegisterClass *SrcRC, in isVGPRToSGPRCopy()
216 static bool isSGPRToVGPRCopy(const TargetRegisterClass *SrcRC, in isSGPRToVGPRCopy()
285 const TargetRegisterClass *SrcRC, *DstRC; in foldVGPRCopyIntoRegSequence() local
313 const TargetRegisterClass *SrcRC = in foldVGPRCopyIntoRegSequence() local
630 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction() local
660 const TargetRegisterClass *SrcRC = MRI->getRegClass(MO.getReg()); in runOnMachineFunction() local
763 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction() local
854 const TargetRegisterClass *SrcRC = in tryMoveVGPRConstToSGPR() local
1063 const TargetRegisterClass *SrcRC = in lowerVGPR2SGPRCopies() local
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| H A D | AMDGPUInstructionSelector.cpp | 114 const TargetRegisterClass *SrcRC in constrainCopyLikeIntrin() local
147 const TargetRegisterClass *SrcRC in selectCOPY() local
518 const TargetRegisterClass *SrcRC = in selectG_EXTRACT() local
564 const TargetRegisterClass *SrcRC in selectG_MERGE_VALUES() local
593 const TargetRegisterClass *SrcRC = in selectG_UNMERGE_VALUES() local
2217 const TargetRegisterClass *SrcRC = in selectG_TRUNC() local
2364 const TargetRegisterClass *SrcRC = in selectG_SZA_EXT() local
2408 const TargetRegisterClass &SrcRC = InReg && DstSize > 32 ? in selectG_SZA_EXT() local
2936 const TargetRegisterClass *SrcRC = TRI.getRegClassForTypeOnBank(Ty, *SrcRB); in selectG_PTRMASK() local
3053 const TargetRegisterClass *SrcRC = in selectG_EXTRACT_VECTOR_ELT() local
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| H A D | SIRegisterInfo.cpp | 2928 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
3008 const TargetRegisterClass *SrcRC = getRegClassForReg(MRI, MO.getReg()); in getRegClassForOperandReg() local
3028 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | |
| H A D | X86RegisterInfo.cpp | 223 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| H A D | X86DomainReassignment.cpp | 66 static const TargetRegisterClass *getDstRC(const TargetRegisterClass *SrcRC, in getDstRC()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 293 const TargetRegisterClass *SrcRC = in selectCopy() local
331 const TargetRegisterClass *SrcRC = getRegClassFromGRPhysReg(SrcReg); in selectCopy() local
768 const TargetRegisterClass *SrcRC) { in canTurnIntoCOPY()
812 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcRB); in selectTruncOrPtrToInt() local
941 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcRB); in selectAnyext() local
1302 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcReg, MRI); in emitExtractSubreg() local
1340 const TargetRegisterClass *SrcRC = getRegClass(SrcTy, SrcReg, MRI); in emitInsertSubreg() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrInfo.cpp | 38 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in copyPhysReg() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXCopy.cpp | 99 const TargetRegisterClass *SrcRC = &PPC::VSLRCRegClass; in processBlock() local
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| H A D | PPCMIPeephole.cpp | 1238 const TargetRegisterClass *SrcRC = MRI->getRegClassOrNull(SrcReg); in simplifyCode() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InstructionSelect.cpp | 240 auto SrcRC = MRI.getRegClass(SrcReg); in runOnMachineFunction() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostSelectOptimize.cpp | 133 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src); in foldSimpleCrossClassCopies() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineCombiner.cpp | 176 auto SrcRC = MRI->getRegClass(Src); in isTransientMI() local
185 auto SrcRC = MRI->getRegClass(Src); in isTransientMI() local
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| H A D | TargetRegisterInfo.cpp | 382 const TargetRegisterClass *SrcRC, in shareSameRegisterFile()
412 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| H A D | DetectDeadLanes.cpp | 73 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg); in isCrossCopy() local
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| H A D | RegisterCoalescer.cpp | 492 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src); in setRegisters() local
1981 auto SrcRC = MRI->getRegClass(CP.getSrcReg()); in joinCopy() local
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| H A D | PeepholeOptimizer.cpp | 793 const TargetRegisterClass *SrcRC = MRI->getRegClass(CurSrcPair.Reg); in findNextSource() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.cpp | 314 MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 878 const TargetRegisterClass *SrcRC, in shouldCoalesce()
938 const TargetRegisterClass *SrcRC, in shouldRewriteCopySrc()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.cpp | 354 const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 380 const TargetRegisterClass *SrcRC, in shouldCoalesce() argument
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGFast.cpp | 374 const TargetRegisterClass *SrcRC, in InsertCopiesAndMoveSuccs()
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| H A D | InstrEmitter.cpp | 154 const TargetRegisterClass *SrcRC = nullptr, *DstRC = nullptr; in EmitCopyFromReg() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 1067 MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 1114 const TargetRegisterClass *SrcRC, in shouldCoalesce()
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