| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 3841 bool RISCVDAGToDAGISel::selectVSplat(SDValue N, SDValue &SplatVal) { in selectVSplat()
3850 static bool selectVSplatImmHelper(SDValue N, SDValue &SplatVal, in selectVSplatImmHelper()
3885 bool RISCVDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &SplatVal) { in selectVSplatSimm5()
3890 bool RISCVDAGToDAGISel::selectVSplatSimm5Plus1(SDValue N, SDValue &SplatVal) { in selectVSplatSimm5Plus1()
3897 bool RISCVDAGToDAGISel::selectVSplatSimm5Plus1NoDec(SDValue N, SDValue &SplatVal) { in selectVSplatSimm5Plus1NoDec()
3905 SDValue &SplatVal) { in selectVSplatSimm5Plus1NonZero()
3915 SDValue &SplatVal) { in selectVSplatUimm()
3921 bool RISCVDAGToDAGISel::selectVSplatImm64Neg(SDValue N, SDValue &SplatVal) { in selectVSplatImm64Neg()
3926 bool RISCVDAGToDAGISel::selectLow8BitsVSplat(SDValue N, SDValue &SplatVal) { in selectLow8BitsVSplat()
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| H A D | RISCVISelLowering.cpp | 3696 static SDValue matchSplatAsGather(SDValue SplatVal, MVT VT, const SDLoc &DL, in matchSplatAsGather()
9514 SDValue SplatVal = Op.getOperand(0); in lowerVectorMaskSplat() local
19389 APInt &SplatVal) { in combineTruncToVnclip()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelDAGToDAG.cpp | 392 bool LoongArchDAGToDAGISel::selectVSplatImm(SDValue N, SDValue &SplatVal) { in selectVSplatImm()
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Constants.cpp | 118 if (const auto *SplatVal = getSplatValue()) in isAllOnesValue() local
135 if (const auto *SplatVal = getSplatValue()) in isOneValue() local
162 if (const auto *SplatVal = getSplatValue()) in isNotOneValue() local
180 if (const auto *SplatVal = getSplatValue()) in isMinSignedValue() local
207 if (const auto *SplatVal = getSplatValue()) in isNotMinSignedValue() local
1738 Constant *SplatVal = IElt->getOperand(1); in getSplatValue() local
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| H A D | ConstantFold.cpp | 397 if (Constant *SplatVal = Val->getSplatValue()) in ConstantFoldExtractElementInstruction() local
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| H A D | AsmWriter.cpp | 1763 if (auto *SplatVal = CV->getSplatValue()) { in WriteConstantInternal() local
1815 if (auto *SplatVal = CE->getSplatValue()) { in WriteConstantInternal() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 1038 MachineInstr *UseMI, unsigned UseOpIdx, int64_t SplatVal, in tryFoldRegSeqSplat()
1160 int64_t SplatVal; in foldOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVLegalizerInfo.cpp | 1016 Register SplatVal = MI.getOperand(1).getReg(); in legalizeSplatVector() local
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineVectorOps.cpp | 1309 Value *SplatVal = InsElt.getOperand(1); in foldInsSequenceIntoSplat() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11559 SDValue SplatVal = DAG.getSExtOrTrunc(CCVal, DL, SplatValVT); in LowerSELECT() local
14180 SDValue SplatVal = DAG.getAnyExtOrTrunc(Op.getOperand(0), DL, MVT::i64); in LowerSPLAT_VECTOR() local
15555 static bool isPow2Splat(SDValue Op, uint64_t &SplatVal, bool &Negated) { in isPow2Splat()
15599 uint64_t SplatVal; in LowerDIV() local
22627 SDValue SplatVal, unsigned NumVecElts) { in splitStoreSplat()
22884 SDValue SplatVal = in replaceZeroVectorStore() local
22917 SDValue SplatVal; in replaceSplatVectorStore() local
29009 uint64_t SplatVal; in LowerFixedLengthVectorIntDivideToSVE() local
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| H A D | AArch64TargetTransformInfo.cpp | 1926 if (auto *SplatVal = getSplatValue(Vec)) in instCombineSVELast() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 3000 auto IsZeroSplat = [](SDValue SplatVal) { in performVectorTruncZeroCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | IRTranslator.cpp | 3323 auto SplatVal = MIRBuilder.buildExtractVectorElementConstant( in translateShuffleVector() local
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| H A D | LegalizerHelper.cpp | 9698 APInt SplatVal = APInt::getSplat(NumBits, Scalar); in getMemsetValue() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 2116 SDValue SplatVal = Node->getOperand(0); in ExpandSPLAT_VECTOR() local
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| H A D | DAGCombiner.cpp | 12458 if (SDValue SplatVal = DAG.getSplatValue(Index); in refineUniformBase() local
12469 if (SDValue SplatVal = DAG.getSplatValue(Index.getOperand(0)); in refineUniformBase() local
12475 if (SDValue SplatVal = DAG.getSplatValue(Index.getOperand(1)); in refineUniformBase() local
12681 APInt SplatVal; in visitVECTOR_COMPRESS() local
23385 APInt SplatVal; in scalarizeExtractedBinOp() local
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| H A D | SelectionDAG.cpp | 151 bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) { in isConstantSplatVector()
188 APInt SplatVal; in isConstantSplatVectorAllOnes() local
234 APInt SplatVal; in isConstantSplatVectorAllZeros() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 8255 SDValue SplatVal = Op1->getOperand(0); in combineSTORE() local
8272 SDValue SplatVal = DAG.getSplatVector(SplatVT, SDLoc(SN), Word); in combineSTORE() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1021 APInt SplatVal; in PreprocessISelDAG() local
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| H A D | X86ISelLowering.cpp | 5323 bool isConstantSplat(SDValue Op, APInt &SplatVal, bool AllowPartialUndefs) { in isConstantSplat()
33936 APInt SplatVal; in ReplaceNodeResults() local
51169 APInt SplatVal; in combineAndMaskToShift() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 10349 unsigned SplatVal = APSplatValue.getZExtValue(); in lowerToXXSPLTI32DX() local
16557 SDValue SplatVal = in combineVectorShuffle() local
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