| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 180 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
510 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
682 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
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| H A D | MipsISelLowering.cpp | 1761 int64_t ShiftImm = 32 - (Size * 8); in emitSignExtendToI32InReg() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 1339 unsigned ShiftImm; in emitAddSub_ri() local
1379 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rs()
1421 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rx()
1574 uint64_t ShiftImm, bool WantResult) { in emitSubs_rs()
1704 uint64_t ShiftImm) { in emitLogicalOp_rs()
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| H A D | AArch64ISelDAGToDAG.cpp | 2650 uint64_t ShiftImm; in isBitfieldExtractOpFromSExtInReg() local
2781 uint64_t ShiftImm; in tryBitfieldExtractOpFromSExt() local
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| H A D | AArch64ISelLowering.cpp | 23415 unsigned ShiftImm = N->getConstantOperandVal(1); in performVectorShiftCombine() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 892 unsigned ShiftImm; // shift for OffsetReg. member
902 unsigned ShiftImm; member
914 unsigned ShiftImm; member
920 unsigned ShiftImm; member
3718 MCRegister ShiftReg, unsigned ShiftImm, SMLoc S, in CreateShiftedRegister()
3732 unsigned ShiftImm, SMLoc S, SMLoc E, in CreateShiftedImmediate()
3893 ARM_AM::ShiftOpc ShiftType, unsigned ShiftImm, unsigned Alignment, in CreateMem()
3912 unsigned ShiftImm, SMLoc S, SMLoc E, ARMAsmParser &Parser) { in CreatePostIdxReg()
5716 unsigned ShiftImm = 0; in parsePostIdxReg() local
6122 unsigned ShiftImm = 0; in parseMemory() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 844 unsigned ShiftImm = DefMI->getOperand(3).getImm(); in simplifyCode() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 948 unsigned Size, ShiftImm; in getMVEShiftImmOpValue() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 2850 unsigned ShiftImm; in SelectShift() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1868 std::optional<int64_t> ShiftImm = getVectorShiftImm(Reg, MRI); in getVectorSHLImm() local
2534 int64_t ShiftImm; in earlySelect() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 4635 int64_t ShiftImm; in matchBitfieldExtractFromSExtInReg() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 7601 const APInt &ShiftImm = N2C->getAPIntValue(); in getNode() local
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