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Searched defs:Shift1 (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/
H A DAggressiveInstCombine.cpp735 uint64_t Shift1 = 0, Shift2 = 0; in foldLoadsRecursive() local
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp13940 SDValue Shift1 = expandMul() local
13973 SDValue Shift1 = expandMul() local
13985 SDValue Shift1 = expandMul() local
14001 SDValue Shift1 = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), expandMul() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp737 bool Shift1 = mi_match( in selectG_BUILD_VECTOR() local
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DInstructionSimplify.cpp2054 const APInt *Shift1, *Shift2; in simplifyAndCommutative() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp1948 Register Shift1 = in applyShiftOfShiftedLogic() local
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp29569 SDValue Shift1 = getTargetVShiftByConstNode(X86OpcI, dl, VT, R, in LowerShift() local
47697 SDValue Shift1 = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), in combineMulSpecial() local
48031 SDValue Shift1 = in combineMul() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp7602 SDValue Shift1 = N1.getOperand(0); in matchBSwapHWordOrAndAnd() local