1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2010 QLogic Corporation. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 /* 28 * File Name: exioct.h 29 * 30 * San/Device Management Ioctl Header 31 * File is created to adhere to Solaris requirement using 8-space tabs. 32 * 33 * !!!!! PLEASE DO NOT REMOVE THE TABS !!!!! 34 * !!!!! PLEASE NO SINGLE LINE COMMENTS: // !!!!! 35 * !!!!! PLEASE NO MORE THAN 80 CHARS PER LINE !!!!! 36 * 37 * *********************************************************************** 38 * * ** 39 * * NOTICE ** 40 * * COPYRIGHT (C) 2000-2010 QLOGIC CORPORATION ** 41 * * ALL RIGHTS RESERVED ** 42 * * ** 43 * *********************************************************************** 44 */ 45 46 #ifndef _EXIOCT_H 47 #define _EXIOCT_H 48 49 #ifdef __cplusplus 50 extern "C" { 51 #endif 52 53 #include <exioctso.h> 54 55 /* 56 * NOTE: the following version defines must be updated each time the 57 * changes made may affect the backward compatibility of the 58 * input/output relations of the SDM IOCTL functions. 59 */ 60 #define EXT_VERSION 5 61 62 /* 63 * OS independent General definitions 64 */ 65 #define EXT_DEF_SIGNATURE_SIZE 8 66 #define EXT_DEF_WWN_NAME_SIZE 8 67 #define EXT_DEF_WWP_NAME_SIZE 8 68 #define EXT_DEF_SERIAL_NUM_SIZE 4 69 #define EXT_DEF_PORTID_SIZE 4 70 #define EXT_DEF_PORTID_SIZE_ACTUAL 3 71 #define EXT_DEF_MAX_STR_SIZE 128 72 #define EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH 12 73 #define EXT_DEF_MAC_ADDRESS_SIZE 6 74 75 #define EXT_DEF_ADDR_MODE_32 1 76 #define EXT_DEF_ADDR_MODE_64 2 77 78 /* 79 * *********************************************************************** 80 * OS dependent General configuration defines 81 * *********************************************************************** 82 */ 83 #define EXT_DEF_MAX_HBA EXT_DEF_MAX_HBA_OS 84 #define EXT_DEF_MAX_BUS EXT_DEF_MAX_BUS_OS 85 #define EXT_DEF_MAX_TARGET EXT_DEF_MAX_TARGET_OS 86 #define EXT_DEF_MAX_LUN EXT_DEF_MAX_LUN_OS 87 #define EXT_DEF_NON_SCSI3_MAX_LUN EXT_DEF_NON_SCSI3_MAX_LUN_OS 88 89 /* 90 * *********************************************************************** 91 * Common header struct definitions for San/Device Mgmt 92 * *********************************************************************** 93 */ 94 typedef struct { 95 UINT64 Signature; /* 8 chars string */ 96 UINT64 RequestAdr; /* 8 */ 97 UINT64 ResponseAdr; /* 8 */ 98 UINT64 VendorSpecificData; /* 8 chars string */ 99 UINT32 Status; /* 4 */ 100 UINT32 DetailStatus; /* 4 */ 101 UINT32 Reserved1; /* 4 */ 102 UINT32 RequestLen; /* 4 */ 103 UINT32 ResponseLen; /* 4 */ 104 UINT16 AddrMode; /* 2 */ 105 UINT16 Version; /* 2 */ 106 UINT16 SubCode; /* 2 */ 107 UINT16 Instance; /* 2 */ 108 UINT16 HbaSelect; /* 2 */ 109 UINT16 VendorSpecificStatus[11]; /* 22 */ 110 } EXT_IOCTL, *PEXT_IOCTL; /* size = 84 / 0x54 */ 111 112 typedef union _ext_signature { 113 UINT64 Signature; 114 char bytes[EXT_DEF_SIGNATURE_SIZE]; 115 } ext_sig_t; 116 117 /* 118 * Addressing mode used by the user application 119 */ 120 #define EXT_ADDR_MODE EXT_ADDR_MODE_OS 121 122 /* 123 * Status. These macros are being used for setting Status field in 124 * EXT_IOCTL structure. 125 */ 126 #define EXT_STATUS_OK 0 127 #define EXT_STATUS_ERR 1 128 #define EXT_STATUS_BUSY 2 129 #define EXT_STATUS_PENDING 3 130 #define EXT_STATUS_SUSPENDED 4 131 #define EXT_STATUS_RETRY_PENDING 5 132 #define EXT_STATUS_INVALID_PARAM 6 133 #define EXT_STATUS_DATA_OVERRUN 7 134 #define EXT_STATUS_DATA_UNDERRUN 8 135 #define EXT_STATUS_DEV_NOT_FOUND 9 136 #define EXT_STATUS_COPY_ERR 10 137 #define EXT_STATUS_MAILBOX 11 138 #define EXT_STATUS_UNSUPPORTED_SUBCODE 12 139 #define EXT_STATUS_UNSUPPORTED_VERSION 13 140 #define EXT_STATUS_MS_NO_RESPONSE 14 141 #define EXT_STATUS_SCSI_STATUS 15 142 #define EXT_STATUS_BUFFER_TOO_SMALL 16 143 #define EXT_STATUS_NO_MEMORY 17 144 #define EXT_STATUS_UNKNOWN 18 145 #define EXT_STATUS_UNKNOWN_DSTATUS 19 146 #define EXT_STATUS_INVALID_REQUEST 20 147 #define EXT_STATUS_DEVICE_NOT_READY 21 148 #define EXT_STATUS_DEVICE_OFFLINE 22 149 #define EXT_STATUS_HBA_NOT_READY 23 150 #define EXT_STATUS_HBA_QUEUE_FULL 24 151 #define EXT_STATUS_INVALID_VPINDEX 25 152 153 /* 154 * Detail Status contains the SCSI bus status codes. 155 */ 156 157 #define EXT_DSTATUS_GOOD 0x00 158 #define EXT_DSTATUS_CHECK_CONDITION 0x02 159 #define EXT_DSTATUS_CONDITION_MET 0x04 160 #define EXT_DSTATUS_BUSY 0x08 161 #define EXT_DSTATUS_INTERMEDIATE 0x10 162 #define EXT_DSTATUS_INTERMEDIATE_COND_MET 0x14 163 #define EXT_DSTATUS_RESERVATION_CONFLICT 0x18 164 #define EXT_DSTATUS_COMMAND_TERMINATED 0x22 165 #define EXT_DSTATUS_QUEUE_FULL 0x28 166 167 /* 168 * Detail Status contains the needed Response buffer space(bytes) 169 * when Status = EXT_STATUS_BUFFER_TOO_SMALL 170 */ 171 172 173 /* 174 * Detail Status contains one of the following codes 175 * when Status = EXT_STATUS_INVALID_PARAM or 176 * = EXT_STATUS_DEV_NOT_FOUND 177 */ 178 #define EXT_DSTATUS_NOADNL_INFO 0x00 179 #define EXT_DSTATUS_HBA_INST 0x01 180 #define EXT_DSTATUS_TARGET 0x02 181 #define EXT_DSTATUS_LUN 0x03 182 #define EXT_DSTATUS_REQUEST_LEN 0x04 183 #define EXT_DSTATUS_PATH_INDEX 0x05 184 185 /* 186 * Currently supported DeviceControl / ioctl command codes 187 */ 188 #define EXT_CC_QUERY EXT_CC_QUERY_OS 189 #define EXT_CC_SEND_FCCT_PASSTHRU EXT_CC_SEND_FCCT_PASSTHRU_OS 190 #define EXT_CC_REG_AEN EXT_CC_REG_AEN_OS 191 #define EXT_CC_GET_AEN EXT_CC_GET_AEN_OS 192 #define EXT_CC_SEND_ELS_RNID EXT_CC_SEND_ELS_RNID_OS 193 #define EXT_CC_SEND_SCSI_PASSTHRU EXT_CC_SCSI_PASSTHRU_OS 194 #define EXT_CC_READ_HOST_PARAMS EXT_CC_READ_HOST_PARAMS_OS 195 #define EXT_CC_READ_RISC_PARAMS EXT_CC_READ_RISC_PARAMS_OS 196 #define EXT_CC_UPDATE_HOST_PARAMS EXT_CC_UPDATE_HOST_PARAMS_OS 197 #define EXT_CC_UPDATE_RISC_PARAMS EXT_CC_UPDATE_RISC_PARAMS_OS 198 #define EXT_CC_READ_NVRAM EXT_CC_READ_NVRAM_OS 199 #define EXT_CC_UPDATE_NVRAM EXT_CC_UPDATE_NVRAM_OS 200 #define EXT_CC_HOST_IDX EXT_CC_HOST_IDX_OS 201 #define EXT_CC_LOOPBACK EXT_CC_LOOPBACK_OS 202 #define EXT_CC_READ_OPTION_ROM EXT_CC_READ_OPTION_ROM_OS 203 #define EXT_CC_READ_OPTION_ROM_EX EXT_CC_READ_OPTION_ROM_EX_OS 204 #define EXT_CC_UPDATE_OPTION_ROM EXT_CC_UPDATE_OPTION_ROM_OS 205 #define EXT_CC_UPDATE_OPTION_ROM_EX EXT_CC_UPDATE_OPTION_ROM_EX_OS 206 #define EXT_CC_GET_VPD EXT_CC_GET_VPD_OS 207 #define EXT_CC_SET_VPD EXT_CC_SET_VPD_OS 208 #define EXT_CC_GET_FCACHE EXT_CC_GET_FCACHE_OS 209 #define EXT_CC_GET_FCACHE_EX EXT_CC_GET_FCACHE_EX_OS 210 #define EXT_CC_HOST_DRVNAME EXT_CC_HOST_DRVNAME_OS 211 #define EXT_CC_GET_SFP_DATA EXT_CC_GET_SFP_DATA_OS 212 #define EXT_CC_WWPN_TO_SCSIADDR EXT_CC_WWPN_TO_SCSIADDR_OS 213 #define EXT_CC_PORT_PARAM EXT_CC_PORT_PARAM_OS 214 #define EXT_CC_GET_PCI_DATA EXT_CC_GET_PCI_DATA_OS 215 #define EXT_CC_GET_FWEXTTRACE EXT_CC_GET_FWEXTTRACE_OS 216 #define EXT_CC_GET_FWFCETRACE EXT_CC_GET_FWFCETRACE_OS 217 #define EXT_CC_GET_VP_CNT_ID EXT_CC_GET_VP_CNT_ID_OS 218 #define EXT_CC_VPORT_CMD EXT_CC_VPORT_CMD_OS 219 #define EXT_CC_ACCESS_FLASH EXT_CC_ACCESS_FLASH_OS 220 #define EXT_CC_RESET_FW EXT_CC_RESET_FW_OS 221 222 /* 223 * HBA port operations 224 */ 225 #define EXT_CC_GET_DATA EXT_CC_GET_DATA_OS 226 #define EXT_CC_SET_DATA EXT_CC_SET_DATA_OS 227 228 /* 229 * The following DeviceControl / ioctl command codes currently are not 230 * supported. 231 */ 232 #define EXT_CC_SEND_ELS_RTIN EXT_CC_SEND_ELS_RTIN_OS 233 234 235 /* 236 * *********************************************************************** 237 * EXT_IOCTL SubCode definition. 238 * These macros are being used for setting SubCode field in EXT_IOCTL 239 * structure. 240 * *********************************************************************** 241 */ 242 243 /* 244 * Query. 245 * Uses with EXT_QUERY as the ioctl code. 246 */ 247 #define EXT_SC_QUERY_HBA_NODE 1 248 #define EXT_SC_QUERY_HBA_PORT 2 249 #define EXT_SC_QUERY_DISC_PORT 3 250 #define EXT_SC_QUERY_DISC_TGT 4 251 #define EXT_SC_QUERY_DISC_LUN 5 /* Currently Not Supported */ 252 #define EXT_SC_QUERY_DRIVER 6 253 #define EXT_SC_QUERY_FW 7 254 #define EXT_SC_QUERY_CHIP 8 255 #define EXT_SC_QUERY_CNA_PORT 9 256 #define EXT_SC_QUERY_ADAPTER_VERSIONS 10 257 258 /* 259 * Get. 260 * Uses with EXT_GET_DATA as the ioctl code 261 */ 262 /* 1 - 99 Common */ 263 #define EXT_SC_GET_SCSI_ADDR 1 /* Currently Not Supported */ 264 #define EXT_SC_GET_ERR_DETECTIONS 2 /* Currently Not Supported */ 265 #define EXT_SC_GET_STATISTICS 3 266 #define EXT_SC_GET_BUS_MODE 4 /* Currently Not Supported */ 267 #define EXT_SC_GET_DR_DUMP_BUF 5 /* Currently Not Supported */ 268 #define EXT_SC_GET_RISC_CODE 6 269 #define EXT_SC_GET_FLASH_RAM 7 270 #define EXT_SC_GET_BEACON_STATE 8 271 #define EXT_SC_GET_DCBX_PARAM 9 272 #define EXT_SC_GET_FCF_LIST 10 273 #define EXT_SC_GET_RESOURCE_CNTS 11 274 275 /* 100 - 199 FC_INTF_TYPE */ 276 #define EXT_SC_GET_LINK_STATUS 101 /* Currently Not Supported */ 277 #define EXT_SC_GET_LOOP_ID 102 /* Currently Not Supported */ 278 #define EXT_SC_GET_LUN_BITMASK 103 279 #define EXT_SC_GET_PORT_DATABASE 104 /* Currently Not Supported */ 280 #define EXT_SC_GET_PORT_DATABASE_MEM 105 /* Currently Not Supported */ 281 #define EXT_SC_GET_PORT_SUMMARY 106 282 #define EXT_SC_GET_POSITION_MAP 107 283 #define EXT_SC_GET_RETRY_CNT 108 /* Currently Not Supported */ 284 #define EXT_SC_GET_RNID 109 285 #define EXT_SC_GET_RTIN 110 /* Currently Not Supported */ 286 #define EXT_SC_GET_FC_LUN_BITMASK 111 287 #define EXT_SC_GET_FC_STATISTICS 112 288 #define EXT_SC_GET_FC4_STATISTICS 113 289 #define EXT_SC_GET_TARGET_ID 114 290 291 292 /* 200 - 299 SCSI_INTF_TYPE */ 293 #define EXT_SC_GET_SEL_TIMEOUT 201 /* Currently Not Supported */ 294 295 #define EXT_DEF_DCBX_PARAM_BUF_SIZE 4096 /* Bytes */ 296 297 /* 298 * Set. 299 * Uses with EXT_SET_DATA as the ioctl code 300 */ 301 /* 1 - 99 Common */ 302 #define EXT_SC_RST_STATISTICS 3 303 #define EXT_SC_SET_BUS_MODE 4 /* Currently Not Supported */ 304 #define EXT_SC_SET_DR_DUMP_BUF 5 /* Currently Not Supported */ 305 #define EXT_SC_SET_RISC_CODE 6 306 #define EXT_SC_SET_FLASH_RAM 7 307 #define EXT_SC_SET_BEACON_STATE 8 308 309 /* special types (non snia) */ 310 #define EXT_SC_SET_PARMS 99 /* dpb */ 311 312 /* 100 - 199 FC_INTF_TYPE */ 313 #define EXT_SC_SET_LUN_BITMASK 103 314 #define EXT_SC_SET_RETRY_CNT 108 /* Currently Not Supported */ 315 #define EXT_SC_SET_RNID 109 316 #define EXT_SC_SET_RTIN 110 /* Currently Not Supported */ 317 #define EXT_SC_SET_FC_LUN_BITMASK 111 318 #define EXT_SC_ADD_TARGET_DEVICE 112 319 #define EXT_SC_SWAP_TARGET_DEVICE 113 320 321 /* 200 - 299 SCSI_INTF_TYPE */ 322 #define EXT_SC_SET_SEL_TIMEOUT 201 /* Currently Not Supported */ 323 324 /* SCSI passthrough */ 325 #define EXT_SC_SEND_SCSI_PASSTHRU 0 326 #define EXT_SC_SEND_FC_SCSI_PASSTHRU 1 327 328 /* NVRAM */ 329 #define EXT_SC_NVRAM_HARDWARE 0 /* Save */ 330 #define EXT_SC_NVRAM_DRIVER 1 /* Driver (Apply) */ 331 #define EXT_SC_NVRAM_ALL 2 /* NVRAM/Driver (Save+Apply) */ 332 333 /* 334 * Vport functions 335 * Used with EXT_CC_VPORT_CMD as the ioctl code. 336 */ 337 #define EXT_VF_SC_VPORT_GETINFO 1 338 #define EXT_VF_SC_VPORT_DELETE 2 339 #define EXT_VF_SC_VPORT_MODIFY 3 340 #define EXT_VF_SC_VPORT_CREATE 4 341 342 /* 343 * Flash access sub codes 344 * Used with EXT_CC_ACCESS_FLASH as the ioctl code. 345 */ 346 #define EXT_SC_FLASH_READ 0 347 #define EXT_SC_FLASH_WRITE 1 348 349 /* 350 * Reset FW subcodes for Schultz 351 * Used with EXT_CC_RESET_FW as the ioctl code. 352 */ 353 #define EXT_SC_RESET_FC_FW 1 354 #define EXT_SC_RESET_MPI_FW 2 355 356 /* Read */ 357 358 /* Write */ 359 360 /* Reset */ 361 362 /* Request struct */ 363 364 365 /* 366 * Response struct 367 */ 368 typedef struct _EXT_HBA_NODE { 369 UINT32 DriverAttr; /* 4 */ 370 UINT32 FWAttr; /* 4 */ 371 UINT16 PortCount; /* 2; 1 */ 372 UINT16 InterfaceType; /* 2; FC/SCSI */ 373 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 374 UINT8 Manufacturer[EXT_DEF_MAX_STR_SIZE]; /* 128; "QLOGIC" */ 375 UINT8 Model[EXT_DEF_MAX_STR_SIZE]; /* 128; "QLA2200" */ 376 UINT8 SerialNum[EXT_DEF_SERIAL_NUM_SIZE]; /* 4; 123 */ 377 UINT8 DriverVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "7.4.3" */ 378 UINT8 FWVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "2.1.6" */ 379 UINT8 OptRomVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "1.44" */ 380 UINT8 Reserved[32]; /* 32 */ 381 } EXT_HBA_NODE, *PEXT_HBA_NODE; /* 696 */ 382 383 /* HBA node query interface type */ 384 #define EXT_DEF_FC_INTF_TYPE 1 385 #define EXT_DEF_SCSI_INTF_TYPE 2 386 #define EXT_DEF_VIRTUAL_FC_INTF_TYPE 3 387 388 typedef struct _EXT_HBA_PORT { 389 UINT64 Target; /* 8 */ 390 UINT32 PortSupportedSpeed; /* 4 */ 391 UINT32 PortSpeed; /* 4 */ 392 UINT16 Type; /* 2; Port Type */ 393 UINT16 State; /* 2; Port State */ 394 UINT16 Mode; /* 2 */ 395 UINT16 DiscPortCount; /* 2 */ 396 UINT16 DiscPortNameType; /* 2; USE_NODE_NAME or */ 397 /* USE_PORT_NAME */ 398 UINT16 DiscTargetCount; /* 2 */ 399 UINT16 Bus; /* 2 */ 400 UINT16 Lun; /* 2 */ 401 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 402 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes valid Port Id. */ 403 UINT8 PortSupportedFC4Types; /* 1 */ 404 UINT8 PortActiveFC4Types; /* 1 */ 405 UINT8 FabricName[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 406 UINT16 LinkState2; /* 2; sfp status */ 407 UINT16 LinkState3; /* 2; reserved field */ 408 UINT8 Reserved[6]; /* 6 */ 409 } EXT_HBA_PORT, *PEXT_HBA_PORT; /* 64 */ 410 411 /* FC-4 Instrumentation */ 412 typedef struct _EXT_HBA_FC4Statistics { 413 INT64 InputRequests; /* 8 */ 414 INT64 OutputRequests; /* 8 */ 415 INT64 ControlRequests; /* 8 */ 416 INT64 InputMegabytes; /* 8 */ 417 INT64 OutputMegabytes; /* 8 */ 418 UINT64 Reserved[6]; /* 48 */ 419 } EXT_HBA_FC4STATISTICS, *PEXT_HBA_FC4STATISTICS; /* 88 */ 420 421 typedef struct _EXT_LOOPBACK_REQ { 422 UINT32 TransferCount; 423 UINT32 IterationCount; 424 UINT32 BufferAddress; 425 UINT32 BufferLength; 426 UINT16 Options; 427 UINT8 Reserved[18]; 428 } EXT_LOOPBACK_REQ, *PEXT_LOOPBACK_REQ; 429 430 typedef struct _EXT_LOOPBACK_RSP { 431 UINT64 BufferAddress; 432 UINT32 BufferLength; 433 UINT32 IterationCountLastError; 434 UINT16 CompletionStatus; 435 UINT16 CrcErrorCount; 436 UINT16 DisparityErrorCount; 437 UINT16 FrameLengthErrorCount; 438 UINT8 CommandSent; 439 UINT8 Reserved[15]; 440 } EXT_LOOPBACK_RSP, *PEXT_LOOPBACK_RSP; 441 442 /* used with loopback response CommandSent */ 443 #define INT_DEF_LB_LOOPBACK_CMD 0 444 #define INT_DEF_LB_ECHO_CMD 1 445 446 /* definition for interpreting CompletionStatus values */ 447 #define EXT_DEF_LB_COMPLETE 0x4000 448 #define EXT_DEF_LB_PARAM_ERR 0x4006 449 #define EXT_DEF_LB_LOOP_DOWN 0x400b 450 #define EXT_DEF_LB_CMD_ERROR 0x400c 451 452 /* port type */ 453 #define EXT_DEF_INITIATOR_DEV 0x1 454 #define EXT_DEF_TARGET_DEV 0x2 455 #define EXT_DEF_TAPE_DEV 0x4 456 #define EXT_DEF_FABRIC_DEV 0x8 457 458 459 /* HBA port state */ 460 #define EXT_DEF_HBA_OK 0 461 #define EXT_DEF_HBA_SUSPENDED 1 462 #define EXT_DEF_HBA_LOOP_DOWN 2 463 464 /* Connection mode */ 465 #define EXT_DEF_UNKNOWN_MODE 0 466 #define EXT_DEF_P2P_MODE 1 467 #define EXT_DEF_LOOP_MODE 2 468 #define EXT_DEF_FL_MODE 3 469 #define EXT_DEF_N_MODE 4 470 471 /* Valid name type for Disc. port/target */ 472 #define EXT_DEF_USE_NODE_NAME 1 473 #define EXT_DEF_USE_PORT_NAME 2 474 475 /* FC4 type values */ 476 #define EXT_DEF_FC4_TYPE_SCSI 0x1 477 #define EXT_DEF_FC4_TYPE_IP 0x2 478 #define EXT_DEF_FC4_TYPE_SCTP 0x4 479 #define EXT_DEF_FC4_TYPE_VI 0x8 480 481 /* IIDMA rate values */ 482 #define IIDMA_RATE_1GB 0x0 483 #define IIDMA_RATE_2GB 0x1 484 #define IIDMA_RATE_4GB 0x3 485 #define IIDMA_RATE_8GB 0x4 486 #define IIDMA_RATE_10GB 0x13 487 #define IIDMA_RATE_UNKNOWN 0xffff 488 489 /* IIDMA Mode values */ 490 #define IIDMA_MODE_0 0 491 #define IIDMA_MODE_1 1 492 #define IIDMA_MODE_2 2 493 #define IIDMA_MODE_3 3 494 495 /* Port Speed values */ 496 #define EXT_DEF_PORTSPEED_UNKNOWN 0x0 497 #define EXT_DEF_PORTSPEED_1GBIT 0x1 498 #define EXT_DEF_PORTSPEED_2GBIT 0x2 499 #define EXT_DEF_PORTSPEED_4GBIT 0x4 500 #define EXT_DEF_PORTSPEED_8GBIT 0x8 501 #define EXT_DEF_PORTSPEED_10GBIT 0x10 502 #define EXT_PORTSPEED_NOT_NEGOTIATED (1<<15) /* Speed not established */ 503 504 typedef struct _EXT_DISC_PORT { 505 UINT64 TargetId; /* 8 */ 506 UINT16 Type; /* 2; Port Type */ 507 UINT16 Status; /* 2; Port Status */ 508 UINT16 Bus; /* 2; n/a for Solaris */ 509 UINT16 LoopID; /* 2; Loop ID */ 510 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 511 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 512 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes used big endian */ 513 UINT8 Local; /* 1; Local or Remote */ 514 UINT8 Reserved[27]; /* 27 */ 515 } EXT_DISC_PORT, *PEXT_DISC_PORT; /* 64 */ 516 517 typedef struct _EXT_DISC_TARGET { 518 UINT64 TargetId; /* 8 */ 519 UINT16 Type; /* 2; Target Type */ 520 UINT16 Status; /* 2; Target Status */ 521 UINT16 Bus; /* 2; n/a for Solaris */ 522 UINT16 LunCount; /* 2; n/a for nt */ 523 UINT16 LoopID; /* 2; Loop ID */ 524 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 525 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 526 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes used big endian */ 527 UINT8 Local; /* 1; Local or Remote */ 528 UINT8 Reserved[25]; /* 25 */ 529 } EXT_DISC_TARGET, *PEXT_DISC_TARGET; /* 64 */ 530 531 /* The following command is not supported */ 532 typedef struct _EXT_DISC_LUN { /* n/a for nt */ 533 UINT16 Id; /* 2 */ 534 UINT16 State; /* 2 */ 535 UINT16 IoCount; /* 2 */ 536 UINT8 Reserved[30]; /* 30 */ 537 } EXT_DISC_LUN, *PEXT_DISC_LUN; /* 36 */ 538 539 540 /* SCSI address */ 541 typedef struct _EXT_SCSI_ADDR { 542 UINT64 Target; /* 8 */ 543 UINT16 Bus; /* 2 */ 544 UINT16 Lun; /* 2 */ 545 UINT8 Padding[12]; /* 12 */ 546 } EXT_SCSI_ADDR, *PEXT_SCSI_ADDR; /* 24 */ 547 548 549 /* Fibre Channel address */ 550 typedef struct _EXT_FC_ADDR { 551 UINT16 Type; /* 2 */ 552 union { 553 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 554 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 555 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4 */ 556 } FcAddr; 557 UINT8 Padding[4]; /* 4 */ 558 } EXT_FC_ADDR, *PEXT_FC_ADDR; /* 14 */ 559 560 #define EXT_DEF_TYPE_WWNN 1 561 #define EXT_DEF_TYPE_WWPN 2 562 #define EXT_DEF_TYPE_PORTID 3 563 #define EXT_DEF_TYPE_FABRIC 4 564 565 /* Destination address */ 566 typedef struct _EXT_DEST_ADDR { 567 union { 568 struct { 569 UINT64 Target; /* 8 */ 570 UINT16 Bus; /* 2 */ 571 UINT8 pad[6]; /* 6 */ 572 } ScsiAddr; 573 UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 574 UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 575 UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4 */ 576 } DestAddr; 577 UINT16 DestType; /* 2 */ 578 UINT16 Lun; /* 2 */ 579 UINT8 Padding[4]; /* 4 */ 580 } EXT_DEST_ADDR, *PEXT_DEST_ADDR; /* 24 */ 581 582 583 #define EXT_DEF_DESTTYPE_WWNN 1 584 #define EXT_DEF_DESTTYPE_WWPN 2 585 #define EXT_DEF_DESTTYPE_PORTID 3 586 #define EXT_DEF_DESTTYPE_FABRIC 4 587 #define EXT_DEF_DESTTYPE_SCSI 5 588 589 /* Statistic */ 590 typedef struct _EXT_HBA_PORT_STAT { 591 UINT32 ControllerErrorCount; /* 4 */ 592 UINT32 DeviceErrorCount; /* 4 */ 593 UINT32 IoCount; /* 4 */ 594 UINT32 MBytesCount; /* 4; MB of data processed */ 595 UINT32 LipResetCount; /* 4; Total no. of LIP Reset */ 596 UINT32 InterruptCount; /* 4; Total no. of Interrupts */ 597 UINT32 LinkFailureCount; /* 4 */ 598 UINT32 LossOfSyncCount; /* 4 */ 599 UINT32 LossOfSignalsCount; /* 4 */ 600 UINT32 PrimitiveSeqProtocolErrorCount; /* 4 */ 601 UINT32 InvalidTransmissionWordCount; /* 4 */ 602 UINT32 InvalidCRCCount; /* 4 */ 603 UINT8 Reserved[64]; /* 64 */ 604 } EXT_HBA_PORT_STAT, *PEXT_HBA_PORT_STAT; /* 112 */ 605 606 607 /* Driver property */ 608 typedef struct _EXT_DRIVER { 609 UINT32 MaxTransferLen; /* 4 */ 610 UINT32 MaxDataSegments; /* 4 */ 611 UINT32 Attrib; /* 4 */ 612 UINT32 InternalFlags[4]; /* 16 */ 613 UINT16 NumOfBus; /* 2; Port Type */ 614 UINT16 TargetsPerBus; /* 2; Port Status */ 615 UINT16 LunsPerTarget; /* 2 */ 616 UINT16 DmaBitAddresses; /* 2 */ 617 UINT16 IoMapType; /* 2 */ 618 UINT8 Version[EXT_DEF_MAX_STR_SIZE]; /* 128 */ 619 UINT8 Reserved[32]; /* 32 */ 620 } EXT_DRIVER, *PEXT_DRIVER; /* 198 */ 621 622 623 /* Firmware property */ 624 typedef struct _EXT_FW { 625 UINT32 Attrib; /* 4 */ 626 UINT8 Version[EXT_DEF_MAX_STR_SIZE]; /* 128 */ 627 UINT8 Reserved[66]; /* 66 */ 628 } EXT_FW, *PEXT_FW; /* 198 */ 629 630 /* ISP/Chip property */ 631 typedef struct _EXT_CHIP { 632 UINT32 IoAddr; /* 4 */ 633 UINT32 IoAddrLen; /* 4 */ 634 UINT32 MemAddr; /* 4 */ 635 UINT32 MemAddrLen; /* 4 */ 636 UINT16 VendorId; /* 2 */ 637 UINT16 DeviceId; /* 2 */ 638 UINT16 SubVendorId; /* 2 */ 639 UINT16 SubSystemId; /* 2 */ 640 UINT16 PciBusNumber; /* 2 */ 641 UINT16 PciSlotNumber; /* 2 */ 642 UINT16 ChipType; /* 2 */ 643 UINT16 InterruptLevel; /* 2 */ 644 UINT16 OutMbx[8]; /* 16 */ 645 UINT16 FuncNo; /* 2 */ 646 UINT8 Reserved[29]; /* 29 */ 647 UINT8 ChipRevID; /* 1 */ 648 } EXT_CHIP, *PEXT_CHIP; /* 80 */ 649 650 /* CNA properties */ 651 typedef struct _EXT_CNA_PORT { 652 UINT16 VLanId; /* 2 */ 653 UINT8 VNPortMACAddress[EXT_DEF_MAC_ADDRESS_SIZE]; /* 6 */ 654 UINT16 FabricParam; /* 2 */ 655 UINT16 Reserved0; /* 2 */ 656 UINT32 Reserved[29]; /* 116 */ 657 } EXT_CNA_PORT, *PEXT_CNA_PORT; /* 128 */ 658 659 /* Fabric Parameters */ 660 #define EXT_DEF_MAC_ADDR_MODE_FPMA 0x8000 661 662 #define NO_OF_VERSIONS 2 663 #define FLASH_VERSION 0 664 #define RUNNING_VERSION 1 665 #define EXT_OPT_ROM_REGION_MPI_RISC_FW 0x40 666 #define EXT_OPT_ROM_REGION_EDC_PHY_FW 0x45 667 668 typedef struct _EXT_REGIONVERSION { 669 UINT16 Region; 670 UINT16 SubRegion; /* If all boot codes are under region 0x7 */ 671 UINT16 Location; /* 0: Flash, 1: Running */ 672 UINT16 VersionLength; 673 UINT8 Version[8]; 674 UINT8 Reserved[8]; 675 } EXT_REGIONVERSION, *PEXT_REGIONVERSION; 676 677 typedef struct _EXT_ADAPTERREGIONVERSION { 678 UINT32 Length; /* number of struct REGIONVERSION */ 679 UINT32 Reserved; 680 EXT_REGIONVERSION RegionVersion[1]; /* variable length */ 681 } EXT_ADAPTERREGIONVERSION, *PEXT_ADAPTERREGIONVERSION; 682 683 /* Request Buffer for RNID */ 684 typedef struct _EXT_RNID_REQ { 685 EXT_FC_ADDR Addr; /* 14 */ 686 UINT8 DataFormat; /* 1 */ 687 UINT8 Pad; /* 1 */ 688 UINT8 OptWWN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ 689 UINT8 OptPortId[EXT_DEF_PORTID_SIZE]; /* 4 */ 690 UINT8 Reserved[51]; /* 51 */ 691 } EXT_RNID_REQ, *PEXT_RNID_REQ; /* 79 */ 692 693 #define EXT_DEF_RNID_DFORMAT_NONE 0 694 #define EXT_DEF_RNID_DFORMAT_TOPO_DISC 0xDF 695 696 /* Request Buffer for Set RNID */ 697 typedef struct _EXT_SET_RNID_REQ { 698 UINT8 IPVersion[2]; /* 2 */ 699 UINT8 UDPPortNumber[2]; /* 2 */ 700 UINT8 IPAddress[16]; /* 16 */ 701 UINT8 Reserved[64]; /* 64 */ 702 } EXT_SET_RNID_REQ, *PEXT_SET_RNID_REQ; /* 84 */ 703 704 /* RNID definition and data struct */ 705 #define SEND_RNID_RSP_SIZE 72 706 707 typedef struct _RNID_DATA 708 { 709 UINT32 UnitType; /* 4 */ 710 UINT32 NumOfAttachedNodes; /* 4 */ 711 UINT16 TopoDiscFlags; /* 2 */ 712 UINT16 Reserved; /* 2 */ 713 UINT8 WWN[16]; /* 16 */ 714 UINT8 PortId[4]; /* 4 */ 715 UINT8 IPVersion[2]; /* 2 */ 716 UINT8 UDPPortNumber[2]; /* 2 */ 717 UINT8 IPAddress[16]; /* 16 */ 718 } EXT_RNID_DATA, *PEXT_RNID_DATA; /* 52 */ 719 720 721 /* SCSI pass-through */ 722 typedef struct _EXT_SCSI_PASSTHRU { 723 EXT_SCSI_ADDR TargetAddr; 724 UINT8 Direction; 725 UINT8 CdbLength; 726 UINT8 Cdb[EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH]; 727 UINT8 Reserved[66]; 728 UINT8 SenseData[256]; 729 } EXT_SCSI_PASSTHRU, *PEXT_SCSI_PASSTHRU; 730 731 /* FC SCSI pass-through */ 732 typedef struct _EXT_FC_SCSI_PASSTHRU { 733 EXT_DEST_ADDR FCScsiAddr; 734 UINT8 Direction; 735 UINT8 CdbLength; 736 UINT8 Cdb[EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH]; 737 UINT8 Reserved[64]; 738 UINT8 SenseData[256]; 739 } EXT_FC_SCSI_PASSTHRU, *PEXT_FC_SCSI_PASSTHRU; 740 741 /* SCSI pass-through direction */ 742 #define EXT_DEF_SCSI_PASSTHRU_DATA_IN 1 743 #define EXT_DEF_SCSI_PASSTHRU_DATA_OUT 2 744 745 746 /* EXT_REG_AEN Request struct */ 747 typedef struct _EXT_REG_AEN { 748 UINT32 Enable; /* 4; non-0 to enable, 0 to disable. */ 749 UINT8 Reserved[4]; /* 4 */ 750 } EXT_REG_AEN, *PEXT_REG_AEN; /* 8 */ 751 752 /* EXT_GET_AEN Response struct */ 753 typedef struct _EXT_ASYNC_EVENT { 754 UINT32 AsyncEventCode; /* 4 */ 755 union { 756 struct { 757 UINT8 RSCNInfo[EXT_DEF_PORTID_SIZE_ACTUAL]; /* 3 BE */ 758 UINT8 AddrFormat; /* 1 */ 759 UINT8 Rsvd_1[8]; /* 8 */ 760 } RSCN; 761 762 UINT8 Reserved[12]; /* 12 */ 763 } Payload; 764 } EXT_ASYNC_EVENT, *PEXT_ASYNC_EVENT; /* 16 */ 765 766 767 /* Asynchronous Event Codes */ 768 #define EXT_DEF_LIP_OCCURRED 0x8010 769 #define EXT_DEF_LINK_UP 0x8011 770 #define EXT_DEF_LINK_DOWN 0x8012 771 #define EXT_DEF_LIP_RESET 0x8013 772 #define EXT_DEF_RSCN 0x8015 773 #define EXT_DEF_DEVICE_UPDATE 0x8014 774 775 /* LED state information */ 776 #define EXT_DEF_GRN_BLINK_OFF 0x00 777 #define EXT_DEF_GRN_BLINK_ON 0x01 778 779 typedef struct _EXT_BEACON_CONTROL { 780 UINT32 State; /* 4 */ 781 UINT8 Reserved[12]; /* 12 */ 782 } EXT_BEACON_CONTROL, *PEXT_BEACON_CONTROL; /* 16 */ 783 784 /* Required # of entries in the queue buffer allocated. */ 785 #define EXT_DEF_MAX_AEN_QUEUE EXT_DEF_MAX_AEN_QUEUE_OS 786 787 /* 788 * LUN BitMask structure definition, array of 8bit bytes, 789 * 1 bit per lun. When bit == 1, the lun is masked. 790 * Most significant bit of mask[0] is lun 0. 791 * Least significant bit of mask[0] is lun 7. 792 */ 793 typedef struct _EXT_LUN_BIT_MASK { 794 #if ((EXT_DEF_NON_SCSI3_MAX_LUN & 0x7) == 0) 795 UINT8 mask[EXT_DEF_NON_SCSI3_MAX_LUN >> 3]; 796 #else 797 UINT8 mask[(EXT_DEF_NON_SCSI3_MAX_LUN + 8) >> 3 ]; 798 #endif 799 } EXT_LUN_BIT_MASK, *PEXT_LUN_BIT_MASK; 800 801 /* Device type to get for EXT_SC_GET_PORT_SUMMARY */ 802 #define EXT_DEF_GET_KNOWN_DEVICE 0x1 803 #define EXT_DEF_GET_VISIBLE_DEVICE 0x2 804 #define EXT_DEF_GET_HIDDEN_DEVICE 0x4 805 #define EXT_DEF_GET_FABRIC_DEVICE 0x8 806 #define EXT_DEF_GET_LOOP_DEVICE 0x10 807 808 /* Each entry in device database */ 809 typedef struct _EXT_DEVICEDATAENTRY 810 { 811 EXT_SCSI_ADDR TargetAddress; /* scsi address */ 812 UINT32 DeviceFlags; /* Flags for device */ 813 UINT16 LoopID; /* Loop ID */ 814 UINT16 BaseLunNumber; 815 UINT8 NodeWWN[8]; /* Node World Wide Name for device */ 816 UINT8 PortWWN[8]; /* Port World Wide Name for device */ 817 UINT8 PortID[3]; /* Current PortId for device */ 818 UINT8 ControlFlags; /* Control flag */ 819 UINT8 Reserved[132]; 820 } EXT_DEVICEDATAENTRY, *PEXT_DEVICEDATAENTRY; 821 822 #define EXT_DEF_EXTERNAL_LUN_COUNT 2048 823 #define EXT_DEF_EXTERNAL_LUN_BITMASK_BYTES (EXT_DEF_EXTERNAL_LUN_COUNT / 8) 824 825 /* Structure as used in the IOCTL. */ 826 827 typedef struct _EXT_EXTERNAL_LUN_BITMASK_ENTRY 828 { 829 UINT8 NodeName[EXT_DEF_WWN_NAME_SIZE]; 830 UINT8 PortName[EXT_DEF_WWN_NAME_SIZE]; 831 UINT8 Reserved1[16]; /* Pad to 32-byte header */ 832 UINT8 Bitmask[EXT_DEF_EXTERNAL_LUN_BITMASK_BYTES]; 833 } EXT_EXTERNAL_LUN_BITMASK_ENTRY, *PEXT_EXTERNAL_LUN_BITMASK_ENTRY; 834 835 836 /* Structure as it is stored in the NT registry */ 837 838 typedef struct _LUN_BITMASK_LIST 839 { 840 UINT16 Version; /* Should be LUN_BITMASK_REGISTRY_VERSION */ 841 UINT16 EntryCount; /* Count of variable entries following */ 842 UINT8 Reserved[28]; /* Pad to 32-byte header */ 843 844 EXT_EXTERNAL_LUN_BITMASK_ENTRY 845 BitmaskEntry[1]; /* Var-length data */ 846 } EXT_LUN_BITMASK_LIST, *PEXT_LUN_BITMASK_LIST; 847 848 849 /* Device database information */ 850 typedef struct _EXT_DEVICEDATA 851 { 852 UINT32 TotalDevices; /* Set to total number of device */ 853 UINT32 ReturnListEntryCount; /* Set to number of device entries */ 854 /* returned in list. */ 855 856 EXT_DEVICEDATAENTRY EntryList[1]; /* Variable length */ 857 } EXT_DEVICEDATA, *PEXT_DEVICEDATA; 858 859 860 /* Swap Target Device Data structure */ 861 typedef struct _EXT_SWAPTARGETDEVICE 862 { 863 EXT_DEVICEDATAENTRY CurrentExistDevice; 864 EXT_DEVICEDATAENTRY NewDevice; 865 } EXT_SWAPTARGETDEVICE, *PEXT_SWAPTARGETDEVICE; 866 867 #define EXT_DEF_LUN_BITMASK_LIST_MIN_ENTRIES 1 868 #define EXT_DEF_LUN_BITMASK_LIST_MAX_ENTRIES 256 869 870 #ifdef _WIN64 871 #define EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE 32 872 #else 873 #define EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE \ 874 offsetof(LUN_BITMASK_LIST_BUFFER, asBitmaskEntry) 875 #endif 876 877 #define EXT_DEF_LUN_BITMASK_LIST_MIN_SIZE \ 878 (EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE + \ 879 (sizeof (EXT_EXTERNAL_LUN_BITMASK_ENTRY) * \ 880 EXT_DEF_LUN_BITMASK_LIST_MIN_ENTRIES)) 881 #define EXT_DEF_LUN_BITMASK_LIST_MAX_SIZE \ 882 (EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE + \ 883 (sizeof (EXT_EXTERNAL_LUN_BITMASK_ENTRY) * \ 884 EXT_DEF_LUN_BITMASK_LIST_MAX_ENTRIES)) 885 /* 886 * LUN mask bit manipulation macros 887 * 888 * P = Pointer to an EXT_LUN_BIT_MASK union. 889 * L = LUN number. 890 */ 891 #define EXT_IS_LUN_BIT_SET(P, L) \ 892 (((P)->mask[L / 8] & (0x80 >> (L % 8))) ? 1 : 0) 893 894 #define EXT_SET_LUN_BIT(P, L) \ 895 ((P)->mask[L / 8] |= (0x80 >> (L % 8))) 896 897 #define EXT_CLR_LUN_BIT(P, L) \ 898 ((P)->mask[L / 8] &= ~(0x80 >> (L % 8))) 899 900 typedef struct _EXT_PORT_PARAM { 901 EXT_DEST_ADDR FCScsiAddr; 902 UINT16 Mode; 903 UINT16 Speed; 904 } EXT_PORT_PARAM, *PEXT_PORT_PARAM; 905 906 #define EXT_IIDMA_MODE_GET 0 907 #define EXT_IIDMA_MODE_SET 1 908 909 /* 910 * PCI header structure definitions. 911 */ 912 913 typedef struct _PCI_HEADER_T { 914 UINT8 signature[2]; 915 UINT8 reserved[0x16]; 916 UINT8 dataoffset[2]; 917 UINT8 pad[6]; 918 } PCI_HEADER_T, *PPCI_HEADER_T; 919 920 /* 921 * PCI data structure definitions. 922 */ 923 typedef struct _PCI_DATA_T { 924 UINT8 signature[4]; 925 UINT8 vid[2]; 926 UINT8 did[2]; 927 UINT8 reserved0[2]; 928 UINT8 pcidatalen[2]; 929 UINT8 pcidatarev; 930 UINT8 classcode[3]; 931 UINT8 imagelength[2]; /* In sectors */ 932 UINT8 revisionlevel[2]; 933 UINT8 codetype; 934 UINT8 indicator; 935 UINT8 reserved1[2]; 936 UINT8 pad[8]; 937 } PCI_DATA_T, *PPCI_DATA_T; 938 939 /* 940 * Mercury/Menlo 941 */ 942 943 #define MENLO_RESET_FLAG_ENABLE_DIAG_FW 1 944 945 typedef struct _EXT_MENLO_RESET { 946 UINT16 Flags; 947 UINT16 Reserved; 948 } EXT_MENLO_RESET, *PEXT_MENLO_RESET; 949 950 typedef struct _EXT_MENLO_GET_FW_VERSION { 951 UINT32 FwVersion; 952 } EXT_MENLO_GET_FW_VERSION, *PEXT_MENLO_GET_FW_VERSION; 953 954 #define MENLO_UPDATE_FW_FLAG_DIAG_FW 0x0008 /* if flag is cleared then */ 955 /* it must be an fw op */ 956 typedef struct _EXT_MENLO_UPDATE_FW { 957 UINT64 pFwDataBytes; 958 UINT32 TotalByteCount; 959 UINT16 Flags; 960 UINT16 Reserved; 961 } EXT_MENLO_UPDATE_FW, *PEXT_MENLO_UPDATE_FW; 962 963 #define CONFIG_PARAM_ID_RESERVED 1 964 #define CONFIG_PARAM_ID_UIF 2 965 #define CONFIG_PARAM_ID_FCOE_COS 3 966 #define CONFIG_PARAM_ID_PAUSE_TYPE 4 967 #define CONFIG_PARAM_ID_TIMEOUTS 5 968 969 #define INFO_DATA_TYPE_CONFIG_LOG_DATA 1 /* Fetch Config Log Data */ 970 #define INFO_DATA_TYPE_LOG_DATA 2 /* Fetch Log Data */ 971 #define INFO_DATA_TYPE_PORT_STATISTICS 3 /* Fetch Port Statistics */ 972 #define INFO_DATA_TYPE_LIF_STATISTICS 4 /* Fetch LIF Statistics */ 973 #define INFO_DATA_TYPE_ASIC_STATISTICS 5 /* Fetch ASIC Statistics */ 974 #define INFO_DATA_TYPE_CONFIG_PARAMETERS 6 /* Fetch Config Parameters */ 975 #define INFO_DATA_TYPE_PANIC_LOG 7 /* Fetch Panic Log */ 976 977 /* 978 * InfoContext defines for INFO_DATA_TYPE_LOG_DATA 979 */ 980 #define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0 981 #define IC_LOG_DATA_LOG_ID_LEARN_LOG 1 982 #define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2 983 #define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3 984 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4 985 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5 986 #define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6 987 #define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7 988 #define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8 989 #define IC_LOG_DATA_LOG_ID_DCX_LOG 9 990 991 /* 992 * InfoContext defines for INFO_DATA_TYPE_PORT_STATISTICS 993 */ 994 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0 995 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1 996 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2 997 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3 998 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4 999 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5 1000 1001 /* 1002 * InfoContext defines for INFO_DATA_TYPE_LIF_STATISTICS 1003 */ 1004 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0 1005 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1 1006 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2 1007 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3 1008 #define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6 1009 1010 typedef struct _EXT_MENLO_ACCESS_PARAMETERS { 1011 union { 1012 struct { 1013 UINT32 StartingAddr; 1014 UINT32 Reserved2; 1015 UINT32 Reserved3; 1016 } MenloMemory; /* For Read & Write Menlo Memory */ 1017 1018 struct { 1019 UINT32 ConfigParamID; 1020 UINT32 ConfigParamData0; 1021 UINT32 ConfigParamData1; 1022 } MenloConfig; /* For change Configuration */ 1023 1024 struct { 1025 UINT32 InfoDataType; 1026 UINT32 InfoContext; 1027 UINT32 Reserved; 1028 } MenloInfo; /* For fetch Menlo Info */ 1029 } ap; 1030 } EXT_MENLO_ACCESS_PARAMETERS, *PEXT_MENLO_ACCESS_PARAMETERS; 1031 1032 #define INFO_DATA_TYPE_LOG_CONFIG_TBC ((10*7)+1)*4 1033 #define INFO_DATA_TYPE_PORT_STAT_ETH_TBC 0x194 1034 #define INFO_DATA_TYPE_PORT_STAT_FC_TBC 0xC0 1035 #define INFO_DATA_TYPE_LIF_STAT_TBC 0x40 1036 #define INFO_DATA_TYPE_ASIC_STAT_TBC 0x5F8 1037 #define INFO_DATA_TYPE_CONFIG_TBC 0x140 1038 1039 #define MENLO_OP_READ_MEM 0 /* Read Menlo Memory */ 1040 #define MENLO_OP_WRITE_MEM 1 /* Write Menlo Memory */ 1041 #define MENLO_OP_CHANGE_CONFIG 2 /* Change Configuration */ 1042 #define MENLO_OP_GET_INFO 3 /* Fetch Menlo Info (Logs, & */ 1043 /* Statistics, Configuration) */ 1044 1045 typedef struct _EXT_MENLO_MANAGE_INFO { 1046 UINT64 pDataBytes; 1047 EXT_MENLO_ACCESS_PARAMETERS Parameters; 1048 UINT32 TotalByteCount; 1049 UINT16 Operation; 1050 UINT16 Reserved; 1051 } EXT_MENLO_MANAGE_INFO, *PEXT_MENLO_MANAGE_INFO; 1052 1053 #define MENLO_FC_CHECKSUM_FAILURE 0x01 1054 #define MENLO_FC_INVALID_LENGTH 0x02 1055 #define MENLO_FC_INVALID_ADDRESS 0x04 1056 #define MENLO_FC_INVALID_CONFIG_ID_TYPE 0x05 1057 #define MENLO_FC_INVALID_CONFIG_DATA 0x06 1058 #define MENLO_FC_INVALID_INFO_CONTEXT 0x07 1059 1060 typedef struct _EXT_MENLO_MGT { 1061 union { 1062 EXT_MENLO_RESET MenloReset; 1063 EXT_MENLO_GET_FW_VERSION MenloGetFwVer; 1064 EXT_MENLO_UPDATE_FW MenloUpdateFw; 1065 EXT_MENLO_MANAGE_INFO MenloManageInfo; 1066 } sp; 1067 } EXT_MENLO_MGT, *PEXT_MENLO_MGT; 1068 1069 /* 1070 * vport enum definations 1071 */ 1072 typedef enum vport_options { 1073 EXT_VPO_LOGIN_RETRY_ENABLE = 0, 1074 EXT_VPO_PERSISTENT = 1, 1075 EXT_VPO_QOS_BW = 2, 1076 EXT_VPO_VFABRIC_ENABLE = 3 1077 } vport_options_t; 1078 1079 /* 1080 * vport struct definations 1081 */ 1082 #define MAX_DEV_PATH 256 1083 #define MAX_VP_ID 256 1084 #define EXT_OLD_VPORT_ID_CNT_SIZE 260 1085 typedef struct _EXT_VPORT_ID_CNT { 1086 UINT32 VpCnt; 1087 UINT8 VpId[MAX_VP_ID]; 1088 UINT8 vp_path[MAX_VP_ID][MAX_DEV_PATH]; 1089 INT32 VpDrvInst[MAX_VP_ID]; 1090 } EXT_VPORT_ID_CNT, *PEXT_VPORT_ID_CNT; 1091 1092 typedef struct _EXT_VPORT_PARAMS { 1093 UINT32 vp_id; 1094 vport_options_t options; 1095 UINT8 wwpn[EXT_DEF_WWN_NAME_SIZE]; 1096 UINT8 wwnn[EXT_DEF_WWN_NAME_SIZE]; 1097 } EXT_VPORT_PARAMS, *PEXT_VPORT_PARAMS; 1098 1099 typedef struct _EXT_VPORT_INFO { 1100 UINT32 free; 1101 UINT32 used; 1102 UINT32 id; 1103 UINT32 state; 1104 UINT32 bound; 1105 UINT8 wwnn[EXT_DEF_WWN_NAME_SIZE]; 1106 UINT8 wwpn[EXT_DEF_WWN_NAME_SIZE]; 1107 UINT8 reserved[220]; 1108 } EXT_VPORT_INFO, *PEXT_VPORT_INFO; 1109 1110 #define EXT_DEF_FCF_LIST_SIZE 4096 /* Bytes */ 1111 #define FCF_INFO_RETURN_ALL 0 1112 #define FCF_INFO_RETURN_ONE 1 1113 1114 typedef struct _EXT_FCF_INFO { 1115 UINT16 CntrlFlags; /* 2 */ 1116 UINT16 FcfId; /* 2 */ 1117 UINT16 VlanId; /* 2 */ 1118 UINT16 FcfFlags; /* 2 */ 1119 UINT16 FcfAdvertPri; /* 2 */ 1120 UINT16 FcfMacAddr1; /* 2 */ 1121 UINT16 FcfMacAddr2; /* 2 */ 1122 UINT16 FcfMacAddr3; /* 2 */ 1123 UINT16 FcfMapHi; /* 2 */ 1124 UINT16 FcfMapLow; /* 2 */ 1125 UINT8 SwitchName[8]; /* 8 */ 1126 UINT8 FabricName[8]; /* 8 */ 1127 UINT8 Reserved1[8]; /* 8 */ 1128 UINT16 CommFeatures; /* 2 */ 1129 UINT16 Reserved2; /* 2 */ 1130 UINT32 RATovVal; /* 4 */ 1131 UINT32 EDTovVal; /* 4 */ 1132 UINT8 Reserved3[8]; /* 8 */ 1133 } EXT_FCF_INFO, *PEXT_FCF_INFO; 1134 1135 typedef struct _EXT_FCF_LIST { 1136 UINT32 Options; 1137 UINT32 FcfIndex; 1138 UINT32 BufSize; 1139 EXT_FCF_INFO pFcfInfo[1]; 1140 } EXT_FCF_LIST, *PEXT_FCF_LIST; 1141 1142 typedef struct _EXT_RESOURCE_CNTS { 1143 UINT32 OrgTgtXchgCtrlCnt; /* 4 */ 1144 UINT32 CurTgtXchgCtrlCnt; /* 4 */ 1145 UINT32 CurXchgCtrlCnt; /* 4 */ 1146 UINT32 OrgXchgCtrlCnt; /* 4 */ 1147 UINT32 CurIocbBufCnt; /* 4 */ 1148 UINT32 OrgIocbBufCnt; /* 4 */ 1149 UINT32 NoOfSupVPs; /* 4 */ 1150 UINT32 NoOfSupFCFs; /* 4 */ 1151 } EXT_RESOURCE_CNTS, *PEXT_RESOURCE_CNTS; 1152 1153 #ifdef __cplusplus 1154 } 1155 #endif 1156 1157 #endif /* _EXIOCT_H */ 1158