1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 2003-2004 Poul-Henning Kamp
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The names of the authors may not be used to endorse or promote
16 * products derived from this software without specific prior written
17 * permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * This is a device driver or the Adlink 9812 and 9810 ADC cards, mainly
32 * intended to support Software Defined Radio reception of timesignals
33 * in the VLF band. See http://phk.freebsd.dk/loran-c
34 *
35 * The driver is configured with ioctls which define a ringbuffer with
36 * a given number of chunks in it. The a control structure and the
37 * ringbuffer can then be mmap(2)'ed into userland and the application
38 * can operate on the data directly.
39 *
40 * Tested with 10MHz external clock, divisor of 2 (ie: 5MHz sampling),
41 * One channel active (ie: 2 bytes per sample = 10MB/sec) on a 660MHz
42 * Celeron PC.
43 *
44 */
45
46 #ifdef _KERNEL
47
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/malloc.h>
51 #include <sys/kernel.h>
52 #include <sys/module.h>
53 #include <sys/kthread.h>
54 #include <sys/conf.h>
55 #include <sys/bus.h>
56 #include <machine/bus.h>
57 #include <machine/resource.h>
58 #include <sys/rman.h>
59 #include <dev/pci/pcireg.h>
60 #include <dev/pci/pcivar.h>
61 #include <pci_if.h>
62 #include <vm/vm.h>
63 #include <vm/pmap.h>
64
65 #endif /* _KERNEL */
66
67 #include <sys/ioccom.h>
68
69 #define ADLINK_SETDIVISOR _IOWR('A', 255, u_int) /* divisor */
70 #define ADLINK_SETCHUNKSIZE _IOWR('A', 254, u_int) /* bytes */
71 #define ADLINK_SETRINGSIZE _IOWR('A', 253, u_int) /* bytes */
72 #define ADLINK_START _IOWR('A', 252, u_int) /* dummy */
73 #define ADLINK_STOP _IOWR('A', 251, u_int) /* dummy */
74 #define ADLINK_RESET _IOWR('A', 250, u_int) /* dummy */
75
76 struct page0 {
77 u_int version;
78 int state;
79 # define STATE_RESET -1
80 # define STATE_RUN 0
81 u_int divisor; /* int */
82 u_int chunksize; /* bytes */
83 u_int ringsize; /* chunks */
84 u_int o_sample; /*
85 * offset of ring generation
86 * array
87 */
88 u_int o_ring; /* offset of ring */
89 };
90
91 #define PAGE0VERSION 20050219
92
93 #ifdef _KERNEL
94
95 struct pgstat {
96 uint64_t *sample;
97 vm_paddr_t phys;
98 void *virt;
99 struct pgstat *next;
100 };
101
102 struct softc {
103 device_t device;
104 void *intrhand;
105 struct resource *res[3];
106 struct cdev *dev;
107 off_t mapvir;
108 int error;
109 struct page0 *p0;
110 u_int nchunks;
111 struct pgstat *chunks;
112 struct pgstat *next;
113 uint64_t sample;
114 };
115
116 static d_ioctl_t adlink_ioctl;
117 static d_mmap_t adlink_mmap;
118 static int adlink_intr(void *arg);
119
120 static struct cdevsw adlink_cdevsw = {
121 .d_version = D_VERSION,
122 .d_flags = D_NEEDGIANT,
123 .d_ioctl = adlink_ioctl,
124 .d_mmap = adlink_mmap,
125 .d_name = "adlink",
126 };
127
128 static int
adlink_intr(void * arg)129 adlink_intr(void *arg)
130 {
131 struct softc *sc;
132 struct pgstat *pg;
133 uint32_t u;
134
135 sc = arg;
136 u = bus_read_4(sc->res[0], 0x38);
137 if (!(u & 0x00800000))
138 return (FILTER_STRAY);
139 bus_write_4(sc->res[0], 0x38, u | 0x003f4000);
140
141 sc->sample += sc->p0->chunksize / 2;
142 pg = sc->next;
143 *(pg->sample) = sc->sample;
144
145 u = bus_read_4(sc->res[1], 0x18);
146 if (u & 1)
147 sc->p0->state = EIO;
148
149 if (sc->p0->state != STATE_RUN) {
150 printf("adlink: stopping %d\n", sc->p0->state);
151 return (FILTER_STRAY);
152 }
153
154 pg = pg->next;
155 sc->next = pg;
156 *(pg->sample) = 0;
157 bus_write_4(sc->res[0], 0x24, pg->phys);
158 bus_write_4(sc->res[0], 0x28, sc->p0->chunksize);
159 wakeup(sc);
160 return (FILTER_HANDLED);
161 }
162
163 static int
adlink_mmap(struct cdev * dev,vm_ooffset_t offset,vm_paddr_t * paddr,int nprot,vm_memattr_t * memattr)164 adlink_mmap(struct cdev *dev, vm_ooffset_t offset, vm_paddr_t *paddr,
165 int nprot, vm_memattr_t *memattr)
166 {
167 struct softc *sc;
168 vm_offset_t o;
169 int i;
170 struct pgstat *pg;
171
172 sc = dev->si_drv1;
173 if (nprot != VM_PROT_READ)
174 return (-1);
175 if (offset == 0) {
176 *paddr = vtophys(sc->p0);
177 return (0);
178 }
179 o = PAGE_SIZE;
180 pg = sc->chunks;
181 for (i = 0; i < sc->nchunks; i++, pg++) {
182 if (offset - o >= sc->p0->chunksize) {
183 o += sc->p0->chunksize;
184 continue;
185 }
186 *paddr = pg->phys + (offset - o);
187 return (0);
188 }
189 return (-1);
190 }
191
192 static int
adlink_ioctl(struct cdev * dev,u_long cmd,caddr_t data,int fflag,struct thread * td)193 adlink_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, struct thread *td)
194 {
195 struct softc *sc;
196 int i, error;
197 u_int u;
198 struct pgstat *pg;
199 uint64_t *sample;
200
201 sc = dev->si_drv1;
202 u = *(u_int*)data;
203 error = 0;
204 switch (cmd) {
205 case ADLINK_SETDIVISOR:
206 if (sc->p0->state == STATE_RUN)
207 return (EBUSY);
208 if (u & 1)
209 return (EINVAL);
210 sc->p0->divisor = u;
211 break;
212 case ADLINK_SETCHUNKSIZE:
213 if (sc->p0->state != STATE_RESET)
214 return (EBUSY);
215 if (u % PAGE_SIZE)
216 return (EINVAL);
217 if (sc->p0->ringsize != 0 && sc->p0->ringsize % u)
218 return (EINVAL);
219 sc->p0->chunksize = u;
220 break;
221 case ADLINK_SETRINGSIZE:
222 if (sc->p0->state != STATE_RESET)
223 return (EBUSY);
224 if (u % PAGE_SIZE)
225 return (EINVAL);
226 if (sc->p0->chunksize != 0 && u % sc->p0->chunksize)
227 return (EINVAL);
228 sc->p0->ringsize = u;
229 break;
230 case ADLINK_START:
231 if (sc->p0->state == STATE_RUN)
232 return (EBUSY);
233 if (sc->p0->state == STATE_RESET) {
234
235 if (sc->p0->chunksize == 0)
236 sc->p0->chunksize = 4 * PAGE_SIZE;
237 if (sc->p0->ringsize == 0)
238 sc->p0->ringsize = 16 * sc->p0->chunksize;
239 if (sc->p0->divisor == 0)
240 sc->p0->divisor = 4;
241
242 sc->nchunks = sc->p0->ringsize / sc->p0->chunksize;
243 if (sc->nchunks * sizeof (*pg->sample) +
244 sizeof *sc->p0 > PAGE_SIZE)
245 return (EINVAL);
246 sc->p0->o_ring = PAGE_SIZE;
247 sample = (uint64_t *)(sc->p0 + 1);
248 sc->p0->o_sample =
249 (uintptr_t)sample - (uintptr_t)(sc->p0);
250 pg = malloc(sizeof *pg * sc->nchunks,
251 M_DEVBUF, M_WAITOK | M_ZERO);
252 sc->chunks = pg;
253 for (i = 0; i < sc->nchunks; i++) {
254 pg->sample = sample;
255 *pg->sample = 0;
256 sample++;
257 pg->virt = contigmalloc(sc->p0->chunksize,
258 M_DEVBUF, M_WAITOK,
259 0ul, 0xfffffffful,
260 PAGE_SIZE, 0);
261 pg->phys = vtophys(pg->virt);
262 if (i == sc->nchunks - 1)
263 pg->next = sc->chunks;
264 else
265 pg->next = pg + 1;
266 pg++;
267 }
268 sc->next = sc->chunks;
269 }
270
271 /* Reset generation numbers */
272 pg = sc->chunks;
273 for (i = 0; i < sc->nchunks; i++) {
274 *pg->sample = 0;
275 pg++;
276 }
277
278 /* Enable interrupts on write complete */
279 bus_write_4(sc->res[0], 0x38, 0x00004000);
280
281 /* Sample CH0 only */
282 bus_write_4(sc->res[1], 0x00, 1);
283
284 /* Divide clock by four */
285 bus_write_4(sc->res[1], 0x04, sc->p0->divisor);
286
287 /* Software trigger mode: software */
288 bus_write_4(sc->res[1], 0x08, 0);
289
290 /* Trigger level zero */
291 bus_write_4(sc->res[1], 0x0c, 0);
292
293 /* Trigger source CH0 (not used) */
294 bus_write_4(sc->res[1], 0x10, 0);
295
296 /* Fifo control/status: flush */
297 bus_write_4(sc->res[1], 0x18, 3);
298
299 /* Clock source: external sine */
300 bus_write_4(sc->res[1], 0x20, 2);
301
302 /* Chipmunks are go! */
303 sc->p0->state = STATE_RUN;
304
305 /* Set up Write DMA */
306 pg = sc->next = sc->chunks;
307 *(pg->sample) = 0;
308 bus_write_4(sc->res[0], 0x24, pg->phys);
309 bus_write_4(sc->res[0], 0x28, sc->p0->chunksize);
310 u = bus_read_4(sc->res[0], 0x3c);
311 bus_write_4(sc->res[0], 0x3c, u | 0x00000600);
312
313 /* Acquisition Enable Register: go! */
314 bus_write_4(sc->res[1], 0x1c, 1);
315
316 break;
317 case ADLINK_STOP:
318 if (sc->p0->state == STATE_RESET)
319 break;
320 sc->p0->state = EINTR;
321 while (*(sc->next->sample) == 0)
322 tsleep(sc, PUSER | PCATCH, "adstop", 1);
323 break;
324 #ifdef notyet
325 /*
326 * I'm not sure we can actually do this. How do we revoke
327 * the mmap'ed pages from any process having them mmapped ?
328 */
329 case ADLINK_RESET:
330 if (sc->p0->state == STATE_RESET)
331 break;
332 sc->p0->state = EINTR;
333 while (*(sc->next->samp) == 0)
334 tsleep(sc, PUSER | PCATCH, "adreset", 1);
335 /* deallocate ring buffer */
336 break;
337 #endif
338 default:
339 error = ENOIOCTL;
340 break;
341 }
342 return (error);
343 }
344
345 struct pci_id
346 {
347 uint16_t vendor;
348 uint16_t device;
349 const char *desc;
350 } adlink_id[] = {
351 { .vendor = 0x10e8, .device = 0x80da,
352 .desc ="Adlink PCI-9812 4 ch 12 bit 20 msps" }
353 };
354
355 static int
adlink_probe(device_t self)356 adlink_probe(device_t self)
357 {
358 int i;
359 uint16_t vendor, device;
360
361 vendor = pci_get_vendor(self);
362 device = pci_get_device(self);
363 for (i = 0; i < nitems(adlink_id); i++) {
364 if (adlink_id[i].vendor == vendor &&
365 adlink_id[i].device == device) {
366 device_set_desc(self, adlink_id[i].desc);
367 return (BUS_PROBE_DEFAULT);
368 }
369 }
370 return (ENXIO);
371 }
372
373 static struct resource_spec adlink_res_spec[] = {
374 { SYS_RES_IOPORT, PCIR_BAR(0), RF_ACTIVE},
375 { SYS_RES_IOPORT, PCIR_BAR(1), RF_ACTIVE},
376 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE},
377 { -1, 0, 0 }
378 };
379
380 static int
adlink_attach(device_t self)381 adlink_attach(device_t self)
382 {
383 struct softc *sc;
384 int i, error;
385
386 sc = device_get_softc(self);
387 bzero(sc, sizeof *sc);
388 sc->device = self;
389
390 error = bus_alloc_resources(self, adlink_res_spec, sc->res);
391 if (error)
392 return (error);
393
394 i = bus_setup_intr(self, sc->res[2], INTR_TYPE_MISC,
395 adlink_intr, NULL, sc, &sc->intrhand);
396 if (i) {
397 printf("adlink: Couldn't get FAST intr\n");
398 i = bus_setup_intr(self, sc->res[2],
399 INTR_MPSAFE | INTR_TYPE_MISC,
400 NULL, (driver_intr_t *)adlink_intr, sc, &sc->intrhand);
401 }
402
403 if (i) {
404 bus_release_resources(self, adlink_res_spec, sc->res);
405 return (ENODEV);
406 }
407
408 sc->p0 = malloc(PAGE_SIZE, M_DEVBUF, M_WAITOK | M_ZERO);
409 sc->p0->version = PAGE0VERSION;
410 sc->p0->state = STATE_RESET;
411
412 sc->dev = make_dev(&adlink_cdevsw, device_get_unit(self),
413 UID_ROOT, GID_WHEEL, 0444, "adlink%d", device_get_unit(self));
414 sc->dev->si_drv1 = sc;
415
416 return (0);
417 }
418
419 static device_method_t adlink_methods[] = {
420 /* Device interface */
421 DEVMETHOD(device_probe, adlink_probe),
422 DEVMETHOD(device_attach, adlink_attach),
423 DEVMETHOD(device_suspend, bus_generic_suspend),
424 DEVMETHOD(device_resume, bus_generic_resume),
425 DEVMETHOD(device_shutdown, bus_generic_shutdown),
426
427 DEVMETHOD_END
428 };
429
430 static driver_t adlink_driver = {
431 "adlink",
432 adlink_methods,
433 sizeof(struct softc)
434 };
435
436 DRIVER_MODULE(adlink, pci, adlink_driver, 0, 0);
437 MODULE_PNP_INFO("U16:vendor;U16:device;D:#", pci, adlink, adlink_id,
438 nitems(adlink_id));
439 #endif /* _KERNEL */
440