| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterScavenging.cpp | 381 Register SReg = RS.scavengeRegisterBackwards(RC, DefMI.getIterator(), in scavengeVReg() local
420 Register SReg = scavengeVReg(MRI, RS, Reg, true); in scavengeFrameVirtualRegsInBlock() local
445 Register SReg = scavengeVReg(MRI, RS, Reg, false); in scavengeFrameVirtualRegsInBlock() local
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| H A D | LivePhysRegs.cpp | 268 if (any_of(TRI.superregs(Reg), [&](MCPhysReg SReg) { in addLiveIns()
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| H A D | PrologEpilogInserter.cpp | 1299 for (MCPhysReg SReg : TRI.sub_and_superregs_inclusive(Reg)) in insertZeroCallUsedRegs() local
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| H A D | BranchFolding.cpp | 889 if (any_of(TRI->superregs(Reg), [&](MCPhysReg SReg) { in mergeCommonTails()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 144 unsigned A15SDOptimizer::getDPRLaneFromSPR(unsigned SReg) { in getDPRLaneFromSPR()
154 unsigned A15SDOptimizer::getPrefSPRLane(unsigned SReg) { in getPrefSPRLane()
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| H A D | ARMBaseInstrInfo.cpp | 4919 unsigned SReg, unsigned &Lane) { in getCorrespondingDRegAndLane()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | VirtRegMap.h | 139 void setIsSplitFromReg(Register virtReg, Register SReg) { in setIsSplitFromReg()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Frontend/HLSL/ |
| H A D | HLSLRootSignature.h | 31 enum class RegisterType { BReg, TReg, UReg, SReg }; enumerator
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIPreEmitPeephole.cpp | 130 Register SReg; in optimizeVccBranch() local
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| H A D | SIShrinkInstructions.cpp | 1031 Register SReg = Src2->getReg(); in run() local
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| H A D | SIInstrInfo.cpp | 1200 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
1213 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
1227 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
1243 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
1257 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
1269 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
1287 Register SReg = MRI.createVirtualRegister(BoolXExecRC); in insertVectorSelect() local
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| H A D | SIISelLowering.cpp | 16758 Register SReg = ST.isWave32() in finalizeLowering() local
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| /freebsd/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| H A D | MemRegion.h | 1068 ParamVarRegion(const Expr *OE, unsigned Idx, const MemRegion *SReg) in ParamVarRegion()
1345 const SubRegion *SReg) in CXXBaseObjectRegion()
1383 CXXDerivedObjectRegion(const CXXRecordDecl *DerivedD, const SubRegion *SReg) in CXXDerivedObjectRegion()
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| /freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
| H A D | MemRegion.cpp | 329 unsigned Idx, const MemRegion *SReg) { in ProfileRegion()
431 const MemRegion *SReg) { in ProfileRegion()
443 const MemRegion *SReg) { in ProfileRegion()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonLoadStoreWidening.cpp | 610 MachineOperand SReg = SecondSt->getOperand(2); in createWideStores() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.cpp | 366 Register SReg = in ExpandMOVI() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4874 MCRegister SReg = Inst.getOperand(1).getReg(); in expandRotation() local
4937 MCRegister SReg = Inst.getOperand(1).getReg(); in expandRotationImm() local
4999 MCRegister SReg = Inst.getOperand(1).getReg(); in expandDRotation() local
5062 MCRegister SReg = Inst.getOperand(1).getReg(); in expandDRotationImm() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.cpp | 1848 Register SRegHi, SReg, VSReg; in eliminateFrameIndex() local
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| H A D | PPCISelLowering.cpp | 13195 Register SReg = RegInfo.createVirtualRegister(GPRC); in EmitPartwordAtomicBinary() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstructionSelector.cpp | 1035 for (Register SReg : Srcs) { in selectOpWithSrcs() local
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