| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1667 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegImmOperand() local
1705 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegRegOperand() local
2049 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode2IdxInstruction() local
2154 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeSORegMemOperand() local
2212 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeAddrMode3Instruction() local
2433 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeQADDInstruction() local
2743 unsigned Rm = fieldFromInstruction(Insn, 8, 4); in DecodeSMLAInstruction() local
2772 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeTSTInstruction() local
2947 unsigned Rm = fieldFromInstruction(Val, 0, 4); in DecodeAddrMode6Operand() local
2970 unsigned Rm = fieldFromInstruction(Insn, 0, 4); in DecodeVLDInstruction() local
[all …]
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
| H A D | EmulateInstructionARM.cpp | 1288 uint32_t Rm; // the source register in EmulateMOVRdRm() local
1680 uint32_t Rm; // the source register in EmulateMVNReg() local
1965 uint32_t Rm; // the second operand in EmulateADDSPRm() local
2129 uint32_t Rm; // the register with the target address in EmulateBLXRm() local
2181 uint32_t Rm; // the register with the target address in EmulateBXRm() local
2235 uint32_t Rm; // the register with the target address in EmulateBXJRm() local
2953 uint32_t Rm; // the index register which contains an integer pointing to a in EmulateTB() local
3218 uint32_t Rd, Rn, Rm; in EmulateADDReg() local
3349 uint32_t Rm; // the second operand in EmulateCMNReg() local
3466 uint32_t Rm; // the second operand in EmulateCMPReg() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 606 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeThreeAddrSRegInstruction() local
1258 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeAddSubERegInstruction() local
1720 unsigned Rm = fieldFromInstruction(insn, 16, 5); in DecodeSETMemOpInstruction() local
1758 uint64_t Rm = fieldFromInstruction(insn, 16, 5); in DecodePRFMRegInstruction() local
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| /freebsd/sys/arm64/arm64/ |
| H A D | undefined.c | 187 int attempts, error, Rn, Rd, Rm; in swp_emulate() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3509 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3516 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3546 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3558 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3577 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3597 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3605 Register Rm = MI.getOperand(3).getReg(); in getNumMicroOpsSwiftLdSt() local
3623 Register Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
3637 Register Rm = MI.getOperand(4).getReg(); in getNumMicroOpsSwiftLdSt() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 934 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); getThumbAddrModeRegRegOpValue() local
1288 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); getLdStSORegOpValue() local
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 848 unsigned Rm = MI->getOperand(2).getReg(); printRangePrefetchAlias() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 954 int Rn = 0, Rm = 0; buildHvxVectorReg() local
|