Searched defs:RegisterVT (Results 1 – 12 of 12) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyMachineFunctionInfo.cpp | 50 MVT RegisterVT = TLI.getRegisterType(Ctx, VT); in computeLegalValueVTs() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FunctionLoweringInfo.cpp | 393 MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT); in CreateRegs() local
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| H A D | SelectionDAGBuilder.cpp | 353 MVT RegisterVT; in getCopyFromPartsVector() local
758 MVT RegisterVT; in getCopyToPartsVector() local
862 MVT RegisterVT = in RegsForValue() local
891 MVT RegisterVT = isABIMangled() in getCopyFromRegs() local
973 MVT RegisterVT = isABIMangled() in getCopyToRegs() local
1058 MVT RegisterVT = RegVTs[Value]; in AddInlineAsmOperands() local
1075 MVT RegisterVT = std::get<1>(CountAndVT); in getRegsAndSizes() local
10977 MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT); in LowerCallTo() local
11043 MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(), in LowerCallTo() local
11320 MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(), in LowerCallTo() local
[all …]
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| H A D | FastISel.cpp | 1012 MVT RegisterVT = TLI.getRegisterType(CLI.RetTy->getContext(), VT); in lowerCallTo() local
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| H A D | SelectionDAG.cpp | 2715 MVT RegisterVT; in getReducedAlign() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 457 std::optional<MVT> RegisterVT) const override { in getNumRegisters()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1164 MVT &RegisterVT, in getVectorTypeBreakdownMVT()
1550 MVT RegisterVT; in computeRegisterProperties() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 110 MVT RegisterVT; in getRegisterTypeForCallingConv() local
146 MVT RegisterVT; in getNumRegistersForCallingConv() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1208 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
1775 MVT RegisterVT; in getRegisterType() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 3317 std::optional<MVT> RegisterVT = std::nullopt) const { in getNumRegisters()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1254 MVT RegisterVT = getRegisterTypeForCallingConv(Ctx, CC, ArgVT); in analyzeFormalArgumentsCompute() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 30476 MVT RegisterVT; in getRegisterTypeForCallingConv() local
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