| /freebsd/contrib/llvm-project/lldb/include/lldb/Target/ |
| H A D | DynamicRegisterInfo.h | 28 struct Register { struct
60 size_t SetRegisterInfo(std::vector<Register> &®s, argument
44 flags_typeRegister global() argument
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfExpression.h | 47 struct Register { struct
53 static Register createRegister(int64_t RegNo, const char *Comment) { in createRegister() argument
58 static Register createSubRegister(int64_t RegNo, unsigned SizeInBits, in createSubRegister() argument
63 bool isSubRegister() const { return SubRegSize; } in isSubRegister() argument
82 enum { Unknown = 0, Register, Memory, Implicit }; enumerator
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| /freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/Orc/ |
| H A D | UnwindInfoRegistrationPlugin.h | 24 UnwindInfoRegistrationPlugin(ExecutionSession &ES, ExecutorAddr Register, in UnwindInfoRegistrationPlugin()
60 ExecutorAddr Register, Deregister; variable
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| /freebsd/sys/dev/acpica/Osd/ |
| H A D | OsdHardware.c | 112 AcpiOsReadPciConfiguration(ACPI_PCI_ID *PciId, UINT32 Register, UINT64 *Value, in AcpiOsReadPciConfiguration()
134 AcpiOsWritePciConfiguration (ACPI_PCI_ID *PciId, UINT32 Register, in AcpiOsWritePciConfiguration()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 544 unsigned Register = in getSingleInstruction() local
776 unsigned Register = CtrlRegDecoderTable[RegNo]; in DecodeCtrRegsRegisterClass() local
804 unsigned Register = CtrlReg64DecoderTable[RegNo]; in DecodeCtrRegs64RegisterClass() local
812 unsigned Register = 0; in DecodeModRegsRegisterClass() local
902 unsigned Register = SysRegDecoderTable[RegNo]; in DecodeSysRegsRegisterClass() local
930 unsigned Register = SysReg64DecoderTable[RegNo]; in DecodeSysRegs64RegisterClass() local
956 unsigned Register = GuestRegDecoderTable[RegNo]; in DecodeGuestRegsRegisterClass() local
983 unsigned Register = GuestReg64DecoderTable[RegNo]; in DecodeGuestRegs64RegisterClass() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCChecker.cpp | 534 MCRegister Register = Operand.getReg(); in checkRegistersReadOnly() local
545 bool HexagonMCChecker::registerUsed(MCRegister Register) { in registerUsed()
559 MCRegister Register, HexagonMCInstrInfo::PredicateInfo ConsumerPredicate) { in registerProducer()
737 void HexagonMCChecker::compoundRegisterMap(unsigned &Register) { in compoundRegisterMap()
768 void HexagonMCChecker::reportErrorRegisters(unsigned Register) { in reportErrorRegisters()
773 void HexagonMCChecker::reportErrorNewValue(unsigned Register) { in reportErrorNewValue()
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| H A D | HexagonMCInstrInfo.h | 337 PredicateInfo(MCRegister Register, unsigned Operand, bool PredicatedTrue) in PredicateInfo()
340 MCRegister Register; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 184 unsigned Register = (Insn >> 18) & 0x1f; in decodeRiMemoryValue() local
197 unsigned Register = (Insn >> 15) & 0x1f; in decodeRrMemoryValue() local
210 unsigned Register = (Insn >> 12) & 0x1f; in decodeSplsValue() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Frontend/HLSL/ |
| H A D | HLSLRootSignature.h | 32 struct Register { struct
33 RegisterType ViewType; argument
40 Register Reg; argument
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineSSAContext.h | 25 class Register; variable
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| H A D | LiveRangeEdit.h | 56 virtual bool LRE_CanEraseVirtReg(Register) { return true; } in LRE_CanEraseVirtReg() argument
59 virtual void LRE_WillShrinkVirtReg(Register) {} in LRE_WillShrinkVirtReg() argument
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| H A D | DetectDeadLanes.h | 41 class Register; variable
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| H A D | Register.h | 24 constexpr Register(MCRegister Val) : Reg(Val.id()) {} in Register() function
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| H A D | DebugHandlerBase.h | 33 MCRegister Register; member
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 223 struct Register { struct
225 Register(llvm::Register R, unsigned S) : Reg(R), Sub(S) {} in Register() argument
226 Register(const MachineOperand &Op) in Register() argument
228 Register &operator=(const MachineOperand &Op) { in operator =()
237 bool isVReg() const { in isVReg()
240 bool isSlot() const { return Reg != 0 && Reg.isStack(); } in isSlot()
241 operator MachineOperand() const { in operator MachineOperand()
252 bool operator==(Register R) const { return Reg == R.Reg && Sub == R.Sub; } in operator ==()
253 bool operator!=(Register R) const { return !operator==(R); } in operator !=()
254 bool operator<(Register R) const { in operator <()
[all …]
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| /freebsd/sys/contrib/edk2/Include/Protocol/ |
| H A D | RamDisk.h | 91 EFI_RAM_DISK_REGISTER_RAMDISK Register; member
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MachineLocation.h | 25 unsigned Register = 0; ///< gcc/gdb register number. variable
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| H A D | DXContainerPSVInfo.h | 95 uint32_t Register; member
106 dxbc::SigComponentType CompType, uint32_t Register, in addParam()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | InlineAsmLowering.h | 24 class Register; variable
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCAsmStreamer.cpp | 1941 void MCAsmStreamer::EmitRegisterName(int64_t Register) { in EmitRegisterName()
1956 void MCAsmStreamer::emitCFIDefCfa(int64_t Register, int64_t Offset, SMLoc Loc) { in emitCFIDefCfa()
1970 void MCAsmStreamer::emitCFILLVMDefAspaceCfa(int64_t Register, int64_t Offset, in emitCFILLVMDefAspaceCfa()
2006 void MCAsmStreamer::emitCFIDefCfaRegister(int64_t Register, SMLoc Loc) { in emitCFIDefCfaRegister()
2013 void MCAsmStreamer::emitCFIOffset(int64_t Register, int64_t Offset, SMLoc Loc) { in emitCFIOffset()
2048 void MCAsmStreamer::emitCFIRestore(int64_t Register, SMLoc Loc) { in emitCFIRestore()
2055 void MCAsmStreamer::emitCFISameValue(int64_t Register, SMLoc Loc) { in emitCFISameValue()
2062 void MCAsmStreamer::emitCFIRelOffset(int64_t Register, int64_t Offset, in emitCFIRelOffset()
2083 void MCAsmStreamer::emitCFIUndefined(int64_t Register, SMLoc Loc) { in emitCFIUndefined()
2118 void MCAsmStreamer::emitCFIReturnColumn(int64_t Register) { in emitCFIReturnColumn()
[all …]
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| H A D | MCStreamer.cpp | 482 void MCStreamer::emitCFIDefCfa(int64_t Register, int64_t Offset, SMLoc Loc) { in emitCFIDefCfa()
513 void MCStreamer::emitCFIDefCfaRegister(int64_t Register, SMLoc Loc) { in emitCFIDefCfaRegister()
524 void MCStreamer::emitCFILLVMDefAspaceCfa(int64_t Register, int64_t Offset, in emitCFILLVMDefAspaceCfa()
536 void MCStreamer::emitCFIOffset(int64_t Register, int64_t Offset, SMLoc Loc) { in emitCFIOffset()
546 void MCStreamer::emitCFIRelOffset(int64_t Register, int64_t Offset, SMLoc Loc) { in emitCFIRelOffset()
594 void MCStreamer::emitCFISameValue(int64_t Register, SMLoc Loc) { in emitCFISameValue()
604 void MCStreamer::emitCFIRestore(int64_t Register, SMLoc Loc) { in emitCFIRestore()
641 void MCStreamer::emitCFIUndefined(int64_t Register, SMLoc Loc) { in emitCFIUndefined()
691 void MCStreamer::emitCFIReturnColumn(int64_t Register) { in emitCFIReturnColumn()
705 void MCStreamer::emitCFIValOffset(int64_t Register, int64_t Offset, SMLoc Loc) { in emitCFIValOffset()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PreLegalizerCombiner.cpp | 234 bool matchExtAddvToUdotAddv(MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtAddvToUdotAddv() argument
236 std::tuple<Register, Register, bool> &MatchInfo) { in matchExtAddvToUdotAddv()
291 void applyExtAddvToUdotAddv(MachineInstr &MI, MachineRegisterInfo &MRI, in applyExtAddvToUdotAddv() argument
295 std::tuple<Register, Register, bool> &MatchInfo) { in applyExtAddvToUdotAddv()
417 std::pair<Register, bool> &MatchInfo) { in matchExtUaddvToUaddlv()
450 std::pair<Register, bool> &MatchInfo) { in applyExtUaddvToUaddlv()
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| H A D | AArch64PostLegalizerCombiner.cpp | 345 bool matchOrToBSP(MachineInstr &MI, MachineRegisterInfo &MRI, in matchOrToBSP() argument
346 std::tuple<Register, Register, Register> &MatchInfo) { in matchOrToBSP()
376 void applyOrToBSP(MachineInstr &MI, MachineRegisterInfo &MRI, in applyOrToBSP() argument
378 std::tuple<Register, Register, Register> &MatchInfo) { in applyOrToBSP()
442 bool matchExtMulToMULL(MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtMulToMULL() argument
531 void applyExtMulToMULL(MachineInstr &MI, MachineRegisterInfo &MRI, in applyExtMulToMULL() argument
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TailDuplicator.cpp | 357 DenseMap<Register, RegSubRegPair> &LocalVRMap, in processPHI()
358 SmallVectorImpl<std::pair<Register, RegSubRegPair>> &Copies, in processPHI()
391 DenseMap<Register, RegSubRegPair> &LocalVRMap, in duplicateInstruction()
1075 SmallVectorImpl<std::pair<Register, RegSubRegPair>> &CopyInfos, in appendCopies()
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| H A D | PeepholeOptimizer.cpp | 1362 MachineInstr &MI, SmallSet<Register, 16> &FoldAsLoadDefCandidates) { in isLoadFoldable()
1382 MachineInstr &MI, SmallSet<Register, 4> &ImmDefRegs, in isMoveImmediate()
1383 DenseMap<Register, MachineInstr *> &ImmDefMIs) { in isMoveImmediate()
1404 MachineInstr &MI, SmallSet<Register, 4> &ImmDefRegs, in foldImmediate()
1405 DenseMap<Register, MachineInstr *> &ImmDefMIs, bool &Deleted) { in foldImmediate()
1495 MachineInstr &MI, DenseMap<Register, MachineInstr *> &NAPhysToVirtMIs) { in foldRedundantNAPhysCopy()
1548 Register Reg, const SmallSet<Register, 2> &TargetRegs, in findTargetRecurrence()
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