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Searched defs:RegOpnd (Results 1 – 4 of 4) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp587 unsigned RegVal = Ctx.getRegisterInfo()->getEncodingValue(RegOpnd); in encodeMatrixIndexGPR32() local
541 auto RegOpnd = MI.getOperand(OpIdx).getReg(); EncodeRegAsMultipleOf() local
550 auto RegOpnd = MI.getOperand(OpIdx).getReg(); EncodePPR_p8to15() local
557 auto RegOpnd = MI.getOperand(OpIdx).getReg(); EncodeZPR2StridedRegisterClass() local
567 auto RegOpnd = MI.getOperand(OpIdx).getReg(); EncodeZPR4StridedRegisterClass() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp818 SDNode *RegOpnd; in trySelect() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp7708 MipsOperand &RegOpnd = static_cast<MipsOperand &>(*Reg[0]); in parseDirectiveCpAdd() local
7741 MipsOperand &RegOpnd = static_cast<MipsOperand &>(*Reg[0]); in parseDirectiveCpLoad() local
7770 MipsOperand &RegOpnd = static_cast<MipsOperand &>(*Reg[0]); in parseDirectiveCpLocal() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp9291 TargetInstrInfo::RegSubRegPair getRegOrUndef(const MachineOperand &RegOpnd) { in getRegOrUndef()