Searched defs:RegA (Results 1 – 11 of 11) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86DynAllocaExpander.cpp | 224 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower() local
238 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower() local
251 unsigned RegA = Is64BitAlloca ? X86::RAX : X86::EAX; in lower() local
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| H A D | X86RegisterInfo.cpp | 674 auto IsSubReg = [&](MCRegister RegA, MCRegister RegB) { in isArgumentRegister()
681 [&](MCRegister &RegA) { return IsSubReg(RegA, Reg); }) || in isArgumentRegister()
691 [&](MCRegister &RegA) { return IsSubReg(RegA, Reg); })) in isArgumentRegister()
696 [&](MCRegister &RegA) { return IsSubReg(RegA, Reg); })) in isArgumentRegister()
703 [&](MCRegister &RegA) { return IsSubReg(RegA, Reg); })) in isArgumentRegister()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 468 bool isSubRegister(MCRegister RegA, MCRegister RegB) const { in isSubRegister()
476 bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSubRegisterEq()
482 bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperRegisterEq()
488 bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperOrSubRegisterEq()
610 inline bool MCRegisterInfo::isSuperRegister(MCRegister RegA, MCRegister RegB) const{ in isSuperRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 544 bool TwoAddressInstructionImpl::regsAreCompatible(Register RegA, in regsAreCompatible()
633 bool TwoAddressInstructionImpl::isProfitableToCommute(Register RegA, in isProfitableToCommute()
760 Register RegA = MI->getOperand(DstIdx).getReg(); in commuteInstruction() local
769 bool TwoAddressInstructionImpl::isProfitableToConv3Addr(Register RegA, in isProfitableToConv3Addr()
788 Register RegA, Register RegB, unsigned &Dist) { in convertInstTo3Addr()
1571 Register RegA = DstMO.getReg(); in processTiedPairs() local
1756 Register RegA = DstMO.getReg(); in processStatepoint() local
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| H A D | ImplicitNullChecks.cpp | 286 Register RegA = MOA.getReg(); in canReorder() local
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| H A D | TargetInstrInfo.cpp | 1099 Register RegA = OpA.getReg(); in reassociateOps() local
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 207 bool MCRegisterInfo::regsOverlap(MCRegister RegA, MCRegister RegB) const { in regsOverlap()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 449 bool regsOverlap(Register RegA, Register RegB) const { in regsOverlap()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 2224 for (auto &RegA : DefsA) in isDependent() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 510 Register RegA = Prev->getOperand(AddOpIdx).getReg(); in getFMAPatterns() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 6938 Register RegA = Root.getOperand(1).getReg(); in genSubAdd2SubSub() local
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