| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MicroMipsSizeReduction.cpp | 378 static bool ConsecutiveRegisters(unsigned Reg1, unsigned Reg2) { in ConsecutiveRegisters()
407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() local
479 Register Reg2 = MI2->getOperand(1).getReg(); in ReduceXWtoXWP() local
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| H A D | MipsAsmPrinter.cpp | 841 unsigned Reg2) { in EmitInstrRegReg()
861 unsigned Reg2, unsigned Reg3) { in EmitInstrRegRegReg()
872 unsigned Reg2, unsigned FPReg1, in EmitMovFPIntPair()
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| H A D | MipsISelLowering.cpp | 2994 unsigned Reg2 = State.AllocateReg(IntRegs); in CC_MipsO32() local
3727 unsigned Reg2 = in LowerFormalArguments() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64LowerHomogeneousPrologEpilog.cpp | 205 const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, in emitStore()
246 const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, in emitLoad()
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| H A D | AArch64FrameLowering.cpp | 2863 static bool invalidateWindowsRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateWindowsRegisterPairing()
2894 static bool invalidateRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateRegisterPairing()
2914 unsigned Reg2 = AArch64::NoRegister; member
3186 unsigned Reg2 = RPI.Reg2; in spillCalleeSavedRegisters() local
3429 unsigned Reg2 = RPI.Reg2; in restoreCalleeSavedRegisters() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXFMAMutate.cpp | 190 Register Reg2 = MI.getOperand(2).getReg(); in processBlock() local
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| H A D | PPCVSXSwapRemoval.cpp | 899 Register Reg2 = MI->getOperand(2).getReg(); in handleSpecialSwappables() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrBuilder.h | 166 unsigned Reg2, bool isKill2) { in addRegReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.cpp | 280 unsigned Reg2 = getRegisterSeqOpValue() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 758 Register Reg2 = MI->getOperand(2).getReg(); in ReduceTo2Addr() local
793 Register Reg2 = MI->getOperand(2).getReg(); in ReduceTo2Addr() local
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| H A D | A15SDOptimizer.cpp | 446 const DebugLoc &DL, unsigned Reg1, unsigned Reg2) { in createRegSequence()
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| H A D | ARMFastISel.cpp | 2800 unsigned Reg2 = 0; in SelectShift() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 990 bool &HaveReg2, Register &Reg2, in parseAddress()
1102 Register Reg1, Reg2; in parseAddress() local
1495 Register Reg1, Reg2; in parseOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AsmBackend.cpp | 683 unsigned Reg2 = *MRI.getLLVMRegNum(Inst2.getRegister(), true); in generateCompactUnwindEncoding() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 83 bool contains(MCRegister Reg1, MCRegister Reg2) const { in contains()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | AggressiveAntiDepBreaker.cpp | 89 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) { in UnionGroups()
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| H A D | MachineInstr.cpp | 2531 Register Reg2 = getOperand(2).getReg(); in getFirst3RegLLTs() local
2541 Register Reg2 = getOperand(2).getReg(); in getFirst4RegLLTs() local
2553 Register Reg2 = getOperand(2).getReg(); in getFirst5RegLLTs() local
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| H A D | TargetInstrInfo.cpp | 187 Register Reg2 = MI.getOperand(Idx2).getReg(); in commuteInstructionImpl() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 227 unsigned Reg2, SMLoc IDLoc, in emitRRR()
233 unsigned Reg2, MCOperand Op3, SMLoc IDLoc, in emitRRRX()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1815 StringRef Reg2(R2); in processInstruction() local
1959 StringRef Reg2(R2); in processInstruction() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 104 bool contains(Register Reg1, Register Reg2) const { in contains()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 1466 MCRegister Reg2; in parseOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCDwarf.cpp | 1335 unsigned Reg2 = Instr.getRegister2(); in emitCFIInstruction() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 391 MCRegister Reg2; member
2537 MCRegister Reg2 = matchRegisterNameHelper(Reg2Name); in parseRegReg() local
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenRegisters.cpp | 1526 CodeGenRegister *Reg2 = I1.second; in computeComposites() local
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