Home
last modified time | relevance | path

Searched defs:Reg1 (Results 1 – 25 of 46) sorted by relevance

12

/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp199 void MipsTargetStreamer::emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRR()
214 void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRX()
226 void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRR()
232 void MipsTargetStreamer::emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRRX()
245 void MipsTargetStreamer::emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRI()
252 unsigned Reg1, int16_t Imm0, int16_t Imm1, in emitRRIII()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsSizeReduction.cpp378 static bool ConsecutiveRegisters(unsigned Reg1, unsigned Reg2) { in ConsecutiveRegisters()
406 Register Reg1 = MI1->getOperand(0).getReg(); in ConsecutiveInstr() local
478 Register Reg1 = MI1->getOperand(1).getReg(); in ReduceXWtoXWP() local
H A DMipsAsmPrinter.cpp840 unsigned Opcode, unsigned Reg1, in EmitInstrRegReg()
860 unsigned Opcode, unsigned Reg1, in EmitInstrRegRegReg()
871 unsigned MovOpc, unsigned Reg1, in EmitMovFPIntPair()
H A DMipsSEFrameLowering.cpp463 unsigned Reg1 = in emitPrologue() local
480 unsigned Reg1 = MRI->getDwarfRegNum(Reg, true) + 1; in emitPrologue() local
H A DMips16InstrInfo.cpp278 unsigned Reg1, unsigned Reg2) const { in adjustStackPtrBig()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CompressEVEX.cpp198 Register Reg1 = Op1.getReg(); in CompressEVEXImpl() local
H A DX86ExpandPseudo.cpp468 Register Reg1 = TRI->getSubReg(Reg, X86::sub_mask_1); in expandMI() local
504 Register Reg1 = TRI->getSubReg(Reg, X86::sub_mask_1); in expandMI() local
H A DX86InstrBuilder.h165 unsigned Reg1, bool isKill1, in addRegReg()
H A DX86AvoidStoreForwardingBlocks.cpp391 Register Reg1 = MRI->createVirtualRegister( in buildCopy() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64LowerHomogeneousPrologEpilog.cpp205 const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, in emitStore()
246 const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, in emitLoad()
H A DAArch64FrameLowering.cpp1247 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg()); in InsertSEH() local
1260 Register Reg1 = MBBI->getOperand(2).getReg(); in InsertSEH() local
1298 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); in InsertSEH() local
1309 Register Reg1 = MBBI->getOperand(1).getReg(); in InsertSEH() local
1343 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); in InsertSEH() local
1356 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg()); in InsertSEH() local
2863 static bool invalidateWindowsRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateWindowsRegisterPairing()
2894 static bool invalidateRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateRegisterPairing()
2913 unsigned Reg1 = AArch64::NoRegister; member
3185 unsigned Reg1 = RPI.Reg1; in spillCalleeSavedRegisters() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVLegalizerInfo.cpp347 Register Reg1 = Op1.getReg(); in legalizeCustom() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrInfo.cpp93 unsigned Reg1; in adjustStackPtr() local
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h83 bool contains(MCRegister Reg1, MCRegister Reg2) const { in contains()
702 uint16_t Reg1 = 0; variable
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYMCCodeEmitter.cpp278 unsigned Reg1 = getRegisterSeqOpValue() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp235 Register Reg1 = cast<RegisterSDNode>(V1)->getReg(); in tryInlineAsm() local
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp980 Register Reg1 = Reg; in lowerCRSpilling() local
1025 Register Reg1 = Reg; in lowerCRRestore() local
1139 Register Reg1 = Reg; in lowerCRBitSpilling() local
H A DPPCVSXSwapRemoval.cpp898 Register Reg1 = MI->getOperand(1).getReg(); in handleSpecialSwappables() local
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp201 unsigned Reg1 = cast<RegisterSDNode>(V1)->getReg(); in selectInlineAsm() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineInstr.cpp2522 Register Reg1 = getOperand(1).getReg(); in getFirst2RegLLTs() local
2530 Register Reg1 = getOperand(1).getReg(); in getFirst3RegLLTs() local
2540 Register Reg1 = getOperand(1).getReg(); in getFirst4RegLLTs() local
2552 Register Reg1 = getOperand(1).getReg(); in getFirst5RegLLTs() local
H A DAggressiveAntiDepBreaker.cpp89 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) { in UnionGroups()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.cpp1495 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1); in printVectorListTwo() local
1508 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2); in printVectorListTwoSpaced() local
1563 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1); in printVectorListTwoAllLanes() local
1610 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2); in printVectorListTwoSpacedAllLanes() local
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp446 const DebugLoc &DL, unsigned Reg1, unsigned Reg2) { in createRegSequence()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp989 bool SystemZAsmParser::parseAddress(bool &HaveReg1, Register &Reg1, in parseAddress()
1102 Register Reg1, Reg2; in parseAddress() local
1495 Register Reg1, Reg2; in parseOperand() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp672 unsigned Reg1 = *MRI.getLLVMRegNum(Inst.getRegister(), true); in generateCompactUnwindEncoding() local

12