| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 185 void MipsTargetStreamer::emitR(unsigned Opcode, MCRegister Reg0, SMLoc IDLoc, in emitR()
194 void MipsTargetStreamer::emitRX(unsigned Opcode, MCRegister Reg0, MCOperand Op1, in emitRX()
204 void MipsTargetStreamer::emitRI(unsigned Opcode, MCRegister Reg0, int32_t Imm, in emitRI()
209 void MipsTargetStreamer::emitRR(unsigned Opcode, MCRegister Reg0, in emitRR()
225 void MipsTargetStreamer::emitRRX(unsigned Opcode, MCRegister Reg0, in emitRRX()
237 void MipsTargetStreamer::emitRRR(unsigned Opcode, MCRegister Reg0, in emitRRR()
243 void MipsTargetStreamer::emitRRRX(unsigned Opcode, MCRegister Reg0, in emitRRRX()
257 void MipsTargetStreamer::emitRRI(unsigned Opcode, MCRegister Reg0, in emitRRI()
263 void MipsTargetStreamer::emitRRIII(unsigned Opcode, MCRegister Reg0, in emitRRIII()
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| H A D | MipsMCCodeEmitter.cpp | 122 unsigned Reg0 = Ctx.getRegisterInfo()->getEncodingValue(RegOp0); in LowerCompactBranch() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupSetCC.cpp | 89 Register Reg0 = MI.getOperand(0).getReg(); in runOnMachineFunction() local
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| H A D | X86CompressEVEX.cpp | 193 Register Reg0 = MI.getOperand(0).getReg(); in CompressEVEXImpl() local
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| H A D | X86ExpandPseudo.cpp | 479 Register Reg0 = TRI->getSubReg(Reg, X86::sub_mask_0); in expandMI() local
515 Register Reg0 = TRI->getSubReg(Reg, X86::sub_mask_0); in expandMI() local
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| H A D | X86InstrInfo.cpp | 7409 Register Reg0 = HasDef ? MI.getOperand(0).getReg() : Register(); in commuteOperandsForFold() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPeephole.cpp | 222 Register Reg0 = Op0.getReg(); in runOnMachineFunction() local
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| H A D | HexagonBitTracker.cpp | 306 unsigned Reg0 = Reg[0].Reg; in evaluate() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 2164 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLD() local
2299 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVST() local
2471 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDSTLane() local
3009 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDDup() local
3358 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3406 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3428 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3449 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3803 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3822 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
[all …]
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| H A D | Thumb2SizeReduction.cpp | 751 Register Reg0 = MI->getOperand(0).getReg(); in ReduceTo2Addr() local
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| H A D | ARMAsmPrinter.cpp | 339 Register Reg0 = TRI->getSubReg(RegBegin, ARM::gsub_0); in PrintAsmOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 232 Register Reg0 = cast<RegisterSDNode>(V0)->getReg(); in tryInlineAsm() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEFrameLowering.cpp | 453 MCRegister Reg0 = RegInfo.getSubReg(Reg, Mips::sub_lo); in emitPrologue() local
462 MCRegister Reg0 = Reg; in emitPrologue() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVLegalizerInfo.cpp | 364 Register Reg0 = Op0.getReg(); in legalizeCustom() local
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| H A D | SPIRVInstructionSelector.cpp | 3656 Register Reg0; in selectFirstBitSet64() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 1295 unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg()); in InsertSEH() local
1304 unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg()); in InsertSEH() local
1315 unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); in InsertSEH() local
1328 Register Reg0 = MBBI->getOperand(1).getReg(); in InsertSEH() local
1366 unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg()); in InsertSEH() local
1377 Register Reg0 = MBBI->getOperand(0).getReg(); in InsertSEH() local
1411 unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg()); in InsertSEH() local
1424 unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); in InsertSEH() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelDAGToDAG.cpp | 200 unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg(); in selectInlineAsm() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 1492 MCRegister Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); in printVectorListTwo() local
1505 MCRegister Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); in printVectorListTwoSpaced() local
1560 MCRegister Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); in printVectorListTwoAllLanes() local
1607 MCRegister Reg0 = MRI.getSubReg(Reg, ARM::dsub_0); in printVectorListTwoSpacedAllLanes() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 2644 Register Reg0 = getOperand(0).getReg(); in getFirst2RegLLTs() local
2652 Register Reg0 = getOperand(0).getReg(); in getFirst3RegLLTs() local
2662 Register Reg0 = getOperand(0).getReg(); in getFirst4RegLLTs() local
2674 Register Reg0 = getOperand(0).getReg(); in getFirst5RegLLTs() local
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| H A D | RegAllocFast.cpp | 1404 Register Reg0 = MO0.getReg(); in findAndSortDefOperandIndexes() local
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| H A D | TargetInstrInfo.cpp | 199 Register Reg0 = HasDef ? MI.getOperand(0).getReg() : Register(); in commuteInstructionImpl() local
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| H A D | RegisterCoalescer.cpp | 2780 Register Reg0; in valuesIdentical() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 716 uint16_t Reg0 = 0; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 2273 Register Reg0 = MRI.createVirtualRegister(&SystemZ::GR64BitRegClass); in loadImmediate() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1156 Register Reg0 = MI.getOperand(0).getReg(); in commuteInstructionImpl() local
1186 Register Reg0 = ChangeReg0 ? Reg2 : MI.getOperand(0).getReg(); in commuteInstructionImpl() local
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